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Tue, 30 Jul 2024 19:59:18 GMT Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 554B05805C; Tue, 30 Jul 2024 19:59:16 +0000 (GMT) Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1E1CA58059; Tue, 30 Jul 2024 19:59:14 +0000 (GMT) Received: from [9.171.11.107] (unknown [9.171.11.107]) by smtpav02.wdc07v.mail.ibm.com (Postfix) with ESMTP; Tue, 30 Jul 2024 19:59:13 +0000 (GMT) Message-ID: Subject: Re: [PATCH] PCI: s390: Handle ARI on bus without associated struct pci_dev From: Niklas Schnelle To: Bjorn Helgaas , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Sven Schnelle , Christian Borntraeger , Gerd Bayer Cc: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Date: Tue, 30 Jul 2024 21:59:13 +0200 In-Reply-To: <20240730-ari_no_bus_dev-v1-1-7de17676f9fe@linux.ibm.com> References: <20240730-ari_no_bus_dev-v1-1-7de17676f9fe@linux.ibm.com> Autocrypt: addr=schnelle@linux.ibm.com; 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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3 (3.52.3-1.fc40) Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: -b6LlMr7Qn-dK98s_PJpItgemZKagEe3 X-Proofpoint-ORIG-GUID: itKTzGb2PY6fWDGEesSyGX8RS-v_3Gpy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_15,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 impostorscore=0 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300136 On Tue, 2024-07-30 at 21:36 +0200, Niklas Schnelle wrote: > On s390 PCI busses are virtualized and the downstream ports are > invisible to the OS and struct pci_bus::self is NULL. This associated > struct pci_dev is however relied upon in pci_ari_enabled() to check > whether ARI is enabled for the bus. ARI is therefor always detected as > disabled. >=20 > At the same time firmware on s390 always enables and relies upon ARI > thus causing a mismatch. Moreover with per-PCI function pass-through > there may exist busses with no function with devfn 0. For example > a SR-IOV capable device with two PFs may have separate function > dependency link chains for each of the PFs and their child VFs. In this > case the OS may only see the second PF and its child VFs on a bus > without a devfn 0 function. A situation which is also not supported by > the common pci_configure_ari() code. >=20 > Dispite simply being a mismatch this causes problems as some PCI devices > present a different SR-IOV topology depending on PCI_SRIOV_CTRL_ARI. >=20 > A similar mismatch may occur with SR-IOV when virtfn_add_bus() creates ne= w > busses with no associated struct pci_dev. Here too pci_ari_enabled() > on these busses would return false even if ARI is actually used. >=20 > Prevent both mismatches by moving the ari_enabled flag from struct > pci_dev to struct pci_bus making it independent from struct pci_bus:: > self. Let the bus inherit the ari_enabled state from its parent bus when > there is no bridge device such that busses added by virtfn_add_bus() > match their parent. For s390 set ari_enabled when the device supports > ARI in the awareness that all PCIe ports on s390 systems are ARI > capable. >=20 > Signed-off-by: Niklas Schnelle > --- > arch/s390/pci/pci_bus.c | 12 ++++++++++++ > drivers/pci/pci.c | 4 ++-- > drivers/pci/probe.c | 1 + > include/linux/pci.h | 4 ++-- > 4 files changed, 17 insertions(+), 4 deletions(-) >=20 > diff --git a/arch/s390/pci/pci_bus.c b/arch/s390/pci/pci_bus.c > index daa5d7450c7d..021319438dad 100644 > --- a/arch/s390/pci/pci_bus.c > +++ b/arch/s390/pci/pci_bus.c > @@ -278,6 +278,18 @@ void pcibios_bus_add_device(struct pci_dev *pdev) > { > struct zpci_dev *zdev =3D to_zpci(pdev); > =20 > + /* > + * On s390 PCI busses are virtualized and the bridge > + * devices are invisible to the OS. Furthermore busses > + * may exist without a devfn 0 function. Thus the normal > + * ARI detection does not work. At the same time fw/hw > + * has always enabled ARI when possible. Reflect the actual > + * state by setting ari_enabled whenever a device on the bus > + * supports it. > + */ > + if (pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ARI)) > + zdev->zbus->bus->ari_enabled =3D 1; > + @Bjorn unstead of adding the above code to s390 specific code an alternative I considered would be to modify pci_configure_ari() like below. I tested this as well but wasn't sure if it is too much churn especially the handling of the dev->devfn !=3D 0 case. Then again it might be nice to have this in common code. @@ -3523,12 +3524,18 @@ void pci_configure_ari(struct pci_dev *dev) u32 cap; struct pci_dev *bridge; - if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn) + if (pcie_ari_disabled || !pci_is_pcie(dev)) + return; + + if (dev->devfn && !hypervisor_isolated_pci_functions()) return; bridge =3D dev->bus->self; - if (!bridge) + if (!bridge) { + if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI)) + dev->bus->ari_enabled =3D 1; return; + } pcie_capability_read_dword(bridge, PCI_EXP_DEVCAP2, &cap); if (!(cap & PCI_EXP_DEVCAP2_ARI))