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[84.136.106.227]) by smtp.gmail.com with ESMTPSA id n8sm6835395wri.47.2021.12.17.06.24.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Dec 2021 06:24:59 -0800 (PST) Message-ID: Date: Fri, 17 Dec 2021 15:24:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH kvm-unit-tests 1/2] s390x: diag288: Add missing clobber Content-Language: en-US To: Janosch Frank , Nico Boehr , kvm@vger.kernel.org Cc: linux-s390@vger.kernel.org, imbrenda@linux.ibm.com, david@redhat.com References: <20211217103137.1293092-1-nrb@linux.ibm.com> <20211217103137.1293092-2-nrb@linux.ibm.com> <3e2035bd-0929-488c-28f3-d8256bec14a4@redhat.com> <329aced6-df4f-2802-cbc6-99469c5f9462@linux.ibm.com> From: Thomas Huth In-Reply-To: <329aced6-df4f-2802-cbc6-99469c5f9462@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On 17/12/2021 15.16, Janosch Frank wrote: > On 12/17/21 14:47, Thomas Huth wrote: >> On 17/12/2021 11.31, Nico Boehr wrote: >>> We clobber r0 and thus should let the compiler know we're doing so. >>> >>> Because we change from basic to extended ASM, we need to change the >>> register names, as %r0 will be interpreted as a token in the assembler >>> template. >>> >>> For consistency, we align with the common style in kvm-unit-tests which >>> is just 0. >>> >>> Signed-off-by: Nico Boehr >>> --- >>>    s390x/diag288.c | 7 ++++--- >>>    1 file changed, 4 insertions(+), 3 deletions(-) >>> >>> diff --git a/s390x/diag288.c b/s390x/diag288.c >>> index 072c04a5cbd6..da7b06c365bf 100644 >>> --- a/s390x/diag288.c >>> +++ b/s390x/diag288.c >>> @@ -94,11 +94,12 @@ static void test_bite(void) >>>        /* Arm watchdog */ >>>        lc->restart_new_psw.mask = extract_psw_mask() & ~PSW_MASK_EXT; >>>        diag288(CODE_INIT, 15, ACTION_RESTART); >>> -    asm volatile("        larl    %r0, 1f\n" >>> -             "        stg    %r0, 424\n" >>> +    asm volatile("        larl    0, 1f\n" >>> +             "        stg    0, 424\n" >> >> Would it work to use %%r0 instead? > > Yes, but I told him that looks weird, so that one is on me. > @claudio @thomas What's your preferred way of dealing with this? I think it's mostly a matter of taste. I slightly prefer %%r0 to just 0 so that it is clear from the first sight that it is a register and not an immediate constant. Additionally, there used to be a problem with older versions of Clang that required the %%rX syntax, see: https://git.qemu.org/?p=qemu.git;a=commitdiff;h=052b66e7211af6 But we're not supporting those Clang versions for the kvm-unit-tests anyway, so that doesn't really count. Thus, I don't mind too much, if everybody else prefers the bare numbers, then let's go with this. Thomas