[PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bharat Uppal]

On FSD platform, gating the reference clock (ref_clk) and putting the
UFS device in reset by asserting the reset signal during UFS suspend,
improves the power savings and ensures the PHY is fully turned off.

These operations are added as FSD specific suspend hook to avoid
unintended side effects on other SoCs supported by this driver.

Signed-off-by: Nimesh Sati  <nimesh.sati@samsung.com>
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
---
 drivers/ufs/host/ufs-exynos.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c
index 3e545af536e5..b19a9f0d25f6 100644
--- a/drivers/ufs/host/ufs-exynos.c
+++ b/drivers/ufs/host/ufs-exynos.c
@@ -1896,6 +1896,13 @@ static int fsd_ufs_pre_pwr_change(struct exynos_ufs *ufs,
 	return 0;
 }
 
+static int fsd_ufs_suspend(struct exynos_ufs *ufs)
+{
+	exynos_ufs_gate_clks(ufs);
+	hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
+	return 0;
+}
+
 static inline u32 get_mclk_period_unipro_18(struct exynos_ufs *ufs)
 {
 	return (16 * 1000 * 1000000UL / ufs->mclk_rate);
@@ -2162,6 +2169,7 @@ static const struct exynos_ufs_drv_data fsd_ufs_drvs = {
 	.pre_link               = fsd_ufs_pre_link,
 	.post_link              = fsd_ufs_post_link,
 	.pre_pwr_change         = fsd_ufs_pre_pwr_change,
+	.suspend                = fsd_ufs_suspend,
 };
 
 static const struct exynos_ufs_drv_data gs101_ufs_drvs = {
-- 
2.49.0

Re: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bart Van Assche]

On 8/4/25 4:36 AM, Bharat Uppal wrote:
> +static int fsd_ufs_suspend(struct exynos_ufs *ufs)
> +{
> +	exynos_ufs_gate_clks(ufs);
> +	hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
> +	return 0;
> +}

Why '0 << 0' instead of just '0'? Isn't the latter easier to read?

Thanks,

Bart.

RE: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bharat Uppal]

> -----Original Message-----
> From: Bart Van Assche <bvanassche@acm.org>
> Sent: 04 August 2025 21:17
> To: Bharat Uppal <bharat.uppal@samsung.com>; linux-scsi@vger.kernel.org;
> linux-kernel@vger.kernel.org; James.Bottomley@HansenPartnership.com;
> martin.petersen@oracle.com; alim.akhtar@samsung.com;
> avri.altman@wdc.com; linux-samsung-soc@vger.kernel.org
> Cc: pankaj.dubey@samsung.com; aswani.reddy@samsung.com; Nimesh Sati
> <nimesh.sati@samsung.com>
> Subject: Re: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in
> reset on suspend
> 
> On 8/4/25 4:36 AM, Bharat Uppal wrote:
> > +static int fsd_ufs_suspend(struct exynos_ufs *ufs) {
> > +	exynos_ufs_gate_clks(ufs);
> > +	hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
> > +	return 0;
> > +}
> 
> Why '0 << 0' instead of just '0'? Isn't the latter easier to read?
Thanks for reviewing.
Indeed setting 0 is right, but in the same file ufs-exynos.c,  I have seen HCI_GPIO_OUT register configured using 0 << 0.
My intent here is to maintain coding style within the file.

With Regards
Bharat Uppal

> 
> Thanks,
> 
> Bart.

[PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bharat Uppal]

On FSD platform, gating the reference clock (ref_clk) and putting the
UFS device in reset by asserting the reset signal during UFS suspend,
improves the power savings and ensures the PHY is fully turned off.

These operations are added as FSD specific suspend hook to avoid
unintended side effects on other SoCs supported by this driver.

Signed-off-by: Nimesh Sati  <nimesh.sati@samsung.com>
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
---
 drivers/ufs/host/ufs-exynos.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c
index 3e545af536e5..4d0f7d6b84fe 100644
--- a/drivers/ufs/host/ufs-exynos.c
+++ b/drivers/ufs/host/ufs-exynos.c
@@ -1896,6 +1896,13 @@ static int fsd_ufs_pre_pwr_change(struct exynos_ufs *ufs,
 	return 0;
 }
 
+static int fsd_ufs_suspend(struct exynos_ufs *ufs)
+{
+	exynos_ufs_gate_clks(ufs);
+	hci_writel(ufs, 0, HCI_GPIO_OUT);
+	return 0;
+}
+
 static inline u32 get_mclk_period_unipro_18(struct exynos_ufs *ufs)
 {
 	return (16 * 1000 * 1000000UL / ufs->mclk_rate);
@@ -2162,6 +2169,7 @@ static const struct exynos_ufs_drv_data fsd_ufs_drvs = {
 	.pre_link               = fsd_ufs_pre_link,
 	.post_link              = fsd_ufs_post_link,
 	.pre_pwr_change         = fsd_ufs_pre_pwr_change,
+	.suspend                = fsd_ufs_suspend,
 };
 
 static const struct exynos_ufs_drv_data gs101_ufs_drvs = {
-- 
2.49.0

RE: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bharat Uppal]

Hi Bart,
I have made the relevant changes and pushed the updated patch.
Can you please review it and close the same.

With Regards
Bharat Uppal

> -----Original Message-----
> From: Bharat Uppal <bharat.uppal@samsung.com>
> Sent: 05 August 2025 10:58
> To: 'Bart Van Assche' <bvanassche@acm.org>; 'linux-scsi@vger.kernel.org'
> <linux-scsi@vger.kernel.org>; 'linux-kernel@vger.kernel.org' <linux-
> kernel@vger.kernel.org>; 'James.Bottomley@HansenPartnership.com'
> <James.Bottomley@HansenPartnership.com>;
> 'martin.petersen@oracle.com' <martin.petersen@oracle.com>;
> 'alim.akhtar@samsung.com' <alim.akhtar@samsung.com>;
> 'avri.altman@wdc.com' <avri.altman@wdc.com>; 'linux-samsung-
> soc@vger.kernel.org' <linux-samsung-soc@vger.kernel.org>
> Cc: 'pankaj.dubey@samsung.com' <pankaj.dubey@samsung.com>;
> 'aswani.reddy@samsung.com' <aswani.reddy@samsung.com>; 'Nimesh Sati'
> <nimesh.sati@samsung.com>
> Subject: RE: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in
> reset on suspend
> 
> 
> > -----Original Message-----
> > From: Bart Van Assche <bvanassche@acm.org>
> > Sent: 04 August 2025 21:17
> > To: Bharat Uppal <bharat.uppal@samsung.com>;
> > linux-scsi@vger.kernel.org; linux-kernel@vger.kernel.org;
> > James.Bottomley@HansenPartnership.com;
> > martin.petersen@oracle.com; alim.akhtar@samsung.com;
> > avri.altman@wdc.com; linux-samsung-soc@vger.kernel.org
> > Cc: pankaj.dubey@samsung.com; aswani.reddy@samsung.com; Nimesh
> Sati
> > <nimesh.sati@samsung.com>
> > Subject: Re: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS
> > device in reset on suspend
> >
> > On 8/4/25 4:36 AM, Bharat Uppal wrote:
> > > +static int fsd_ufs_suspend(struct exynos_ufs *ufs) {
> > > +	exynos_ufs_gate_clks(ufs);
> > > +	hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
> > > +	return 0;
> > > +}
> >
> > Why '0 << 0' instead of just '0'? Isn't the latter easier to read?
> Thanks for reviewing.
> Indeed setting 0 is right, but in the same file ufs-exynos.c,  I have seen
> HCI_GPIO_OUT register configured using 0 << 0.
> My intent here is to maintain coding style within the file.
> 
> With Regards
> Bharat Uppal
> 
> >
> > Thanks,
> >
> > Bart.

Re: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Bart Van Assche]

On 8/20/25 10:39 PM, Bharat Uppal wrote:
> On FSD platform, gating the reference clock (ref_clk) and putting the
> UFS device in reset by asserting the reset signal during UFS suspend,
> improves the power savings and ensures the PHY is fully turned off.
> 
> These operations are added as FSD specific suspend hook to avoid
> unintended side effects on other SoCs supported by this driver.

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH] scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

[Martin K. Petersen]

Bharat,

> On FSD platform, gating the reference clock (ref_clk) and putting the
> UFS device in reset by asserting the reset signal during UFS suspend,
> improves the power savings and ensures the PHY is fully turned off.

Applied to 6.18/scsi-staging, thanks!

-- 
Martin K. Petersen