[PATCH v10 0/2] Add Google Tensor SoC USB PHY support

Roy Luo
2025-12-27T00:53:48Z

This series introduces USB PHY support for the Google Tensor G5
SoC (codename: Laguna), a new generation of Google silicon first
launched with Pixel 10 devices.

The Tensor G5 represents a significant architectural overhaul compared
to previous Tensor generations (e.g., gs101), which were based on Samsung
Exynos IP. Although the G5 still utilizes Synopsys IP for the USB
components, the custom top-level integration introduces a completely new
design for clock, reset scheme, register interfaces and programming
sequence, necessitating new drivers and device tree bindings.

The USB subsystem on Tensor G5 integrates a Synopsys DWC3 USB 3.1
DRD-Single Port controller with hibernation support, and a custom PHY
block comprising Synopsys eUSB2 and USB 3.2/DP combo PHYs. The controller
support is sent as a separate patch series.

Co-developed-by: Joy Chakraborty <joychakr@google.com>
Signed-off-by: Joy Chakraborty <joychakr@google.com>
Co-developed-by: Naveen Kumar <mnkumar@google.com>
Signed-off-by: Naveen Kumar <mnkumar@google.com>
Signed-off-by: Roy Luo <royluo@google.com>
---
Changes in v10:
- Alphabetically sort Kconfig and Makefile (some of the existing entries are
out of order but they are not in the scope of this change).
- Updated index, num_clks, and num_rsts in struct google_usb_phy_instance to
use unsigned int.
- Replaced the fixed-size array of PHY instances in struct google_usb_phy
with a dynamically allocated pointer. Since container_of can no longer
be used with the pointer, added a parent pointer to google_usb_phy_instance
to reference the main google_usb_phy structure.
- Removed the superfluous init of ret in google_usb2_phy_init.
- Ensured google_usb2_phy_init explicitly returns 0 upon successful completion.
Link to v9: https://lore.kernel.org/r/20251222-phyb4-v9-0-82c0b671b070@google.com

Changes in v9:
- Per Greg's feedback, remove Kconfig dependency on ARCH_GOOGLE || COMPILE_TEST.
Remove ARCH_GOOGLE as it's not yet in the kernel, and COMPILE_TEST is no longer needed without it.
Link to v8: https://lore.kernel.org/r/20251205-phyb4-v8-0-c59ea80a4458@google.com

Changes in v8:
- Update the Kconfig dependency to depends on ARCH_GOOGLE || COMPILE_TEST
Note that ARCH_GOOGLE does not exist yet but will eventually
be there when the following patch lands
https://lore.kernel.org/r/20251111112158.3.I35b9e835ac49ab408e5ca3e0983930a1f1395814@changeid/
- Mention SoC codename Laguna in Kconfig description.
- Sort the header alphabetically and sort the variables using the
reverse christmas tree ordering.
- Add driver and binding files to the Tensor SoC MAINTAINER entry.
- Add detailed comment for phy_mutex
Link to v7: https://lore.kernel.org/r/20251121-phyb4-v7-0-df644fa62180@google.com

Changes in v7:
- Change the device tree binding example node name to usb-phy to follow
the hyphen-separated naming convention and remove label.
Link to v6: https://lore.kernel.org/r/20251120-phyb4-v6-0-b6694e1f0caf@google.com

Changes in v6:
- Use "lga" as SoC name instead of "gs5" to align with Tensor G5 device
tree https://lore.kernel.org/lkml/20251111192422.4180216-1-dianders@chromium.org
- Add "usb2_core" to the reg property to define the MMIO space for
the eUSB 2.0 PHY IP.
- Rename "usb3_top" reg as "usbdp_top" and update the description to
reflect its nature as a top-level wrapper and align with internal
documentation.
- Use syscon to access the "usb2_cfg" MMIO space.
- Remove minItems for clocks and resets, making all listed clocks and
resets (including USB3) mandatory.
Link to v5: https://lore.kernel.org/linux-phy/20251029214032.3175261-1-royluo@google.com

Changes in v5:
- Add usb3 registers/clks/resets to binding as suggested by Krzysztof
Kozlowski. This ensures completeness of the binding, though the
driver has not yet ultilized the resources. The usb3 clks and resets
are optional if usb2-only operation is desired, this is denoted by
minItems and descriptions in the clocks and resets properties.
Additionally, rename existing binding entries for consistency and to
better differntiate between usb2 and usb3.
- Move the description of the phy select to phy-cells in binding as
suggested by Krzysztof Kozlowski.
Link to v4: https://lore.kernel.org/linux-phy/20251017235159.2417576-1-royluo@google.com

Changes in v4:
- Separate controller and phy changes into two distinct patch series.
- Remove usb2only mode configuration and the corresponding usb_top_cfg
reg (moved to controller)
- Add more descriptions to dp_top reg to indicate it's not DP specific.
- Add u2phy_apb clk/reset
Link to v3: https://lore.kernel.org/linux-usb/20251010201607.1190967-1-royluo@google.com

Changes in v3:
- Align binding file name with the compatible string
- Simplify the compatible property in binding to a single const value.
- Add descriptive comments and use item list in binding.
- Rename binding entries for clarity and brevity.
Link to v2: https://lore.kernel.org/linux-usb/20251008060000.3136021-1-royluo@google.com

Changes in v2:
- Reorder patches to present bindings first.
- Update dt binding compatible strings to be SoC-specific (google,gs5-*).
- Better describe the hardware in dt binding commit messages and
descriptions.
- Adjust PHY driver commit subjects to use correct prefixes ("phy:").
- Move PHY driver from a subdirectory to drivers/phy/.
Link to v1: https://lore.kernel.org/linux-usb/20251006232125.1833979-1-royluo@google.com/

---
Roy Luo (2):
dt-bindings: phy: google: Add Google Tensor G5 USB PHY
phy: Add Google Tensor SoC USB PHY driver

.../bindings/phy/google,lga-usb-phy.yaml | 133 +++++++++
MAINTAINERS | 2 +
drivers/phy/Kconfig | 10 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-google-usb.c | 296 +++++++++++++++++++++
5 files changed, 442 insertions(+)
---
base-commit: 3f0e9c8cefa913dd9bd1d79b9a68896ea130f106
change-id: 20251119-phyb4-2e03a7c449c4

Best regards,
--
Roy Luo <royluo@google.com>