From mboxrd@z Thu Jan 1 00:00:00 1970 From: Minas Harutyunyan Subject: Re: [PATCH] usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs Date: Tue, 7 May 2019 10:22:33 +0400 Message-ID: <2f09e746-b3da-cac3-56f4-941fa2bca9d4@synopsys.com> References: <20190503204958.GA12532@kozik-lap> <20190506130046.20898-1-m.szyprowski@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190506130046.20898-1-m.szyprowski@samsung.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Marek Szyprowski , "linux-usb@vger.kernel.org" , "linux-samsung-soc@vger.kernel.org" , "linux-kernel@vger.kernel.org" Cc: Felipe Balbi , Bartlomiej Zolnierkiewicz , Jules Maselbas , Krzysztof Kozlowski List-Id: linux-samsung-soc@vger.kernel.org On 5/6/2019 5:01 PM, Marek Szyprowski wrote: > Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the > host side of the shared USB2 PHY doesn't work. > > Reported-by: Krzysztof Kozlowski > Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width") > Signed-off-by: Marek Szyprowski Acked-by: Minas Harutyunyan > --- > drivers/usb/dwc2/params.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c > index 6900eea57526..9ece4affb9d4 100644 > --- a/drivers/usb/dwc2/params.c > +++ b/drivers/usb/dwc2/params.c > @@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg) > struct dwc2_core_params *p = &hsotg->params; > > p->power_down = 0; > + p->phy_utmi_width = 8; > } > > static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) >