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From: Jungseok Lee <jungseoklee85@gmail.com>
To: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: Joel Schopp <joel.schopp@amd.com>,
	Timur Tabi <timur@codeaurora.org>,
	steve.capper@linaro.org, Arnd Bergmann <arnd@arndb.de>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	lkml <linux-kernel@vger.kernel.org>,
	linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org, barami97@gmail.com,
	kvmarm@lists.cs.columbia.edu,
	Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [PATCH v6 2/7] arm64: Introduce VA_BITS and translation level options
Date: Tue, 15 Jul 2014 23:53:12 +0900	[thread overview]
Message-ID: <3AF98E68-6818-416A-BC33-57148F1EC246@gmail.com> (raw)
In-Reply-To: <20140714224159.GA9829@arm.com>

On Jul 15, 2014, at 7:41 AM, Catalin Marinas wrote:
> On Mon, Jul 14, 2014 at 09:38:59PM +0100, Joel Schopp wrote:
>> I agree that these patches would be very useful.  I just rebased my fix
>> for a VTTBR_BADDR_MASK bug on one of these patches that could be pulled
>> out independently.  See
>> https://lists.cs.columbia.edu/pipermail/kvmarm/2014-July/010480.html
>> 
>> The original author Jungseok Lee is no longer available to work on
>> future versions of these patches.  I was thinking that if they didn't
>> get picked up as they are that with the original author's blessing I
>> would pick them up and keep them forward ported/resubmitted.  I have an
>> SOC to test them on.
> 
> The patches are pretty good. I'll give them a try tomorrow and if there
> isn't something fundamental missing I'll consider taking them for 3.17.

Hi All,

If only stage1 side is taken and merged, KVM should be disabled under 4 level
lookups with the following configuration adjustment. I've tested it on top of
arm64/for-next/core branch and it works fine.

--- a/arch/arm64/kvm/Kconfig
+++ b/arch/arm64/kvm/Kconfig
@@ -18,6 +18,7 @@ if VIRTUALIZATION
 
 config KVM
        bool "Kernel-based Virtual Machine (KVM) support"
+       depends on !ARM64_4_LEVELS
        select MMU_NOTIFIER
        select PREEMPT_NOTIFIERS
        select ANON_INODES

However, I don't know whether it does make sense or not.
In other words, stage2 side should be prepared to fully support 4 level lookups.

In order to cover all combinations of host and guest, VTTBR_X should be determined
dynamically as referring to hardware capability. At this point, the patches have
been revised many times, but they don't have got ACKs from Christoffer and Marc yet.

That is why the patches are pending now in the author's point of view.

- Jungseok Lee

  reply	other threads:[~2014-07-15 14:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-12  9:40 [PATCH v6 2/7] arm64: Introduce VA_BITS and translation level options Jungseok Lee
2014-07-14 19:53 ` Timur Tabi
2014-07-14 20:38   ` Joel Schopp
2014-07-14 22:41     ` Catalin Marinas
2014-07-15 14:53       ` Jungseok Lee [this message]
2014-07-15 21:44         ` Catalin Marinas
2014-07-16 14:23           ` Jungseok Lee

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