Re: [PATCH v3] phy: Add new Exynos5 USB 3.0 PHY driver

[Tomasz Figa <t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>]

Hi Vivek,

On 14.02.2014 14:53, Vivek Gautam wrote:
>>> Changes from v2:
>>> 1) Added support for multiple PHYs (UTMI+ and PIPE3) and
>>>      related changes in the driver structuring.
>>
>>
>> I'm a bit skeptical about this separation. Can the PHY operate with just the
>> UTMI+ or PIPE3 part enabled alone without the other? Can any PHY consumer
>> operate this way?
>
> Yes :-)
> As also pointed by Kishon the PHY consumer (which is DWC3 in case of
> Exynos5 SoC series)
> should theoretically be able use either UTMI+ phy for High speed
> operations or both (UTMI+ and PIPE3)
> for Super Speed operations.

OK, that's fine then. This is the explanation I needed, thanks.

>>
>> I believe the right thing to do here is to do all the initialization in
>> .power_on() and let the driver simply call phy_power_on() when it needs the
>> PHY and phy_power_off() otherwise.
>
> If this is what we should be doing then what will be the purpose of
> two separate APIs :
> phy_power_on() and phy_init().
> Am i missing while understanding the things.
>

I don't understand this separation as well. Operations that should be 
done together shouldn't be separated. Is there any case when you can 
call one of phy_power_on() and phy_init() without calling another one 
right before/after it?

Best regards,
Tomasz
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