From: Inki Dae <inki.dae@samsung.com>
To: Andrzej Hajda <a.hajda@samsung.com>
Cc: Thierry Reding <treding@nvidia.com>,
linux-samsung-soc@vger.kernel.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/exynos: dsi: add LPM (Low Power Mode) transfer support
Date: Fri, 25 Jul 2014 17:31:11 +0900 [thread overview]
Message-ID: <53D215CF.6080404@samsung.com> (raw)
In-Reply-To: <53D0E469.8010308@samsung.com>
On 2014년 07월 24일 19:48, Andrzej Hajda wrote:
> +CC: Thierry and Alexandre
>
> On 07/18/2014 12:56 PM, Inki Dae wrote:
>> This patch adds LPM transfer support for video or command data.
>>
>> With this patch, Exynos MIPI DSI controller can transfer command or
>> video data with HS or LP mode in accordance with mode_flags set
>> by LCD Panel driver.
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 22 ++++++++++++++++++++--
>> 1 file changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>> index 2df3592..b120554 100644
>> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>> @@ -426,13 +426,28 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
>> | DSIM_ESC_PRESCALER(esc_div)
>> | DSIM_LANE_ESC_CLK_EN_CLK
>> | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1)
>> - | DSIM_BYTE_CLK_SRC(0)
>> - | DSIM_TX_REQUEST_HSCLK;
>> + | DSIM_BYTE_CLK_SRC(0);
>> +
>> + if (!(dsi->mode_flags & MIPI_DSI_MODE_CMD_LPM))
>> + reg |= DSIM_TX_REQUEST_HSCLK;
>> +
>
> Maybe I missed sth but it seems to me slightly unrelated to LPM flag.
> According to specs some panels can require this clock even in LPM mode.
> I wonder if recently introduced MIPI_DSI_CLOCK_NON_CONTINUOUS wouldn't
> handle it.
It's different. MIPI DSI spec says,
"For continuous clock behaviour, the Clock Lane remains in high-speed
mode generating active clock signals between HS data packet
transmissions. For non-continuous clock behaviour, *the Clock Lane
enters the LP-11 state between HS data packet transmissions*."
>
>> writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
>>
>> return 0;
>> }
>>
>> +static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi,
>> + bool enable)
>> +{
>> + u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG);
>> +
>> + reg &= ~DSIM_TX_REQUEST_HSCLK;
>> + if (enable)
>> + reg |= DSIM_TX_REQUEST_HSCLK;
>> +
>> + writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
>> +}
>> +
>> static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
>> {
>> u32 reg;
>> @@ -575,6 +590,9 @@ static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable)
>> {
>> u32 reg;
>>
>> + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM))
>> + exynos_dsi_enable_hs_clock(dsi, true);
>> +
>
> It does not care about enable argument of the function, I guess it should.
>
Yes, it's better to enable HS clock only in case of enabling. So will
add one more flag like below,
if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_LPM) && enable)
Thank,
Inki Dae
> Regards
> Andrzej
>
>> reg = readl(dsi->reg_base + DSIM_MDRESOL_REG);
>> if (enable)
>> reg |= DSIM_MAIN_STAND_BY;
>
> --
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>
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prev parent reply other threads:[~2014-07-25 8:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-18 10:56 [PATCH 0/2] drm/mipi-dsi: support LPM (Low Power Mode) transfer Inki Dae
2014-07-18 10:56 ` [PATCH 1/2] drm/mipi-dsi: add (LPM) Low Power Mode transfer support Inki Dae
2014-07-24 10:23 ` Andrzej Hajda
2014-07-25 7:49 ` Inki Dae
2014-07-18 10:56 ` [PATCH 2/2] drm/exynos: dsi: add LPM (Low Power Mode) " Inki Dae
2014-07-24 10:48 ` Andrzej Hajda
2014-07-25 8:31 ` Inki Dae [this message]
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