From mboxrd@z Thu Jan 1 00:00:00 1970
From: Przemyslaw Marczak
Subject: Re: [RFC] ARM: exynos: MCPM: [is this a] fix for secondary boot on
5422?
Date: Mon, 15 Jun 2015 14:57:18 +0200
Message-ID: <557ECBAE.20302@samsung.com>
References: <1416896510-24612-1-git-send-email-khilman@kernel.org>
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To: Amit Kucheria
Cc: =?UTF-8?B?S3J6eXN6dG9mIEtvesWCb3dza2k=?= , Kevin Hilman , linux-samsung-soc , =?UTF-8?B?QmFydMWC?= =?UTF-8?B?b21pZWogxbtvxYJuaWVya2lld2ljeg==?= , Andrew Bresticker , Mauro Ribeiro , Doug Anderson , Abhilash Kesavan , Lists linaro-kernel , Kukjin Kim , Olof Johansson , Lists LAKML , Marek Szyprowski
On 06/15/2015 01:19 PM, Amit Kucheria wrote:
> On Mon, Jun 15, 2015 at 3:49 PM, Przemyslaw Marczak
> wrote:
>> Hello Krzysztof,
>>
>>
>> On 06/14/2015 10:56 AM, Krzysztof Koz=C5=82owski wrote:
>
>
>
>> I'm trying port the hardkernel's SPL to the mainline U-Boot at prese=
nt. The
>> mainline SPL is implemented for E5420 and E5800. But there are few
>> differences:
>> - different DRAM
>> - different clocks
>> - different boot core (peach-pi boots from A15)
>> - bl2 signature
>> - hdk's SPL uses smc calls
>> ... and some more.
>
> This is really good news! Would this work leave CCI control to Linux
> so that we may use MCPM to manage cpu and cluster OFF?
>
Yes, I would like to get this stuff working.
>> The BL1 keeps signature key and some part of code, but it's code is
>> proprietary - but we should be able to setup the secondary cores in =
BL2.
>>
>> When, I get the basic setup working, then I'm going to focus on the
>> secondary CPU's init. I don't have the documentation for iROM code, =
so
>> everything takes a while.
>>
>> If you looking for the lowlevel code, which is executed after wake=
up,
>> please check this :
>> https://github.com/hardkernel/u-boot/blob/odroidxu3-v2012.07/board/s=
amsung/smdk5422/lowlevel_init.S
>>
>> The 'lowlevel_init' label is always executed on boot.
>
Best regards,
--=20
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak@samsung.com