From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sylwester Nawrocki Subject: Re: [PATCH 1/2] clk: exynos5420: Set ID for aclk333 gate clock Date: Mon, 30 May 2016 14:49:37 +0200 Message-ID: <574C36E1.5000709@samsung.com> References: <1464111662-15336-1-git-send-email-javier@osg.samsung.com> <1464111662-15336-2-git-send-email-javier@osg.samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <1464111662-15336-2-git-send-email-javier@osg.samsung.com> Sender: linux-clk-owner@vger.kernel.org To: Javier Martinez Canillas Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kukjin Kim , Michael Turquette , Krzysztof Kozlowski , Marek Szyprowski , Mauro Carvalho Chehab , Shuah Khan , Stephen Boyd , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomasz Figa , linux-clk@vger.kernel.org, Nicolas Dufresne List-Id: linux-samsung-soc@vger.kernel.org On 05/24/2016 07:41 PM, Javier Martinez Canillas wrote: > The aclk333 clock needs to be ungated during the MFC power domain switch, > so set the clock ID to allow the Exynos power domain logic to lookup this > clock if is defined in the MFC PD device tree node. > > Signed-off-by: Javier Martinez Canillas Thanks, patch applied.