Re: [PATCH 0/2] Add GPLL, APLL, KPLL, EPLL and VPLL freq table for exynos5420 and exynos5250

[Tomasz Figa <t.figa@samsung.com>]

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Hi Vikas,

On Wednesday 14 of August 2013 10:36:53 Vikas Sajjan wrote:
> Hi Mike,
> 
> On Mon, Aug 12, 2013 at 3:32 PM, Vikas Sajjan <vikas.sajjan@linaro.org> 
wrote:
> > Adds GPLL, APLL, KPLL, EPLL and VPLL freq table for exynos5420 and
> > exynos5250.
> > 
> > is rebased on Mike's
> > https://git.linaro.org/gitweb?p=people/mturquette/linux.git;a=shortlog;
> > h=refs/heads/clk-next> 
> > Vikas Sajjan (2):
> >   clk: samsung: Add GPLL freq table for exynos5250 SoC
> >   clk: samsung: Add APLL, KPLL, EPLL and VPLL freq table for exynos5420
> >   
> >     SoC
> >  
> >  drivers/clk/samsung/clk-exynos5250.c |   19 +++++++-
> >  drivers/clk/samsung/clk-exynos5420.c |   81
> >  ++++++++++++++++++++++++++++++++++ 2 files changed, 99 insertions(+),
> >  1 deletion(-)
> 
> Can you apply this patchset.

Please give few more days for the patch to be reviewed by people.

A reasonable period of time which should pass after submitting a patch to 
ping the maintainers is around a week. This allows people to find some time 
to read your patches and share their opinions (and/or give their reviewed-
by/acked-by tags).

Best regards,
Tomasz

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