From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Chubb Subject: Re: [PATCH 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend Date: Thu, 11 Jun 2015 08:51:22 +1000 Message-ID: <84ioavb2j9.wl-peter.chubb@nicta.com.au> References: <1433941831-16637-1-git-send-email-javier.martinez@collabora.co.uk> Mime-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset="US-ASCII" Return-path: Received: from crl-mxout1.it.nicta.com.au ([221.199.218.17]:37750 "EHLO crl-mxout1.it.nicta.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751948AbbFJWvq (ORCPT ); Wed, 10 Jun 2015 18:51:46 -0400 In-Reply-To: <1433941831-16637-1-git-send-email-javier.martinez@collabora.co.uk> Sender: linux-samsung-soc-owner@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org To: Javier Martinez Canillas Cc: Thomas Gleixner , Jason Cooper , Kukjin Kim , Krzysztof Kozlowski , Tomasz Figa , Doug Anderson , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org >>>>> "Javier" == Javier Martinez Canillas writes: Javier> The Exynos interrupt combiner IP looses its state when the SoC s/looses/loses/ Peter C -- Dr Peter Chubb peter.chubb AT nicta.com.au http://www.ssrg.nicta.com.au Software Systems Research Group/NICTA