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[35.230.65.123]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f4477c8542sm14223370a91.17.2024.12.26.09.34.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Dec 2024 09:34:17 -0800 (PST) Date: Thu, 26 Dec 2024 09:34:14 -0800 From: William McVicker To: =?iso-8859-1?Q?Andr=E9?= Draszik Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marek Szyprowski , Sylwester Nawrocki , Alim Akhtar , Peter Griffin , Tudor Ambarus , Sam Protsenko , Roy Luo , kernel-team@android.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH v4 7/7] phy: exynos5-usbdrd: allow DWC3 runtime suspend with UDC bound (E850+) Message-ID: References: <20241206-gs101-phy-lanes-orientation-phy-v4-0-f5961268b149@linaro.org> <20241206-gs101-phy-lanes-orientation-phy-v4-7-f5961268b149@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241206-gs101-phy-lanes-orientation-phy-v4-7-f5961268b149@linaro.org> On 12/06/2024, André Draszik wrote: > To make USB runtime suspend work when a UDC has been bound, the phy > needs to inform the USBDRD controller (DWC3) that Vbus and bvalid are > gone, so that it can in turn raise the respective gadget interrupt with > event == DWC3_DEVICE_EVENT_DISCONNECT, which will cause the USB stack > to clean up, allowing DWC3 to enter runtime suspend. > > On e850 and gs101 this isn't working, as the respective signals are not > directly connected, and instead this driver uses override bits in the > PHY IP to set those signals. It currently forcefully sets them to 'on', > so the above mentioned interrupt will not be raised, preventing runtime > suspend. > > To detect that state, update this driver to act on the TCPC's > orientation signal - when orientation == NONE, Vbus is gone and we can > clear the respective bits. Similarly, for other orientation values we > re-enable them. > > This makes runtime suspend work on platforms with a TCPC (like Pixel6), > while keeping compatibility with platforms without (e850-96). > > With runtime suspend working, USB-C cable orientation detection now > also fully works on such platforms, and the link comes up as Superspeed > as expected irrespective of the cable orientation and whether UDC / > gadget are configured and active. > > Signed-off-by: André Draszik Verified on my Pixel 6 Pro. Tested-by: Will McVicker Thanks, Will