RE: [PATCH v2 2/4] scsi: ufs: Move the 4K alignment code into the Exynos driver

["Alim Akhtar" <alim.akhtar@samsung.com>]

Hi Bart

> -----Original Message-----
> From: Bart Van Assche <bvanassche@acm.org>
> Sent: Friday, September 22, 2023 12:53 AM
> To: Martin K . Petersen <martin.petersen@oracle.com>
> Cc: linux-scsi@vger.kernel.org; Bart Van Assche <bvanassche@acm.org>;
> Alim Akhtar <alim.akhtar@samsung.com>; James E.J. Bottomley
> <jejb@linux.ibm.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org>; Stanley Chu
> <stanley.chu@mediatek.com>; Can Guo <quic_cang@quicinc.com>;
> Manivannan Sadhasivam <mani@kernel.org>; Asutosh Das
> <quic_asutoshd@quicinc.com>; Bean Huo <beanhuo@micron.com>; Bao D.
> Nguyen <quic_nguyenb@quicinc.com>; Arthur Simchaev
> <Arthur.Simchaev@wdc.com>; Po-Wen Kao <powen.kao@mediatek.com>;
> Eric Biggers <ebiggers@google.com>; Keoseong Park
> <keosung.park@samsung.com>
> Subject: [PATCH v2 2/4] scsi: ufs: Move the 4K alignment code into the
> Exynos driver
> 
> The DMA alignment for the Exynos controller follows directly from the PRDT
> segment size configured in ufs-exynos.c. Hence, move the DMA alignment
> code into the Exynos driver source code.
> 
> Cc: Alim Akhtar <alim.akhtar@samsung.com>
> Signed-off-by: Bart Van Assche <bvanassche@acm.org>
> ---

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

Tested on exynos7 platform, able to use ufs with this change, so

Tested-by: Alim Akhtar <alim.akhtar@samsung.com>


>  drivers/ufs/core/ufshcd.c     | 6 ++++--
>  drivers/ufs/host/ufs-exynos.c | 9 +++++++--
>  include/ufs/ufshcd.h          | 7 ++-----
>  3 files changed, 13 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index
> f48a65fa3bf7..379229d51f04 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -5095,8 +5095,7 @@ static int ufshcd_slave_configure(struct scsi_device
> *sdev)
>  	struct request_queue *q = sdev->request_queue;
> 
>  	blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD -
> 1);
> -	if (hba->quirks & UFSHCD_QUIRK_4KB_DMA_ALIGNMENT)
> -		blk_queue_update_dma_alignment(q, SZ_4K - 1);
> +
>  	/*
>  	 * Block runtime-pm until all consumers are added.
>  	 * Refer ufshcd_setup_links().
> @@ -5112,6 +5111,9 @@ static int ufshcd_slave_configure(struct scsi_device
> *sdev)
>  	 */
>  	sdev->silence_suspend = 1;
> 
> +	if (hba->vops && hba->vops->config_scsi_dev)
> +		hba->vops->config_scsi_dev(sdev);
> +
>  	ufshcd_crypto_register(hba, q);
> 
>  	return 0;
> diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c
> index 3396e0388512..e5d145a2676e 100644
> --- a/drivers/ufs/host/ufs-exynos.c
> +++ b/drivers/ufs/host/ufs-exynos.c
> @@ -1511,6 +1511,11 @@ static int fsd_ufs_pre_link(struct exynos_ufs *ufs)
>  	return 0;
>  }
> 
> +static void exynos_ufs_config_scsi_dev(struct scsi_device *sdev) {
> +	blk_queue_update_dma_alignment(sdev->request_queue, SZ_4K -
> 1); }
> +
>  static int fsd_ufs_post_link(struct exynos_ufs *ufs)  {
>  	int i;
> @@ -1579,6 +1584,7 @@ static const struct ufs_hba_variant_ops
> ufs_hba_exynos_ops = {
>  	.hibern8_notify			=
> exynos_ufs_hibern8_notify,
>  	.suspend			= exynos_ufs_suspend,
>  	.resume				= exynos_ufs_resume,
> +	.config_scsi_dev		= exynos_ufs_config_scsi_dev,
>  };
> 
>  static struct ufs_hba_variant_ops ufs_hba_exynosauto_vh_ops = { @@ -
> 1680,8 +1686,7 @@ static const struct exynos_ufs_drv_data
> exynos_ufs_drvs = {
>  				  UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR |
> 
> UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
> 
> UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL |
> -
> UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING |
> -				  UFSHCD_QUIRK_4KB_DMA_ALIGNMENT,
> +
> UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING,
>  	.opts			= EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL |
> 
> EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
>  				  EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX |
> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index
> 7d07b256e906..e0d6590d163d 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -28,6 +28,7 @@
> 
>  #define UFSHCD "ufshcd"
> 
> +struct scsi_device;
>  struct ufs_hba;
> 
>  enum dev_cmd_type {
> @@ -371,6 +372,7 @@ struct ufs_hba_variant_ops {
>  	int	(*get_outstanding_cqs)(struct ufs_hba *hba,
>  				       unsigned long *ocqs);
>  	int	(*config_esi)(struct ufs_hba *hba);
> +	void	(*config_scsi_dev)(struct scsi_device *sdev);
>  };
> 
>  /* clock gating state  */
> @@ -596,11 +598,6 @@ enum ufshcd_quirks {
>  	 */
>  	UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
> 
> -	/*
> -	 * Align DMA SG entries on a 4 KiB boundary.
> -	 */
> -	UFSHCD_QUIRK_4KB_DMA_ALIGNMENT			= 1 <<
> 14,
> -
>  	/*
>  	 * This quirk needs to be enabled if the host controller does not
>  	 * support UIC command