[PATCH v4 00/16] introduce exynosauto v9 ufs driver

[PATCH v4 00/16] introduce exynosauto v9 ufs driver

[Chanho Park]

In ExynosAuto(variant of the Exynos for automotive), the UFS Storage needs
to be accessed from multi-OS. To increase IO performance and reduce SW
complexity, we implemented UFS-IOV to support storage IO virtualization
feature on UFS.

IO virtualization increases IO performance and reduce SW complexity
with small area cost. And IO virtualization supports virtual machine
isolation for Security and Safety which are requested by Multi-OS system
such as automotive application.

Below figure is the conception of UFS-IOV architeture.

    +------+          +------+
    | OS#1 |          | OS#2 |
    +------+          +------+
       |                 |
 +------------+     +------------+
 |  Physical  |     |   Virtual  |
 |    Host    |     |    Host    |
 +------------+     +------------+
   |      |              | <-- UTP_CMD_SAP, UTP_TM_SAP
   |   +-------------------------+
   |   |    Function Arbitor     |
   |   +-------------------------+
 +-------------------------------+
 |           UTP Layer           |
 +-------------------------------+
 +-------------------------------+
 |           UIC Layer           |
 +-------------------------------+

There are two types of host controllers on the UFS host controller
that we designed.
The UFS device has a Function Arbitor that arranges commands of each host.
When each host transmits a command to the Arbitor, the Arbitor transmits it
to the UTP layer.
Physical Host(PH) support all UFSHCI functions(all SAPs) same as
conventional UFSHCI.
Virtual Host(VH) support only data transfer function(UTP_CMD_SAP and
UTP_TM_SAP).

In an environment where multiple OSs are used, the OS that has the
leadership of the system is called System OS(Dom0). This system OS uses
PH and controls error handling.

Since VH can only use less functions than PH, it is necessary to send a
request to PH for Detected Error Handling in VH. To interface among PH
and VHs, UFSHCI HW supports mailbox. PH can broadcast mail to other VH at
the same time with arguments and VH can mail to PH with arguments.
PH and VH generate interrupts when mails from PH or VH.

In this structure, the virtual host can't support some feature and need
to skip the some part of ufshcd code by using quirk.
This patchs add quirks so that the UIC command is ignored and the ufshcd
init process can be skipped for VH. Also, according to our UFS-IOV policy,

First two patches, I picked them up from Jonmin's patchset[1] and the third
patch has been dropped because we need to check it again.

[1]: https://lore.kernel.org/linux-scsi/20210527030901.88403-1-jjmin.jeong@samsung.com/

Patch 0003 ~ 0013, they are changes of exynos7 ufs driver to apply
exynosauto v9 variant and PH/VH capabilities.
Patch 0014 ~ 0017, the patches introduce exynosauto v9 ufs MHCI which
includes PH and VH.

Changes from v3:
- Drop "[PATCH v3 06/17] scsi: ufs: ufs-exynos: get sysreg regmap for
  io-coherency" and squash it to Patch12
- Patch12: Use macro to avoid raw value usage and describe the value of M-Phy setting
- Patch13: Add dma-coherent property
- Patch14: Use macro to avoid raw value and describe the value of HCI_MH_ALLOWABLE_TRAN_OF_VH

Changes from v2:
- Separate dt-binding patches on top of
  https://lore.kernel.org/linux-devicetree/YUNdqnZ2kYefxFUC@robh.at.kernel.org/

Changes from v1:
- Change quirk name from UFSHCD_QUIRK_SKIP_INTERFACE_CONFIGURATION to
  UFSHCD_QUIRK_SKIP_PH_CONFIGURATION
- Add compatibles to Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
  on top of https://lore.kernel.org/linux-scsi/20200613024706.27975-9-alim.akhtar@samsung.com/

Chanho Park (14):
  scsi: ufs: ufs-exynos: change pclk available max value
  scsi: ufs: ufs-exynos: simplify drv_data retrieval
  scsi: ufs: ufs-exynos: add refclkout_stop control
  scsi: ufs: ufs-exynos: add setup_clocks callback
  scsi: ufs: ufs-exynos: correct timeout value setting registers
  scsi: ufs: ufs-exynos: support custom version of ufs_hba_variant_ops
  scsi: ufs: ufs-exynos: add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option
  scsi: ufs: ufs-exynos: factor out priv data init
  scsi: ufs: ufs-exynos: add pre/post_hce_enable drv callbacks
  scsi: ufs: ufs-exynos: support exynosauto v9 ufs driver
  dt-bindings: ufs: exynos-ufs: add io-coherency property
  scsi: ufs: ufs-exynos: multi-host configuration for exynosauto
  scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host
  dt-bindings: ufs: exynos-ufs: add exynosautov9 compatible

jongmin jeong (2):
  scsi: ufs: add quirk to handle broken UIC command
  scsi: ufs: add quirk to enable host controller without ph
    configuration

 .../bindings/ufs/samsung,exynos-ufs.yaml      |  13 +
 drivers/scsi/ufs/ufs-exynos.c                 | 359 ++++++++++++++++--
 drivers/scsi/ufs/ufs-exynos.h                 |  27 +-
 drivers/scsi/ufs/ufshcd.c                     |   6 +
 drivers/scsi/ufs/ufshcd.h                     |  12 +
 5 files changed, 391 insertions(+), 26 deletions(-)

-- 
2.33.0

[PATCH v4 01/16] scsi: ufs: add quirk to handle broken UIC command

[Chanho Park]

From: jongmin jeong <jjmin.jeong@samsung.com>

samsung ExynosAuto9 SoC has two types of host controller interface to
support the virtualization of UFS Device.
One is the physical host(PH) that the same as conventaional UFSHCI,
and the other is the virtual host(VH) that support data transfer function
only.

In this structure, the virtual host does not support UIC command.
To support this, we add the quirk and return 0 when the UIC command
send function is called.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: James E.J. Bottomley <jejb@linux.ibm.com>
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: jongmin jeong <jjmin.jeong@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufshcd.c | 3 +++
 drivers/scsi/ufs/ufshcd.h | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 188de6f91050..7cf8e688aec8 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -2322,6 +2322,9 @@ int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
 	int ret;
 	unsigned long flags;
 
+	if (hba->quirks & UFSHCD_QUIRK_BROKEN_UIC_CMD)
+		return 0;
+
 	ufshcd_hold(hba, false);
 	mutex_lock(&hba->uic_cmd_mutex);
 	ufshcd_add_delay_before_dme_cmd(hba);
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index f0da5d3db1fa..5d485d65591f 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -588,6 +588,12 @@ enum ufshcd_quirks {
 	 * This quirk allows only sg entries aligned with page size.
 	 */
 	UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE		= 1 << 14,
+
+	/*
+	 * This quirk needs to be enabled if the host controller does not
+	 * support UIC command
+	 */
+	UFSHCD_QUIRK_BROKEN_UIC_CMD			= 1 << 15,
 };
 
 enum ufshcd_caps {
-- 
2.33.0

RE: [PATCH v4 01/16] scsi: ufs: add quirk to handle broken UIC command

[Avri Altman]

> 
> From: jongmin jeong <jjmin.jeong@samsung.com>
> 
> samsung ExynosAuto9 SoC has two types of host controller interface to support
> the virtualization of UFS Device.
> One is the physical host(PH) that the same as conventaional UFSHCI, and the
> other is the virtual host(VH) that support data transfer function only.
> 
> In this structure, the virtual host does not support UIC command.
> To support this, we add the quirk and return 0 when the UIC command send
> function is called.
> 
> Cc: Alim Akhtar <alim.akhtar@samsung.com>
> Cc: James E.J. Bottomley <jejb@linux.ibm.com>
> Cc: Martin K. Petersen <martin.petersen@oracle.com>
> Cc: Bart Van Assche <bvanassche@acm.org>
> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> Signed-off-by: jongmin jeong <jjmin.jeong@samsung.com>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
You forgot to set this quirk / opt for ufs-samsung.

Thanks,
Avri

> ---
>  drivers/scsi/ufs/ufshcd.c | 3 +++
>  drivers/scsi/ufs/ufshcd.h | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index
> 188de6f91050..7cf8e688aec8 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -2322,6 +2322,9 @@ int ufshcd_send_uic_cmd(struct ufs_hba *hba,
> struct uic_command *uic_cmd)
>         int ret;
>         unsigned long flags;
> 
> +       if (hba->quirks & UFSHCD_QUIRK_BROKEN_UIC_CMD)
> +               return 0;
> +
>         ufshcd_hold(hba, false);
>         mutex_lock(&hba->uic_cmd_mutex);
>         ufshcd_add_delay_before_dme_cmd(hba);
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index
> f0da5d3db1fa..5d485d65591f 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -588,6 +588,12 @@ enum ufshcd_quirks {
>          * This quirk allows only sg entries aligned with page size.
>          */
>         UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE            = 1 << 14,
> +
> +       /*
> +        * This quirk needs to be enabled if the host controller does not
> +        * support UIC command
> +        */
> +       UFSHCD_QUIRK_BROKEN_UIC_CMD                     = 1 << 15,
>  };
> 
>  enum ufshcd_caps {
> --
> 2.33.0

[PATCH v4 02/16] scsi: ufs: add quirk to enable host controller without ph configuration

[Chanho Park]

From: jongmin jeong <jjmin.jeong@samsung.com>

samsung ExynosAuto SoC has two types of host controller interface to
support the virtualization of UFS Device.
One is the physical host(PH) that the same as conventaional UFSHCI,
and the other is the virtual host(VH) that support data transfer function only.

In this structure, the virtual host does not support like device management.
This patch skips the physical host interface configuration part that cannot
be performed in the virtual host.

Suggested-by: Alim Akhtar <alim.akhtar@samsung.com>
Cc: James E.J. Bottomley <jejb@linux.ibm.com>
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: jongmin jeong <jjmin.jeong@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufshcd.c | 3 +++
 drivers/scsi/ufs/ufshcd.h | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 7cf8e688aec8..aec18ce203b9 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -8053,6 +8053,9 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params)
 	if (ret)
 		goto out;
 
+	if (hba->quirks & UFSHCD_QUIRK_SKIP_PH_CONFIGURATION)
+		goto out;
+
 	/* Debug counters initialization */
 	ufshcd_clear_dbg_ufs_stats(hba);
 
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index 5d485d65591f..aceaedcc1558 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -594,6 +594,12 @@ enum ufshcd_quirks {
 	 * support UIC command
 	 */
 	UFSHCD_QUIRK_BROKEN_UIC_CMD			= 1 << 15,
+
+	/*
+	 * This quirk needs to be enabled if the host controller cannot
+	 * support physical host configuration.
+	 */
+	UFSHCD_QUIRK_SKIP_PH_CONFIGURATION		= 1 << 16,
 };
 
 enum ufshcd_caps {
-- 
2.33.0

RE: [PATCH v4 02/16] scsi: ufs: add quirk to enable host controller without ph configuration

[Avri Altman]

> 
> From: jongmin jeong <jjmin.jeong@samsung.com>
> 
> samsung ExynosAuto SoC has two types of host controller interface to support
> the virtualization of UFS Device.
> One is the physical host(PH) that the same as conventaional UFSHCI, and the
> other is the virtual host(VH) that support data transfer function only.
> 
> In this structure, the virtual host does not support like device management.
> This patch skips the physical host interface configuration part that cannot be
> performed in the virtual host.
> 
> Suggested-by: Alim Akhtar <alim.akhtar@samsung.com>
> Cc: James E.J. Bottomley <jejb@linux.ibm.com>
> Cc: Martin K. Petersen <martin.petersen@oracle.com>
> Cc: Bart Van Assche <bvanassche@acm.org>
> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> Signed-off-by: jongmin jeong <jjmin.jeong@samsung.com>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
You forgot to set this quirk / opt for ufs-samsung.

Thanks,
Avri


> ---
>  drivers/scsi/ufs/ufshcd.c | 3 +++
>  drivers/scsi/ufs/ufshcd.h | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index
> 7cf8e688aec8..aec18ce203b9 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -8053,6 +8053,9 @@ static int ufshcd_probe_hba(struct ufs_hba *hba,
> bool init_dev_params)
>         if (ret)
>                 goto out;
> 
> +       if (hba->quirks & UFSHCD_QUIRK_SKIP_PH_CONFIGURATION)
> +               goto out;
> +
>         /* Debug counters initialization */
>         ufshcd_clear_dbg_ufs_stats(hba);
> 
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index
> 5d485d65591f..aceaedcc1558 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -594,6 +594,12 @@ enum ufshcd_quirks {
>          * support UIC command
>          */
>         UFSHCD_QUIRK_BROKEN_UIC_CMD                     = 1 << 15,
> +
> +       /*
> +        * This quirk needs to be enabled if the host controller cannot
> +        * support physical host configuration.
> +        */
> +       UFSHCD_QUIRK_SKIP_PH_CONFIGURATION              = 1 << 16,
>  };
> 
>  enum ufshcd_caps {
> --
> 2.33.0

[PATCH v4 03/16] scsi: ufs: ufs-exynos: change pclk available max value

[Chanho Park]

To support 167MHz PCLK, we need to adjust the maximum value.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index dadf4fd10dd8..0a31f77a5f48 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -99,7 +99,7 @@ struct exynos_ufs;
 #define PA_HIBERN8TIME_VAL	0x20
 
 #define PCLK_AVAIL_MIN	70000000
-#define PCLK_AVAIL_MAX	133000000
+#define PCLK_AVAIL_MAX	167000000
 
 struct exynos_ufs_uic_attr {
 	/* TX Attributes */
-- 
2.33.0

[PATCH v4 04/16] scsi: ufs: ufs-exynos: simplify drv_data retrieval

[Chanho Park]

The compatible field of exynos_ufs_drv_data is not necessary because
of_device_id already has it. Thus, we don't need it anymore and we can
get drv_data by device_get_match_data.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 10 +---------
 drivers/scsi/ufs/ufs-exynos.h |  3 +--
 2 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index a14dd8ce56d4..8a17ba32a721 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -893,17 +893,10 @@ static int exynos_ufs_post_link(struct ufs_hba *hba)
 static int exynos_ufs_parse_dt(struct device *dev, struct exynos_ufs *ufs)
 {
 	struct device_node *np = dev->of_node;
-	struct exynos_ufs_drv_data *drv_data = &exynos_ufs_drvs;
 	struct exynos_ufs_uic_attr *attr;
 	int ret = 0;
 
-	while (drv_data->compatible) {
-		if (of_device_is_compatible(np, drv_data->compatible)) {
-			ufs->drv_data = drv_data;
-			break;
-		}
-		drv_data++;
-	}
+	ufs->drv_data = device_get_match_data(dev);
 
 	if (ufs->drv_data && ufs->drv_data->uic_attr) {
 		attr = ufs->drv_data->uic_attr;
@@ -1258,7 +1251,6 @@ static struct exynos_ufs_uic_attr exynos7_uic_attr = {
 };
 
 static struct exynos_ufs_drv_data exynos_ufs_drvs = {
-	.compatible		= "samsung,exynos7-ufs",
 	.uic_attr		= &exynos7_uic_attr,
 	.quirks			= UFSHCD_QUIRK_PRDT_BYTE_GRAN |
 				  UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR |
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 0a31f77a5f48..2e72aabaa673 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -142,7 +142,6 @@ struct exynos_ufs_uic_attr {
 };
 
 struct exynos_ufs_drv_data {
-	char *compatible;
 	struct exynos_ufs_uic_attr *uic_attr;
 	unsigned int quirks;
 	unsigned int opts;
@@ -191,7 +190,7 @@ struct exynos_ufs {
 	struct ufs_pa_layer_attr dev_req_params;
 	struct ufs_phy_time_cfg t_cfg;
 	ktime_t entry_hibern8_t;
-	struct exynos_ufs_drv_data *drv_data;
+	const struct exynos_ufs_drv_data *drv_data;
 
 	u32 opts;
 #define EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL		BIT(0)
-- 
2.33.0

[PATCH v4 05/16] scsi: ufs: ufs-exynos: add refclkout_stop control

[Chanho Park]

This patch adds REFCLKOUT_STOP control to CLK_STOP_MASK. It can
en/disable reference clock out control for UFS device.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 8a17ba32a721..37a4ab4cc662 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -48,10 +48,11 @@
 #define HCI_ERR_EN_T_LAYER	0x84
 #define HCI_ERR_EN_DME_LAYER	0x88
 #define HCI_CLKSTOP_CTRL	0xB0
+#define REFCLKOUT_STOP		BIT(4)
 #define REFCLK_STOP		BIT(2)
 #define UNIPRO_MCLK_STOP	BIT(1)
 #define UNIPRO_PCLK_STOP	BIT(0)
-#define CLK_STOP_MASK		(REFCLK_STOP |\
+#define CLK_STOP_MASK		(REFCLKOUT_STOP | REFCLK_STOP |\
 				 UNIPRO_MCLK_STOP |\
 				 UNIPRO_PCLK_STOP)
 #define HCI_MISC		0xB4
-- 
2.33.0

[PATCH v4 06/16] scsi: ufs: ufs-exynos: add setup_clocks callback

[Chanho Park]

This patch adds setup_clocks callback to control/gate clocks by ufshcd.
To avoid calling before initialization, it needs to check whether ufs is
null or not and call it initially from pre_link callback.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 37a4ab4cc662..e800fb9e1ce4 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -794,6 +794,27 @@ static void exynos_ufs_config_intr(struct exynos_ufs *ufs, u32 errs, u8 index)
 	}
 }
 
+static int exynos_ufs_setup_clocks(struct ufs_hba *hba, bool on,
+				   enum ufs_notify_change_status status)
+{
+	struct exynos_ufs *ufs = ufshcd_get_variant(hba);
+
+	if (!ufs)
+		return 0;
+
+	if (on && status == PRE_CHANGE) {
+		if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL)
+			exynos_ufs_disable_auto_ctrl_hcc(ufs);
+		exynos_ufs_ungate_clks(ufs);
+	} else if (!on && status == POST_CHANGE) {
+		exynos_ufs_gate_clks(ufs);
+		if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL)
+			exynos_ufs_enable_auto_ctrl_hcc(ufs);
+	}
+
+	return 0;
+}
+
 static int exynos_ufs_pre_link(struct ufs_hba *hba)
 {
 	struct exynos_ufs *ufs = ufshcd_get_variant(hba);
@@ -812,6 +833,8 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba)
 	exynos_ufs_config_phy_time_attr(ufs);
 	exynos_ufs_config_phy_cap_attr(ufs);
 
+	exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
+
 	if (ufs->drv_data->pre_link)
 		ufs->drv_data->pre_link(ufs);
 
@@ -1198,6 +1221,7 @@ static struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
 	.hce_enable_notify		= exynos_ufs_hce_enable_notify,
 	.link_startup_notify		= exynos_ufs_link_startup_notify,
 	.pwr_change_notify		= exynos_ufs_pwr_change_notify,
+	.setup_clocks			= exynos_ufs_setup_clocks,
 	.setup_xfer_req			= exynos_ufs_specify_nexus_t_xfer_req,
 	.setup_task_mgmt		= exynos_ufs_specify_nexus_t_tm_req,
 	.hibern8_notify			= exynos_ufs_hibern8_notify,
-- 
2.33.0

[PATCH v4 07/16] scsi: ufs: ufs-exynos: correct timeout value setting registers

[Chanho Park]

PA_PWRMODEUSERDATA0 -> DL_FC0PROTTIMEOUTVAL
PA_PWRMODEUSERDATA1 -> DL_TC0REPLAYTIMEOUTVAL
PA_PWRMODEUSERDATA2 -> DL_AFC0REQTIMEOUTVAL

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Fixes: a967ddb22d94 ("scsi: ufs: ufs-exynos: Apply vendor-specific values for three timeouts")
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index e800fb9e1ce4..41797f499544 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -643,9 +643,9 @@ static int exynos_ufs_pre_pwr_mode(struct ufs_hba *hba,
 	}
 
 	/* setting for three timeout values for traffic class #0 */
-	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 8064);
-	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 28224);
-	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 20160);
+	ufshcd_dme_set(hba, UIC_ARG_MIB(DL_FC0PROTTIMEOUTVAL), 8064);
+	ufshcd_dme_set(hba, UIC_ARG_MIB(DL_TC0REPLAYTIMEOUTVAL), 28224);
+	ufshcd_dme_set(hba, UIC_ARG_MIB(DL_AFC0REQTIMEOUTVAL), 20160);
 
 	return 0;
 out:
-- 
2.33.0

RE: [PATCH v4 07/16] scsi: ufs: ufs-exynos: correct timeout value setting registers

[Avri Altman]

> 
> PA_PWRMODEUSERDATA0 -> DL_FC0PROTTIMEOUTVAL
> PA_PWRMODEUSERDATA1 -> DL_TC0REPLAYTIMEOUTVAL
> PA_PWRMODEUSERDATA2 -> DL_AFC0REQTIMEOUTVAL
Is there a specific reason why this fix is part of the exynosauto series?

Thanks,
Avri

RE: [PATCH v4 07/16] scsi: ufs: ufs-exynos: correct timeout value setting registers

[Chanho Park]

Hi, Thanks for your review.

> -----Original Message-----
> From: Avri Altman <Avri.Altman@wdc.com>
> Sent: Thursday, October 14, 2021 9:12 PM
> To: Chanho Park <chanho61.park@samsung.com>; Alim Akhtar
> <alim.akhtar@samsung.com>; James E . J . Bottomley <jejb@linux.ibm.com>;
> Martin K . Petersen <martin.petersen@oracle.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski@canonical.com>
> Cc: Bean Huo <beanhuo@micron.com>; Bart Van Assche <bvanassche@acm.org>;
> Adrian Hunter <adrian.hunter@intel.com>; hch@infradead.org; Can Guo
> <cang@codeaurora.org>; Jaegeuk Kim <jaegeuk@kernel.org>; Jaehoon Chung
> <jh80.chung@samsung.com>; Gyunghoon Kwon <goodjob.kwon@samsung.com>; Sowon
> Na <sowon.na@samsung.com>; linux-samsung-soc@vger.kernel.org; linux-
> scsi@vger.kernel.org; Kiwoong Kim <kwmad.kim@samsung.com>
> Subject: RE: [PATCH v4 07/16] scsi: ufs: ufs-exynos: correct timeout value
> setting registers
> 
> >
> > PA_PWRMODEUSERDATA0 -> DL_FC0PROTTIMEOUTVAL
> > PA_PWRMODEUSERDATA1 -> DL_TC0REPLAYTIMEOUTVAL
> > PA_PWRMODEUSERDATA2 -> DL_AFC0REQTIMEOUTVAL
> Is there a specific reason why this fix is part of the exynosauto series?

I found the issue when I made the patches with some refactoring of ufs-exynos driver.
I can send it separately.

Best Regards,
Chanho Park

[PATCH v4 08/16] scsi: ufs: ufs-exynos: support custom version of ufs_hba_variant_ops

[Chanho Park]

By default, ufs_hba_exynos_ops will be used but this patch supports to
use custom version of ufs_hba_variant_ops because some variants of
exynos-ufs will use only few callbacks.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 8 +++++++-
 drivers/scsi/ufs/ufs-exynos.h | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 41797f499544..8df792071a0a 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -1233,8 +1233,14 @@ static int exynos_ufs_probe(struct platform_device *pdev)
 {
 	int err;
 	struct device *dev = &pdev->dev;
+	const struct ufs_hba_variant_ops *vops = &ufs_hba_exynos_ops;
+	const struct exynos_ufs_drv_data *drv_data =
+		device_get_match_data(dev);
 
-	err = ufshcd_pltfrm_init(pdev, &ufs_hba_exynos_ops);
+	if (drv_data && drv_data->vops)
+		vops = drv_data->vops;
+
+	err = ufshcd_pltfrm_init(pdev, vops);
 	if (err)
 		dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err);
 
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 2e72aabaa673..74f556d8a003 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -142,6 +142,7 @@ struct exynos_ufs_uic_attr {
 };
 
 struct exynos_ufs_drv_data {
+	const struct ufs_hba_variant_ops *vops;
 	struct exynos_ufs_uic_attr *uic_attr;
 	unsigned int quirks;
 	unsigned int opts;
-- 
2.33.0

[PATCH v4 09/16] scsi: ufs: ufs-exynos: add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option

[Chanho Park]

To skip exynos_ufs_config_phy_*_attr settings for exynos-ufs variant,
this patch provides EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR as an opts
flag. Regarding exynosauto v9 SoC's controller, M-Phy timinig setting is
not required and most of vendor specific configurations will be
configured on pre_link callback function.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 6 ++++--
 drivers/scsi/ufs/ufs-exynos.h | 1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 8df792071a0a..72ab98d42dc8 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -830,8 +830,10 @@ static int exynos_ufs_pre_link(struct ufs_hba *hba)
 
 	/* m-phy */
 	exynos_ufs_phy_init(ufs);
-	exynos_ufs_config_phy_time_attr(ufs);
-	exynos_ufs_config_phy_cap_attr(ufs);
+	if (!(ufs->opts & EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR)) {
+		exynos_ufs_config_phy_time_attr(ufs);
+		exynos_ufs_config_phy_cap_attr(ufs);
+	}
 
 	exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
 
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 74f556d8a003..89955ae226dc 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -199,6 +199,7 @@ struct exynos_ufs {
 #define EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL	BIT(2)
 #define EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX	BIT(3)
 #define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER	BIT(4)
+#define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR	BIT(5)
 };
 
 #define for_each_ufs_rx_lane(ufs, i) \
-- 
2.33.0

[PATCH v4 10/16] scsi: ufs: ufs-exynos: factor out priv data init

[Chanho Park]

To be used this assignment code for other variant exynos-ufs driver,
this patch factors out the codes as inline code.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 72ab98d42dc8..2dae90758f8f 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -946,6 +946,18 @@ static int exynos_ufs_parse_dt(struct device *dev, struct exynos_ufs *ufs)
 	return ret;
 }
 
+static inline void exynos_ufs_priv_init(struct ufs_hba *hba,
+					struct exynos_ufs *ufs)
+{
+	ufs->hba = hba;
+	ufs->opts = ufs->drv_data->opts;
+	ufs->rx_sel_idx = PA_MAXDATALANES;
+	if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX)
+		ufs->rx_sel_idx = 0;
+	hba->priv = (void *)ufs;
+	hba->quirks = ufs->drv_data->quirks;
+}
+
 static int exynos_ufs_init(struct ufs_hba *hba)
 {
 	struct device *dev = hba->dev;
@@ -995,13 +1007,8 @@ static int exynos_ufs_init(struct ufs_hba *hba)
 	if (ret)
 		goto phy_off;
 
-	ufs->hba = hba;
-	ufs->opts = ufs->drv_data->opts;
-	ufs->rx_sel_idx = PA_MAXDATALANES;
-	if (ufs->opts & EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX)
-		ufs->rx_sel_idx = 0;
-	hba->priv = (void *)ufs;
-	hba->quirks = ufs->drv_data->quirks;
+	exynos_ufs_priv_init(hba, ufs);
+
 	if (ufs->drv_data->drv_init) {
 		ret = ufs->drv_data->drv_init(dev, ufs);
 		if (ret) {
-- 
2.33.0

[PATCH v4 11/16] scsi: ufs: ufs-exynos: add pre/post_hce_enable drv callbacks

[Chanho Park]

This patch adds driver-specific pre/post_hce_enable callbacks to execute
extra initializations before and after hce_enable_notify callback.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 10 ++++++++++
 drivers/scsi/ufs/ufs-exynos.h |  2 ++
 2 files changed, 12 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 2dae90758f8f..ae85942c08ae 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -1136,6 +1136,12 @@ static int exynos_ufs_hce_enable_notify(struct ufs_hba *hba,
 
 	switch (status) {
 	case PRE_CHANGE:
+		if (ufs->drv_data->pre_hce_enable) {
+			ret = ufs->drv_data->pre_hce_enable(ufs);
+			if (ret)
+				return ret;
+		}
+
 		ret = exynos_ufs_host_reset(hba);
 		if (ret)
 			return ret;
@@ -1145,6 +1151,10 @@ static int exynos_ufs_hce_enable_notify(struct ufs_hba *hba,
 		exynos_ufs_calc_pwm_clk_div(ufs);
 		if (!(ufs->opts & EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL))
 			exynos_ufs_enable_auto_ctrl_hcc(ufs);
+
+		if (ufs->drv_data->post_hce_enable)
+			ret = ufs->drv_data->post_hce_enable(ufs);
+
 		break;
 	}
 
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 89955ae226dc..02308faea422 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -154,6 +154,8 @@ struct exynos_ufs_drv_data {
 				struct ufs_pa_layer_attr *pwr);
 	int (*post_pwr_change)(struct exynos_ufs *ufs,
 				struct ufs_pa_layer_attr *pwr);
+	int (*pre_hce_enable)(struct exynos_ufs *ufs);
+	int (*post_hce_enable)(struct exynos_ufs *ufs);
 };
 
 struct ufs_phy_time_cfg {
-- 
2.33.0

[PATCH v4 12/16] scsi: ufs: ufs-exynos: support exynosauto v9 ufs driver

[Chanho Park]

This patch adds to support ufs variant for ExynosAuto v9 SoC. This
requires control UFS IP sharability register via syscon and regmap.
The offset of the register can be different according to the ufs
instance and SoC specific offset value. So, we need to get the offset
value from DT property.
Unlike exynos7, it has different m-phy setting so it can be configured
by exynosauto_ufs_pre_link.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 119 ++++++++++++++++++++++++++++++++++
 drivers/scsi/ufs/ufs-exynos.h |  18 +++++
 2 files changed, 137 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index ae85942c08ae..9d32f19395b8 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -12,8 +12,10 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/mfd/syscon.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 
 #include "ufshcd.h"
 #include "ufshcd-pltfrm.h"
@@ -75,6 +77,12 @@
 				 UIC_TRANSPORT_NO_CONNECTION_RX |\
 				 UIC_TRANSPORT_BAD_TC)
 
+/* FSYS UFS Shareability */
+#define UFS_WR_SHARABLE		BIT(2)
+#define UFS_RD_SHARABLE		BIT(1)
+#define UFS_SHARABLE		(UFS_WR_SHARABLE | UFS_RD_SHARABLE)
+#define UFS_SHAREABILITY_OFFSET	0x710
+
 enum {
 	UNIPRO_L1_5 = 0,/* PHY Adapter */
 	UNIPRO_L2,	/* Data Link */
@@ -150,6 +158,89 @@ static int exynos7_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
 	return 0;
 }
 
+static int exynosauto_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
+{
+	struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
+
+	/* IO Coherency setting */
+	if (ufs->sysreg) {
+		return regmap_update_bits(ufs->sysreg,
+					  ufs->shareability_reg_offset,
+					  UFS_SHARABLE, UFS_SHARABLE);
+	}
+
+	attr->tx_dif_p_nsec = 3200000;
+
+	return 0;
+}
+
+static int exynosauto_ufs_pre_link(struct exynos_ufs *ufs)
+{
+	struct ufs_hba *hba = ufs->hba;
+	int i;
+	u32 tx_line_reset_period, rx_line_reset_period;
+
+	rx_line_reset_period = (RX_LINE_RESET_TIME * ufs->mclk_rate) / NSEC_PER_MSEC;
+	tx_line_reset_period = (TX_LINE_RESET_TIME * ufs->mclk_rate) / NSEC_PER_MSEC;
+
+	ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40);
+	for_each_ufs_rx_lane(ufs, i) {
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_RX_CLK_PRD, i),
+			       DIV_ROUND_UP(NSEC_PER_SEC, ufs->mclk_rate));
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_RX_CLK_PRD_EN, i), 0x0);
+
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_RX_LINERESET_VALUE2, i),
+			       (rx_line_reset_period >> 16) & 0xFF);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_RX_LINERESET_VALUE1, i),
+			       (rx_line_reset_period >> 8) & 0xFF);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_RX_LINERESET_VALUE0, i),
+			       (rx_line_reset_period) & 0xFF);
+
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x2f, i), 0x79);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x84, i), 0x1);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x25, i), 0xf6);
+	}
+
+	for_each_ufs_tx_lane(ufs, i) {
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_TX_CLK_PRD, i),
+			       DIV_ROUND_UP(NSEC_PER_SEC, ufs->mclk_rate));
+		/* Not to affect VND_TX_LINERESET_PVALUE to VND_TX_CLK_PRD */
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_TX_CLK_PRD_EN, i),
+			       0x02);
+
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_TX_LINERESET_PVALUE2, i),
+			       (tx_line_reset_period >> 16) & 0xFF);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_TX_LINERESET_PVALUE1, i),
+			       (tx_line_reset_period >> 8) & 0xFF);
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(VND_TX_LINERESET_PVALUE0, i),
+			       (tx_line_reset_period) & 0xFF);
+
+		/* TX PWM Gear Capability / PWM_G1_ONLY */
+		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x04, i), 0x1);
+	}
+
+	ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0);
+
+	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0);
+
+	ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000);
+
+	return 0;
+}
+
+static int exynosauto_ufs_pre_pwr_change(struct exynos_ufs *ufs,
+					 struct ufs_pa_layer_attr *pwr)
+{
+	struct ufs_hba *hba = ufs->hba;
+
+	/* PACP_PWR_req and delivered to the remote DME */
+	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000);
+	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000);
+	ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000);
+
+	return 0;
+}
+
 static int exynos7_ufs_pre_link(struct exynos_ufs *ufs)
 {
 	struct ufs_hba *hba = ufs->hba;
@@ -932,6 +1023,18 @@ static int exynos_ufs_parse_dt(struct device *dev, struct exynos_ufs *ufs)
 		goto out;
 	}
 
+	ufs->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
+	if (IS_ERR(ufs->sysreg))
+		ufs->sysreg = NULL;
+	else {
+		if (of_property_read_u32(np,
+					 "samsung,ufs-shareability-reg-offset",
+					 &ufs->shareability_reg_offset)) {
+			dev_warn(dev, "ufs-shareability-reg-offset is not specified. Set to default value\n");
+			ufs->shareability_reg_offset = UFS_SHAREABILITY_OFFSET;
+		}
+	}
+
 	ufs->pclk_avail_min = PCLK_AVAIL_MIN;
 	ufs->pclk_avail_max = PCLK_AVAIL_MAX;
 
@@ -1300,6 +1403,20 @@ static struct exynos_ufs_uic_attr exynos7_uic_attr = {
 	.pa_dbg_option_suite		= 0x30103,
 };
 
+static struct exynos_ufs_drv_data exynosauto_ufs_drvs = {
+	.uic_attr		= &exynos7_uic_attr,
+	.quirks			= UFSHCD_QUIRK_PRDT_BYTE_GRAN |
+				  UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR |
+				  UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
+				  UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING,
+	.opts			= EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
+				  EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
+				  EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
+	.drv_init		= exynosauto_ufs_drv_init,
+	.pre_link		= exynosauto_ufs_pre_link,
+	.pre_pwr_change		= exynosauto_ufs_pre_pwr_change,
+};
+
 static struct exynos_ufs_drv_data exynos_ufs_drvs = {
 	.uic_attr		= &exynos7_uic_attr,
 	.quirks			= UFSHCD_QUIRK_PRDT_BYTE_GRAN |
@@ -1325,6 +1442,8 @@ static struct exynos_ufs_drv_data exynos_ufs_drvs = {
 static const struct of_device_id exynos_ufs_of_match[] = {
 	{ .compatible = "samsung,exynos7-ufs",
 	  .data	      = &exynos_ufs_drvs },
+	{ .compatible = "samsung,exynosautov9-ufs",
+	  .data	      = &exynosauto_ufs_drvs },
 	{},
 };
 
diff --git a/drivers/scsi/ufs/ufs-exynos.h b/drivers/scsi/ufs/ufs-exynos.h
index 02308faea422..1c33e5466082 100644
--- a/drivers/scsi/ufs/ufs-exynos.h
+++ b/drivers/scsi/ufs/ufs-exynos.h
@@ -56,6 +56,22 @@
 #define TX_GRAN_NVAL_10_08	0x0296
 #define TX_GRAN_NVAL_H(v)	(((v) >> 8) & 0x3)
 
+#define VND_TX_CLK_PRD		0xAA
+#define VND_TX_CLK_PRD_EN	0xA9
+#define VND_TX_LINERESET_PVALUE0	0xAD
+#define VND_TX_LINERESET_PVALUE1	0xAC
+#define VND_TX_LINERESET_PVALUE2	0xAB
+
+#define TX_LINE_RESET_TIME	3200
+
+#define VND_RX_CLK_PRD		0x12
+#define VND_RX_CLK_PRD_EN	0x11
+#define VND_RX_LINERESET_VALUE0	0x1D
+#define VND_RX_LINERESET_VALUE1	0x1C
+#define VND_RX_LINERESET_VALUE2	0x1B
+
+#define RX_LINE_RESET_TIME	1000
+
 #define RX_FILLER_ENABLE	0x0316
 #define RX_FILLER_EN		(1 << 1)
 #define RX_LINERESET_VAL	0x0317
@@ -194,6 +210,8 @@ struct exynos_ufs {
 	struct ufs_phy_time_cfg t_cfg;
 	ktime_t entry_hibern8_t;
 	const struct exynos_ufs_drv_data *drv_data;
+	struct regmap *sysreg;
+	u32 shareability_reg_offset;
 
 	u32 opts;
 #define EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL		BIT(0)
-- 
2.33.0

[PATCH v4 13/16] dt-bindings: ufs: exynos-ufs: add io-coherency property

[Chanho Park]

Add "samsung,sysreg" regmap and the offset to the ufs shareaibility
register for setting io coherency of the samsung ufs. "dma-coherent"
property is also required because the driver code needs to know.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml   | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index b9ca8ef4f2be..d9b7535b872f 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -54,6 +54,17 @@ properties:
   phy-names:
     const: ufs-phy
 
+  samsung,sysreg:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description: phandle for FSYSx sysreg interface, used to control
+                 sysreg register bit for UFS IO Coherency
+
+  samsung,ufs-shareability-reg-offset:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description: Offset to the shareability register for io-coherency
+
+  dma-coherent: true
+
 required:
   - compatible
   - reg
-- 
2.33.0

Re: [PATCH v4 13/16] dt-bindings: ufs: exynos-ufs: add io-coherency property

[Rob Herring]

On Thu, Oct 07, 2021 at 05:09:31PM +0900, Chanho Park wrote:
> Add "samsung,sysreg" regmap and the offset to the ufs shareaibility
> register for setting io coherency of the samsung ufs. "dma-coherent"
> property is also required because the driver code needs to know.
> 
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml   | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
> index b9ca8ef4f2be..d9b7535b872f 100644
> --- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
> @@ -54,6 +54,17 @@ properties:
>    phy-names:
>      const: ufs-phy
>  
> +  samsung,sysreg:
> +    $ref: '/schemas/types.yaml#/definitions/phandle'
> +    description: phandle for FSYSx sysreg interface, used to control
> +                 sysreg register bit for UFS IO Coherency
> +
> +  samsung,ufs-shareability-reg-offset:
> +    $ref: '/schemas/types.yaml#/definitions/uint32'
> +    description: Offset to the shareability register for io-coherency

Make these a single property: <phandle offset>

> +
> +  dma-coherent: true
> +
>  required:
>    - compatible
>    - reg
> -- 
> 2.33.0
> 
> 

RE: [PATCH v4 13/16] dt-bindings: ufs: exynos-ufs: add io-coherency property

[Chanho Park]

> > +  samsung,sysreg:
> > +    $ref: '/schemas/types.yaml#/definitions/phandle'
> > +    description: phandle for FSYSx sysreg interface, used to control
> > +                 sysreg register bit for UFS IO Coherency
> > +
> > +  samsung,ufs-shareability-reg-offset:
> > +    $ref: '/schemas/types.yaml#/definitions/uint32'
> > +    description: Offset to the shareability register for io-coherency
> 
> Make these a single property: <phandle offset>

As I already mentioned previous e-mail [1], I need to support two ufs
instances for exynosauto v9 soc.

syscon_fsys2: syscon@17c20000 {
	compatible = "samsung,exynosautov9-sysreg", "syscon";
	reg = <0x17c20000 0x1000>;
};

ufs_0: ufs0@17e00000 {
	<snip>
	samsung,sysreg = <&syscon_fsys2>;
	samsung,ufs-shareability-reg-offset = <0x710>;
};

To be added ufs_1 like below
ufs_1: ufs0@17f00000 {
	<snip>
	samsung,sysreg = <&syscon_fsys2>;
	samsung,ufs-shareability-reg-offset = <0x714>;
};

[1]:
https://lore.kernel.org/linux-scsi/000901d7b0e0$e618b220$b24a1660$@samsung.c
om/

If you prefer them to be separated sysreg phandles which directly pointing
the register, I'm able to change it.
But, the syscon_fsys2 can be used for other IPs as well such as ethernet.

Best Regards,
Chanho Park

Re: [PATCH v4 13/16] dt-bindings: ufs: exynos-ufs: add io-coherency property

[Rob Herring]

On Sun, Oct 17, 2021 at 7:27 PM Chanho Park <chanho61.park@samsung.com> wrote:
>
> > > +  samsung,sysreg:
> > > +    $ref: '/schemas/types.yaml#/definitions/phandle'
> > > +    description: phandle for FSYSx sysreg interface, used to control
> > > +                 sysreg register bit for UFS IO Coherency
> > > +
> > > +  samsung,ufs-shareability-reg-offset:
> > > +    $ref: '/schemas/types.yaml#/definitions/uint32'
> > > +    description: Offset to the shareability register for io-coherency
> >
> > Make these a single property: <phandle offset>
>
> As I already mentioned previous e-mail [1], I need to support two ufs
> instances for exynosauto v9 soc.

Don't expect me to remember. That was 100s of reviews ago.

>
> syscon_fsys2: syscon@17c20000 {
>         compatible = "samsung,exynosautov9-sysreg", "syscon";
>         reg = <0x17c20000 0x1000>;
> };
>
> ufs_0: ufs0@17e00000 {
>         <snip>
>         samsung,sysreg = <&syscon_fsys2>;
>         samsung,ufs-shareability-reg-offset = <0x710>;

samsung,ufs-shareability-reg = <&syscon_fsys2 0x710>;

> };
>
> To be added ufs_1 like below
> ufs_1: ufs0@17f00000 {
>         <snip>
>         samsung,sysreg = <&syscon_fsys2>;
>         samsung,ufs-shareability-reg-offset = <0x714>;

samsung,ufs-shareability-reg = <&syscon_fsys2 0x714>;

I still don't see what's the problem?

> };
>
> [1]:
> https://lore.kernel.org/linux-scsi/000901d7b0e0$e618b220$b24a1660$@samsung.c
> om/
>
> If you prefer them to be separated sysreg phandles which directly pointing
> the register, I'm able to change it.
> But, the syscon_fsys2 can be used for other IPs as well such as ethernet.
>
> Best Regards,
> Chanho Park
>

RE: [PATCH v4 13/16] dt-bindings: ufs: exynos-ufs: add io-coherency property

[Chanho Park]

> > > +  samsung,sysreg:
> > > +    $ref: '/schemas/types.yaml#/definitions/phandle'
> > > +    description: phandle for FSYSx sysreg interface, used to control
> > > +                 sysreg register bit for UFS IO Coherency
> > > +
> > > +  samsung,ufs-shareability-reg-offset:
> > > +    $ref: '/schemas/types.yaml#/definitions/uint32'
> > > +    description: Offset to the shareability register for
> > > + io-coherency
> >
> > Make these a single property: <phandle offset>
> 
> As I already mentioned previous e-mail [1], I need to support two ufs
> instances for exynosauto v9 soc.
> 
> syscon_fsys2: syscon@17c20000 {
> 	compatible = "samsung,exynosautov9-sysreg", "syscon";
> 	reg = <0x17c20000 0x1000>;
> };
> 
> ufs_0: ufs0@17e00000 {
> 	<snip>
> 	samsung,sysreg = <&syscon_fsys2>;
> 	samsung,ufs-shareability-reg-offset = <0x710>; };
> 
> To be added ufs_1 like below
> ufs_1: ufs0@17f00000 {
> 	<snip>
> 	samsung,sysreg = <&syscon_fsys2>;
> 	samsung,ufs-shareability-reg-offset = <0x714>; };
> 
> [1]: https://lore.kernel.org/linux-
> scsi/000901d7b0e0$e618b220$b24a1660$@samsung.com/
> 
> If you prefer them to be separated sysreg phandles which directly pointing
> the register, I'm able to change it.
> But, the syscon_fsys2 can be used for other IPs as well such as ethernet.

Finally, I got your point. You want me to drop
"samsung,ufs-shareability-reg-offset" and put the offset like below.

ufs_0: ufs0@17e00000 {
 	<snip>
 	samsung,sysreg = <&syscon_fsys2 0x710>;

To be added ufs_1 like below
ufs_1: ufs0@17f00000 {
 	<snip>
 	samsung,sysreg = <&syscon_fsys2 0x714>;

I'll resend the patch with your suggestion.

Krzysztof, could you please hold below on? Or Do I need to make an
additional patch?
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/commit/?h=nex
t/dt64&id=31bbac5263aa63dfc8bfed2180bb6a5a3c531681

Best Regards,
Chanho Park

[PATCH v4 14/16] scsi: ufs: ufs-exynos: multi-host configuration for exynosauto

[Chanho Park]

UFS controller of ExynosAuto v9 SoC supports multi-host interface for I/O
virtualization. In general, we're using para-virtualized driver to
support a block device by several virtual machines. However, it should
be relayed by backend driver. Multi-host functionality extends the host
controller by providing register interfaces that can be used by each
VM's ufs drivers respectively. By this, we can provide direct access to
the UFS device for multiple VMs. It's similar with SR-IOV of PCIe.

We divide this M-HCI as PH(Physical Host) and VHs(Virtual Host). The PH
supports all UFSHCI functions(all SAPs) same as conventional UFSHCI but
the VH only supports data transfer function. Thus, except UTP_CMD_SAP and
UTP_TMPSAP, the PH should handle all the physical features.

This patch provides an initial implementation of PH part. M-HCI can
support up to four interfaces but this patch initially supports only 1
PH and 1 VH. For this, we uses TASK_TAG[7:5] field so TASK_TAG[4:0] for
32 doorbel will be supported. After the PH is initiated, this will send
a ready message to VHs through a mailbox register. The message handler
is not fully implemented yet such as supporting reset / abort cases.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 68 +++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 9d32f19395b8..32f73c906018 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -83,6 +83,44 @@
 #define UFS_SHARABLE		(UFS_WR_SHARABLE | UFS_RD_SHARABLE)
 #define UFS_SHAREABILITY_OFFSET	0x710
 
+/* Multi-host registers */
+#define MHCTRL			0xC4
+#define MHCTRL_EN_VH_MASK	(0xE)
+#define MHCTRL_EN_VH(vh)	(vh << 1)
+#define PH2VH_MBOX		0xD8
+
+#define MH_MSG_MASK		(0xFF)
+
+#define MH_MSG(id, msg)		((id << 8) | (msg & 0xFF))
+#define MH_MSG_PH_READY		0x1
+#define MH_MSG_VH_READY		0x2
+
+#define ALLOW_INQUIRY		BIT(25)
+#define ALLOW_MODE_SELECT	BIT(24)
+#define ALLOW_MODE_SENSE	BIT(23)
+#define ALLOW_PRE_FETCH		GENMASK(22, 21)
+#define ALLOW_READ_CMD_ALL	GENMASK(20, 18)	/* read_6/10/16 */
+#define ALLOW_READ_BUFFER	BIT(17)
+#define ALLOW_READ_CAPACITY	GENMASK(16, 15)
+#define ALLOW_REPORT_LUNS	BIT(14)
+#define ALLOW_REQUEST_SENSE	BIT(13)
+#define ALLOW_SYNCHRONIZE_CACHE	GENMASK(8, 7)
+#define ALLOW_TEST_UNIT_READY	BIT(6)
+#define ALLOW_UNMAP		BIT(5)
+#define ALLOW_VERIFY		BIT(4)
+#define ALLOW_WRITE_CMD_ALL	GENMASK(3, 1)	/* write_6/10/16 */
+
+#define ALLOW_TRANS_VH_DEFAULT	(ALLOW_INQUIRY | ALLOW_MODE_SELECT | \
+				 ALLOW_MODE_SENSE | ALLOW_PRE_FETCH | \
+				 ALLOW_READ_CMD_ALL | ALLOW_READ_BUFFER | \
+				 ALLOW_READ_CAPACITY | ALLOW_REPORT_LUNS | \
+				 ALLOW_REQUEST_SENSE | ALLOW_SYNCHRONIZE_CACHE | \
+				 ALLOW_TEST_UNIT_READY | ALLOW_UNMAP | \
+				 ALLOW_VERIFY | ALLOW_WRITE_CMD_ALL)
+
+#define HCI_MH_ALLOWABLE_TRAN_OF_VH		0x30C
+#define HCI_MH_IID_IN_TASK_TAG			0X308
+
 enum {
 	UNIPRO_L1_5 = 0,/* PHY Adapter */
 	UNIPRO_L2,	/* Data Link */
@@ -174,6 +212,20 @@ static int exynosauto_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
 	return 0;
 }
 
+static int exynosauto_ufs_post_hce_enable(struct exynos_ufs *ufs)
+{
+	struct ufs_hba *hba = ufs->hba;
+
+	/* Enable Virtual Host #1 */
+	ufshcd_rmwl(hba, MHCTRL_EN_VH_MASK, MHCTRL_EN_VH(1), MHCTRL);
+	/* Default VH Transfer permissions */
+	hci_writel(ufs, ALLOW_TRANS_VH_DEFAULT, HCI_MH_ALLOWABLE_TRAN_OF_VH);
+	/* IID information is replaced in TASKTAG[7:5] instead of IID in UCD */
+	hci_writel(ufs, 0x1, HCI_MH_IID_IN_TASK_TAG);
+
+	return 0;
+}
+
 static int exynosauto_ufs_pre_link(struct exynos_ufs *ufs)
 {
 	struct ufs_hba *hba = ufs->hba;
@@ -241,6 +293,20 @@ static int exynosauto_ufs_pre_pwr_change(struct exynos_ufs *ufs,
 	return 0;
 }
 
+static int exynosauto_ufs_post_pwr_change(struct exynos_ufs *ufs,
+					  struct ufs_pa_layer_attr *pwr)
+{
+	struct ufs_hba *hba = ufs->hba;
+	u32 enabled_vh;
+
+	enabled_vh = ufshcd_readl(hba, MHCTRL) & MHCTRL_EN_VH_MASK;
+
+	/* Send physical host ready message to virtual hosts */
+	ufshcd_writel(hba, MH_MSG(enabled_vh, MH_MSG_PH_READY), PH2VH_MBOX);
+
+	return 0;
+}
+
 static int exynos7_ufs_pre_link(struct exynos_ufs *ufs)
 {
 	struct ufs_hba *hba = ufs->hba;
@@ -1413,8 +1479,10 @@ static struct exynos_ufs_drv_data exynosauto_ufs_drvs = {
 				  EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
 				  EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
 	.drv_init		= exynosauto_ufs_drv_init,
+	.post_hce_enable	= exynosauto_ufs_post_hce_enable,
 	.pre_link		= exynosauto_ufs_pre_link,
 	.pre_pwr_change		= exynosauto_ufs_pre_pwr_change,
+	.post_pwr_change	= exynosauto_ufs_post_pwr_change,
 };
 
 static struct exynos_ufs_drv_data exynos_ufs_drvs = {
-- 
2.33.0

RE: [PATCH v4 14/16] scsi: ufs: ufs-exynos: multi-host configuration for exynosauto

[Avri Altman]

> +static int exynosauto_ufs_post_hce_enable(struct exynos_ufs *ufs)
> +{
> +       struct ufs_hba *hba = ufs->hba;
> +
> +       /* Enable Virtual Host #1 */
> +       ufshcd_rmwl(hba, MHCTRL_EN_VH_MASK, MHCTRL_EN_VH(1), MHCTRL);
> +       /* Default VH Transfer permissions */
> +       hci_writel(ufs, ALLOW_TRANS_VH_DEFAULT,
> HCI_MH_ALLOWABLE_TRAN_OF_VH);
> +       /* IID information is replaced in TASKTAG[7:5] instead of IID in UCD */
> +       hci_writel(ufs, 0x1, HCI_MH_IID_IN_TASK_TAG);
If I understand correctly, once you set this register,
the hw takes care of properly arbitrating the requests - 
PH + up to 4 VHs total of 5 machines, each supporting 32 requests doorbell.
Can you share what policy the arbiter uses among the 5 doorbells?

You are designating this change to be used in a UFS2.1 platforms, correct?
Are you planning to use the same framework for UFSHCI4.0, which uses MCQ?

Thanks,
Avri
> +
> +       return 0;
> +}

RE: [PATCH v4 14/16] scsi: ufs: ufs-exynos: multi-host configuration for exynosauto

[Chanho Park]

> > +static int exynosauto_ufs_post_hce_enable(struct exynos_ufs *ufs) {
> > +       struct ufs_hba *hba = ufs->hba;
> > +
> > +       /* Enable Virtual Host #1 */
> > +       ufshcd_rmwl(hba, MHCTRL_EN_VH_MASK, MHCTRL_EN_VH(1), MHCTRL);
> > +       /* Default VH Transfer permissions */
> > +       hci_writel(ufs, ALLOW_TRANS_VH_DEFAULT,
> > HCI_MH_ALLOWABLE_TRAN_OF_VH);
> > +       /* IID information is replaced in TASKTAG[7:5] instead of IID in
> UCD */
> > +       hci_writel(ufs, 0x1, HCI_MH_IID_IN_TASK_TAG);
> If I understand correctly, once you set this register, the hw takes care
> of properly arbitrating the requests - PH + up to 4 VHs total of 5
> machines, each supporting 32 requests doorbell.


Actually, four Multi Hosts (1 for PH and 3 for VHs)

> Can you share what policy the arbiter uses among the 5 doorbells?

AFAIK, it is working something like round-robin. It also has a full checker so it will be acting as the RR arbiter until the requests are full not to be handled by the controller (I'm not sure the exact number of the full count). If full, the lowest UTRD idx will be first.


> 
> You are designating this change to be used in a UFS2.1 platforms, correct?

Yes.

> Are you planning to use the same framework for UFSHCI4.0, which uses MCQ?

AFAIK, next chip will be compatible with 3.1 not 4.0.

Best Regards,
Chanho Park

Re: [PATCH v4 14/16] scsi: ufs: ufs-exynos: multi-host configuration for exynosauto

[Inki Dae]

21. 10. 7. 오후 5:09에 Chanho Park 이(가) 쓴 글:
> UFS controller of ExynosAuto v9 SoC supports multi-host interface for I/O
> virtualization. In general, we're using para-virtualized driver to
> support a block device by several virtual machines. However, it should
> be relayed by backend driver. Multi-host functionality extends the host
> controller by providing register interfaces that can be used by each
> VM's ufs drivers respectively. By this, we can provide direct access to
> the UFS device for multiple VMs. It's similar with SR-IOV of PCIe.
> 
> We divide this M-HCI as PH(Physical Host) and VHs(Virtual Host). The PH
> supports all UFSHCI functions(all SAPs) same as conventional UFSHCI but
> the VH only supports data transfer function. Thus, except UTP_CMD_SAP and
> UTP_TMPSAP, the PH should handle all the physical features.
> 
> This patch provides an initial implementation of PH part. M-HCI can
> support up to four interfaces but this patch initially supports only 1
> PH and 1 VH. For this, we uses TASK_TAG[7:5] field so TASK_TAG[4:0] for
> 32 doorbel will be supported. After the PH is initiated, this will send
> a ready message to VHs through a mailbox register. The message handler
> is not fully implemented yet such as supporting reset / abort cases.
> 
> Cc: Alim Akhtar <alim.akhtar@samsung.com>
> Cc: Kiwoong Kim <kwmad.kim@samsung.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Cc: Inki Dae <inki.dae@samsung.com>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/scsi/ufs/ufs-exynos.c | 68 +++++++++++++++++++++++++++++++++++
>  1 file changed, 68 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
> index 9d32f19395b8..32f73c906018 100644
> --- a/drivers/scsi/ufs/ufs-exynos.c
> +++ b/drivers/scsi/ufs/ufs-exynos.c
> @@ -83,6 +83,44 @@
>  #define UFS_SHARABLE		(UFS_WR_SHARABLE | UFS_RD_SHARABLE)
>  #define UFS_SHAREABILITY_OFFSET	0x710
>  
> +/* Multi-host registers */
> +#define MHCTRL			0xC4
> +#define MHCTRL_EN_VH_MASK	(0xE)
> +#define MHCTRL_EN_VH(vh)	(vh << 1)
> +#define PH2VH_MBOX		0xD8
> +
> +#define MH_MSG_MASK		(0xFF)
> +
> +#define MH_MSG(id, msg)		((id << 8) | (msg & 0xFF))
> +#define MH_MSG_PH_READY		0x1
> +#define MH_MSG_VH_READY		0x2
> +
> +#define ALLOW_INQUIRY		BIT(25)
> +#define ALLOW_MODE_SELECT	BIT(24)
> +#define ALLOW_MODE_SENSE	BIT(23)
> +#define ALLOW_PRE_FETCH		GENMASK(22, 21)
> +#define ALLOW_READ_CMD_ALL	GENMASK(20, 18)	/* read_6/10/16 */
> +#define ALLOW_READ_BUFFER	BIT(17)
> +#define ALLOW_READ_CAPACITY	GENMASK(16, 15)
> +#define ALLOW_REPORT_LUNS	BIT(14)
> +#define ALLOW_REQUEST_SENSE	BIT(13)
> +#define ALLOW_SYNCHRONIZE_CACHE	GENMASK(8, 7)
> +#define ALLOW_TEST_UNIT_READY	BIT(6)
> +#define ALLOW_UNMAP		BIT(5)
> +#define ALLOW_VERIFY		BIT(4)
> +#define ALLOW_WRITE_CMD_ALL	GENMASK(3, 1)	/* write_6/10/16 */
> +
> +#define ALLOW_TRANS_VH_DEFAULT	(ALLOW_INQUIRY | ALLOW_MODE_SELECT | \
> +				 ALLOW_MODE_SENSE | ALLOW_PRE_FETCH | \
> +				 ALLOW_READ_CMD_ALL | ALLOW_READ_BUFFER | \
> +				 ALLOW_READ_CAPACITY | ALLOW_REPORT_LUNS | \
> +				 ALLOW_REQUEST_SENSE | ALLOW_SYNCHRONIZE_CACHE | \
> +				 ALLOW_TEST_UNIT_READY | ALLOW_UNMAP | \
> +				 ALLOW_VERIFY | ALLOW_WRITE_CMD_ALL)
> +
> +#define HCI_MH_ALLOWABLE_TRAN_OF_VH		0x30C
> +#define HCI_MH_IID_IN_TASK_TAG			0X308
> +
>  enum {
>  	UNIPRO_L1_5 = 0,/* PHY Adapter */
>  	UNIPRO_L2,	/* Data Link */
> @@ -174,6 +212,20 @@ static int exynosauto_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
>  	return 0;
>  }
>  
> +static int exynosauto_ufs_post_hce_enable(struct exynos_ufs *ufs)
> +{
> +	struct ufs_hba *hba = ufs->hba;
> +
> +	/* Enable Virtual Host #1 */
> +	ufshcd_rmwl(hba, MHCTRL_EN_VH_MASK, MHCTRL_EN_VH(1), MHCTRL);
> +	/* Default VH Transfer permissions */
> +	hci_writel(ufs, ALLOW_TRANS_VH_DEFAULT, HCI_MH_ALLOWABLE_TRAN_OF_VH);
> +	/* IID information is replaced in TASKTAG[7:5] instead of IID in UCD */
> +	hci_writel(ufs, 0x1, HCI_MH_IID_IN_TASK_TAG);
> +

Reviewed-by : Inki Dae <inki.dae@samsung.com>

Thanks,
Inki Dae

[PATCH v4 15/16] scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host

[Chanho Park]

This patch introduces virtual host driver of exynosauto v9 ufs mHCI.
VH(Virtual Host) only supports data transfer functions. So, most of
physical features are broken. So, we need to set below quirks.
- UFSHCD_QUIRK_BROKEN_UIC_CMD
- UFSHCD_QUIRK_SKIP_PH_CONFIGURATION
Before initialization, the VH is necessary to wait until PH is ready.
It's implemented as polling at the moment.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Kiwoong Kim <kwmad.kim@samsung.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/scsi/ufs/ufs-exynos.c | 84 +++++++++++++++++++++++++++++++++++
 1 file changed, 84 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 32f73c906018..c2b654027b0f 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -121,6 +121,8 @@
 #define HCI_MH_ALLOWABLE_TRAN_OF_VH		0x30C
 #define HCI_MH_IID_IN_TASK_TAG			0X308
 
+#define PH_READY_TIMEOUT_MS			(5 * MSEC_PER_SEC)
+
 enum {
 	UNIPRO_L1_5 = 0,/* PHY Adapter */
 	UNIPRO_L2,	/* Data Link */
@@ -1403,6 +1405,68 @@ static int exynos_ufs_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
 	return 0;
 }
 
+static int exynosauto_ufs_vh_link_startup_notify(struct ufs_hba *hba,
+						 enum ufs_notify_change_status status)
+{
+	if (status == POST_CHANGE) {
+		ufshcd_set_link_active(hba);
+		ufshcd_set_ufs_dev_active(hba);
+		hba->wlun_dev_clr_ua = true;
+	}
+
+	return 0;
+}
+
+static int exynosauto_ufs_vh_wait_ph_ready(struct ufs_hba *hba)
+{
+	u32 mbox;
+	ktime_t start, stop;
+
+	start = ktime_get();
+	stop = ktime_add(start, ms_to_ktime(PH_READY_TIMEOUT_MS));
+
+	do {
+		mbox = ufshcd_readl(hba, PH2VH_MBOX);
+		if ((mbox & MH_MSG_MASK) == MH_MSG_PH_READY)
+			return 0;
+
+		usleep_range(40, 50);
+	} while (ktime_before(ktime_get(), stop));
+
+	return -ETIME;
+}
+
+static int exynosauto_ufs_vh_init(struct ufs_hba *hba)
+{
+	struct device *dev = hba->dev;
+	struct platform_device *pdev = to_platform_device(dev);
+	struct exynos_ufs *ufs;
+	int ret;
+
+	ufs = devm_kzalloc(dev, sizeof(*ufs), GFP_KERNEL);
+	if (!ufs)
+		return -ENOMEM;
+
+	/* exynos-specific hci */
+	ufs->reg_hci = devm_platform_ioremap_resource_byname(pdev, "vs_hci");
+	if (IS_ERR(ufs->reg_hci)) {
+		dev_err(dev, "cannot ioremap for hci vendor register\n");
+		return PTR_ERR(ufs->reg_hci);
+	}
+
+	ret = exynosauto_ufs_vh_wait_ph_ready(hba);
+	if (ret)
+		return ret;
+
+	ufs->drv_data = device_get_match_data(dev);
+	if (!ufs->drv_data)
+		return -ENODEV;
+
+	exynos_ufs_priv_init(hba, ufs);
+
+	return 0;
+}
+
 static struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
 	.name				= "exynos_ufs",
 	.init				= exynos_ufs_init,
@@ -1417,6 +1481,12 @@ static struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
 	.resume				= exynos_ufs_resume,
 };
 
+static struct ufs_hba_variant_ops ufs_hba_exynosauto_vh_ops = {
+	.name				= "exynosauto_ufs_vh",
+	.init				= exynosauto_ufs_vh_init,
+	.link_startup_notify		= exynosauto_ufs_vh_link_startup_notify,
+};
+
 static int exynos_ufs_probe(struct platform_device *pdev)
 {
 	int err;
@@ -1485,6 +1555,18 @@ static struct exynos_ufs_drv_data exynosauto_ufs_drvs = {
 	.post_pwr_change	= exynosauto_ufs_post_pwr_change,
 };
 
+static struct exynos_ufs_drv_data exynosauto_ufs_vh_drvs = {
+	.vops			= &ufs_hba_exynosauto_vh_ops,
+	.quirks			= UFSHCD_QUIRK_PRDT_BYTE_GRAN |
+				  UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR |
+				  UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
+				  UFSHCI_QUIRK_BROKEN_HCE |
+				  UFSHCD_QUIRK_BROKEN_UIC_CMD |
+				  UFSHCD_QUIRK_SKIP_PH_CONFIGURATION |
+				  UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING,
+	.opts			= EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
+};
+
 static struct exynos_ufs_drv_data exynos_ufs_drvs = {
 	.uic_attr		= &exynos7_uic_attr,
 	.quirks			= UFSHCD_QUIRK_PRDT_BYTE_GRAN |
@@ -1512,6 +1594,8 @@ static const struct of_device_id exynos_ufs_of_match[] = {
 	  .data	      = &exynos_ufs_drvs },
 	{ .compatible = "samsung,exynosautov9-ufs",
 	  .data	      = &exynosauto_ufs_drvs },
+	{ .compatible = "samsung,exynosautov9-ufs-vh",
+	  .data	      = &exynosauto_ufs_vh_drvs },
 	{},
 };
 
-- 
2.33.0

RE: [PATCH v4 15/16] scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host

[Avri Altman]

> 
> This patch introduces virtual host driver of exynosauto v9 ufs mHCI.
> VH(Virtual Host) only supports data transfer functions. So, most of physical
> features are broken. So, we need to set below quirks.
> - UFSHCD_QUIRK_BROKEN_UIC_CMD
> - UFSHCD_QUIRK_SKIP_PH_CONFIGURATION
Oh - you set it here.
Maybe just add a comment in your commit log of patches 1 & 2 that you are doing it later.

> Before initialization, the VH is necessary to wait until PH is ready.
> It's implemented as polling at the moment.
> 
> Cc: Alim Akhtar <alim.akhtar@samsung.com>
> Cc: Kiwoong Kim <kwmad.kim@samsung.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  drivers/scsi/ufs/ufs-exynos.c | 84 +++++++++++++++++++++++++++++++++++
>  1 file changed, 84 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c index
> 32f73c906018..c2b654027b0f 100644
> --- a/drivers/scsi/ufs/ufs-exynos.c
> +++ b/drivers/scsi/ufs/ufs-exynos.c
> @@ -121,6 +121,8 @@
>  #define HCI_MH_ALLOWABLE_TRAN_OF_VH            0x30C
>  #define HCI_MH_IID_IN_TASK_TAG                 0X308
> 
> +#define PH_READY_TIMEOUT_MS                    (5 * MSEC_PER_SEC)
> +
>  enum {
>         UNIPRO_L1_5 = 0,/* PHY Adapter */
>         UNIPRO_L2,      /* Data Link */
> @@ -1403,6 +1405,68 @@ static int exynos_ufs_resume(struct ufs_hba *hba,
> enum ufs_pm_op pm_op)
>         return 0;
>  }
> 
> +static int exynosauto_ufs_vh_link_startup_notify(struct ufs_hba *hba,
> +                                                enum
> +ufs_notify_change_status status) {
> +       if (status == POST_CHANGE) {
> +               ufshcd_set_link_active(hba);
> +               ufshcd_set_ufs_dev_active(hba);
> +               hba->wlun_dev_clr_ua = true;
wlun_dev_clr_ua no longer exists - needs rebase

> +       }
> +
> +       return 0;
> +}
> +
> +static int exynosauto_ufs_vh_wait_ph_ready(struct ufs_hba *hba) {
> +       u32 mbox;
> +       ktime_t start, stop;
> +
> +       start = ktime_get();
> +       stop = ktime_add(start, ms_to_ktime(PH_READY_TIMEOUT_MS));
> +
> +       do {
> +               mbox = ufshcd_readl(hba, PH2VH_MBOX);
> +               if ((mbox & MH_MSG_MASK) == MH_MSG_PH_READY)
> +                       return 0;
Maybe add a comment here that the mbox protocol will be defined later.

Thanks,
Avri
> +
> +               usleep_range(40, 50);
> +       } while (ktime_before(ktime_get(), stop));
> +
> +       return -ETIME;
> +}
> +
> +static int exynosauto_ufs_vh_init(struct ufs_hba *hba) {
> +       struct device *dev = hba->dev;
> +       struct platform_device *pdev = to_platform_device(dev);
> +       struct exynos_ufs *ufs;
> +       int ret;
> +
> +       ufs = devm_kzalloc(dev, sizeof(*ufs), GFP_KERNEL);
> +       if (!ufs)
> +               return -ENOMEM;
> +
> +       /* exynos-specific hci */
> +       ufs->reg_hci = devm_platform_ioremap_resource_byname(pdev,
> "vs_hci");
> +       if (IS_ERR(ufs->reg_hci)) {
> +               dev_err(dev, "cannot ioremap for hci vendor register\n");
> +               return PTR_ERR(ufs->reg_hci);
> +       }
> +
> +       ret = exynosauto_ufs_vh_wait_ph_ready(hba);
> +       if (ret)
> +               return ret;
> +
> +       ufs->drv_data = device_get_match_data(dev);
> +       if (!ufs->drv_data)
> +               return -ENODEV;
> +
> +       exynos_ufs_priv_init(hba, ufs);
> +
> +       return 0;
> +}
> +
>  static struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
>         .name                           = "exynos_ufs",
>         .init                           = exynos_ufs_init,
> @@ -1417,6 +1481,12 @@ static struct ufs_hba_variant_ops
> ufs_hba_exynos_ops = {
>         .resume                         = exynos_ufs_resume,
>  };
> 
> +static struct ufs_hba_variant_ops ufs_hba_exynosauto_vh_ops = {
> +       .name                           = "exynosauto_ufs_vh",
> +       .init                           = exynosauto_ufs_vh_init,
> +       .link_startup_notify            = exynosauto_ufs_vh_link_startup_notify,
> +};
> +
>  static int exynos_ufs_probe(struct platform_device *pdev)  {
>         int err;
> @@ -1485,6 +1555,18 @@ static struct exynos_ufs_drv_data
> exynosauto_ufs_drvs = {
>         .post_pwr_change        = exynosauto_ufs_post_pwr_change,
>  };
> 
> +static struct exynos_ufs_drv_data exynosauto_ufs_vh_drvs = {
> +       .vops                   = &ufs_hba_exynosauto_vh_ops,
> +       .quirks                 = UFSHCD_QUIRK_PRDT_BYTE_GRAN |
> +                                 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR |
> +                                 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
> +                                 UFSHCI_QUIRK_BROKEN_HCE |
> +                                 UFSHCD_QUIRK_BROKEN_UIC_CMD |
> +                                 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION |
> +                                 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING,
> +       .opts                   = EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
> +};
> +
>  static struct exynos_ufs_drv_data exynos_ufs_drvs = {
>         .uic_attr               = &exynos7_uic_attr,
>         .quirks                 = UFSHCD_QUIRK_PRDT_BYTE_GRAN |
> @@ -1512,6 +1594,8 @@ static const struct of_device_id
> exynos_ufs_of_match[] = {
>           .data       = &exynos_ufs_drvs },
>         { .compatible = "samsung,exynosautov9-ufs",
>           .data       = &exynosauto_ufs_drvs },
> +       { .compatible = "samsung,exynosautov9-ufs-vh",
> +         .data       = &exynosauto_ufs_vh_drvs },
>         {},
>  };
> 
> --
> 2.33.0

RE: [PATCH v4 15/16] scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host

[Chanho Park]

> > +static int exynosauto_ufs_vh_link_startup_notify(struct ufs_hba *hba,
> > +                                                enum
> > +ufs_notify_change_status status) {
> > +       if (status == POST_CHANGE) {
> > +               ufshcd_set_link_active(hba);
> > +               ufshcd_set_ufs_dev_active(hba);
> > +               hba->wlun_dev_clr_ua = true;
> wlun_dev_clr_ua no longer exists - needs rebase

I found the commit. I'll remove this next patch.

> 
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> > +static int exynosauto_ufs_vh_wait_ph_ready(struct ufs_hba *hba) {
> > +       u32 mbox;
> > +       ktime_t start, stop;
> > +
> > +       start = ktime_get();
> > +       stop = ktime_add(start, ms_to_ktime(PH_READY_TIMEOUT_MS));
> > +
> > +       do {
> > +               mbox = ufshcd_readl(hba, PH2VH_MBOX);
> > +               if ((mbox & MH_MSG_MASK) == MH_MSG_PH_READY)
> > +                       return 0;
> Maybe add a comment here that the mbox protocol will be defined later.

Put some comments with TODO: tag.

Best Regards,
Chanho Park

[PATCH v4 16/16] dt-bindings: ufs: exynos-ufs: add exynosautov9 compatible

[Chanho Park]

Below two compatibles can be used for exynosautov9 SoC UFS controller.

- samsung,exynosautov9-ufs: ExynosAutov9 UFS Physical Host
- samsung,exynosautov9-ufs-vh: ExynosAutov9 UFS Virtual Host

Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index d9b7535b872f..d5cfd99f4337 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -20,6 +20,8 @@ properties:
   compatible:
     enum:
       - samsung,exynos7-ufs
+      - samsung,exynosautov9-ufs
+      - samsung,exynosautov9-ufs-vh
 
   reg:
     items:
-- 
2.33.0

RE: [PATCH v4 00/16] introduce exynosauto v9 ufs driver

[Avri Altman]

Hi, 
> 
> In ExynosAuto(variant of the Exynos for automotive), the UFS Storage needs to
> be accessed from multi-OS. To increase IO performance and reduce SW
> complexity, we implemented UFS-IOV to support storage IO virtualization
> feature on UFS.
> 
> IO virtualization increases IO performance and reduce SW complexity with
> small area cost. And IO virtualization supports virtual machine isolation for
> Security and Safety which are requested by Multi-OS system such as
> automotive application.
> 
> Below figure is the conception of UFS-IOV architeture.
Conception --> a conceptual design

> 
>     +------+          +------+
>     | OS#1 |          | OS#2 |
>     +------+          +------+
>        |                 |
>  +------------+     +------------+
>  |  Physical  |     |   Virtual  |
>  |    Host    |     |    Host    |
>  +------------+     +------------+
>    |      |              | <-- UTP_CMD_SAP, UTP_TM_SAP
>    |   +-------------------------+
>    |   |    Function Arbitor     |
>    |   +-------------------------+
>  +-------------------------------+
>  |           UTP Layer           |
>  +-------------------------------+
>  +-------------------------------+
>  |           UIC Layer           |
>  +-------------------------------+
> 
> There are two types of host controllers on the UFS host controller that we
> designed.
> The UFS device has a Function Arbitor that arranges commands of each host.
> When each host transmits a command to the Arbitor, the Arbitor transmits it to
> the UTP layer.
- Arbitor --> arbiter
 - ufs devise --> host controller
And maybe rephrase the above description (and sketch) so it is clear that the PH, VH, and function arbiter are all hw modules in the host controller.

Thanks,
Avri 

> Physical Host(PH) support all UFSHCI functions(all SAPs) same as conventional
> UFSHCI.
> Virtual Host(VH) support only data transfer function(UTP_CMD_SAP and
> UTP_TM_SAP).
> 
> In an environment where multiple OSs are used, the OS that has the leadership
> of the system is called System OS(Dom0). This system OS uses PH and controls
> error handling.
> 
> Since VH can only use less functions than PH, it is necessary to send a request to
> PH for Detected Error Handling in VH. To interface among PH and VHs, UFSHCI
> HW supports mailbox. PH can broadcast mail to other VH at the same time with
> arguments and VH can mail to PH with arguments.
> PH and VH generate interrupts when mails from PH or VH.
> 
> In this structure, the virtual host can't support some feature and need to skip
> the some part of ufshcd code by using quirk.
> This patchs add quirks so that the UIC command is ignored and the ufshcd init
> process can be skipped for VH. Also, according to our UFS-IOV policy,
> 
> First two patches, I picked them up from Jonmin's patchset[1] and the third
> patch has been dropped because we need to check it again.
> 
> [1]: https://lore.kernel.org/linux-scsi/20210527030901.88403-1-
> jjmin.jeong@samsung.com/
> 
> Patch 0003 ~ 0013, they are changes of exynos7 ufs driver to apply exynosauto
> v9 variant and PH/VH capabilities.
> Patch 0014 ~ 0017, the patches introduce exynosauto v9 ufs MHCI which
> includes PH and VH.
> 
> Changes from v3:
> - Drop "[PATCH v3 06/17] scsi: ufs: ufs-exynos: get sysreg regmap for
>   io-coherency" and squash it to Patch12
> - Patch12: Use macro to avoid raw value usage and describe the value of M-Phy
> setting
> - Patch13: Add dma-coherent property
> - Patch14: Use macro to avoid raw value and describe the value of
> HCI_MH_ALLOWABLE_TRAN_OF_VH
> 
> Changes from v2:
> - Separate dt-binding patches on top of
>   https://lore.kernel.org/linux-
> devicetree/YUNdqnZ2kYefxFUC@robh.at.kernel.org/
> 
> Changes from v1:
> - Change quirk name from UFSHCD_QUIRK_SKIP_INTERFACE_CONFIGURATION
> to
>   UFSHCD_QUIRK_SKIP_PH_CONFIGURATION
> - Add compatibles to Documentation/devicetree/bindings/ufs/samsung,exynos-
> ufs.yaml
>   on top of https://lore.kernel.org/linux-scsi/20200613024706.27975-9-
> alim.akhtar@samsung.com/
> 
> Chanho Park (14):
>   scsi: ufs: ufs-exynos: change pclk available max value
>   scsi: ufs: ufs-exynos: simplify drv_data retrieval
>   scsi: ufs: ufs-exynos: add refclkout_stop control
>   scsi: ufs: ufs-exynos: add setup_clocks callback
>   scsi: ufs: ufs-exynos: correct timeout value setting registers
>   scsi: ufs: ufs-exynos: support custom version of ufs_hba_variant_ops
>   scsi: ufs: ufs-exynos: add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option
>   scsi: ufs: ufs-exynos: factor out priv data init
>   scsi: ufs: ufs-exynos: add pre/post_hce_enable drv callbacks
>   scsi: ufs: ufs-exynos: support exynosauto v9 ufs driver
>   dt-bindings: ufs: exynos-ufs: add io-coherency property
>   scsi: ufs: ufs-exynos: multi-host configuration for exynosauto
>   scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host
>   dt-bindings: ufs: exynos-ufs: add exynosautov9 compatible
> 
> jongmin jeong (2):
>   scsi: ufs: add quirk to handle broken UIC command
>   scsi: ufs: add quirk to enable host controller without ph
>     configuration
> 
>  .../bindings/ufs/samsung,exynos-ufs.yaml      |  13 +
>  drivers/scsi/ufs/ufs-exynos.c                 | 359 ++++++++++++++++--
>  drivers/scsi/ufs/ufs-exynos.h                 |  27 +-
>  drivers/scsi/ufs/ufshcd.c                     |   6 +
>  drivers/scsi/ufs/ufshcd.h                     |  12 +
>  5 files changed, 391 insertions(+), 26 deletions(-)
> 
> --
> 2.33.0

RE: [PATCH v4 00/16] introduce exynosauto v9 ufs driver

[Chanho Park]

Hi, Thanks for your review.

> -----Original Message-----
> From: Avri Altman <Avri.Altman@wdc.com>
> Sent: Thursday, October 14, 2021 7:05 PM
> To: Chanho Park <chanho61.park@samsung.com>; Alim Akhtar
> <alim.akhtar@samsung.com>; James E . J . Bottomley <jejb@linux.ibm.com>;
> Martin K . Petersen <martin.petersen@oracle.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski@canonical.com>
> Cc: Bean Huo <beanhuo@micron.com>; Bart Van Assche <bvanassche@acm.org>;
> Adrian Hunter <adrian.hunter@intel.com>; hch@infradead.org; Can Guo
> <cang@codeaurora.org>; Jaegeuk Kim <jaegeuk@kernel.org>; Jaehoon Chung
> <jh80.chung@samsung.com>; Gyunghoon Kwon <goodjob.kwon@samsung.com>; Sowon
> Na <sowon.na@samsung.com>; linux-samsung-soc@vger.kernel.org; linux-
> scsi@vger.kernel.org
> Subject: RE: [PATCH v4 00/16] introduce exynosauto v9 ufs driver
> 
> Hi,
> >
> > In ExynosAuto(variant of the Exynos for automotive), the UFS Storage
> > needs to be accessed from multi-OS. To increase IO performance and
> > reduce SW complexity, we implemented UFS-IOV to support storage IO
> > virtualization feature on UFS.
> >
> > IO virtualization increases IO performance and reduce SW complexity
> > with small area cost. And IO virtualization supports virtual machine
> > isolation for Security and Safety which are requested by Multi-OS
> > system such as automotive application.
> >
> > Below figure is the conception of UFS-IOV architeture.
> Conception --> a conceptual design
> 
> >
> >     +------+          +------+
> >     | OS#1 |          | OS#2 |
> >     +------+          +------+
> >        |                 |
> >  +------------+     +------------+
> >  |  Physical  |     |   Virtual  |
> >  |    Host    |     |    Host    |
> >  +------------+     +------------+
> >    |      |              | <-- UTP_CMD_SAP, UTP_TM_SAP
> >    |   +-------------------------+
> >    |   |    Function Arbitor     |
> >    |   +-------------------------+
> >  +-------------------------------+
> >  |           UTP Layer           |
> >  +-------------------------------+
> >  +-------------------------------+
> >  |           UIC Layer           |
> >  +-------------------------------+
> >
> > There are two types of host controllers on the UFS host controller
> > that we designed.
> > The UFS device has a Function Arbitor that arranges commands of each
> host.
> > When each host transmits a command to the Arbitor, the Arbitor
> > transmits it to the UTP layer.
> - Arbitor --> arbiter
>  - ufs devise --> host controller
> And maybe rephrase the above description (and sketch) so it is clear that
> the PH, VH, and function arbiter are all hw modules in the host controller.

I'll rephrase the descriptions next patchset. Thanks.

Best Regards,
Chanho Park