Re: SCSI QLA not working on latest *-mm SN2

Matthew Wilcox
2004-09-18T01:25:19Z

On Fri, Sep 17, 2004 at 06:15:10PM -0700, Andrew Vasquez wrote:
> On Fri, 17 Sep 2004, James Bottomley wrote:
> > Just to confirm if we absolutely have to do this...the offending reads
> > to issue the posting flush were to the register you just wrote to to get
> > the chip to reset. However, any MMIO read to any region of that card
> > would also trigger a posted write flush. Does the chip drop entirely
> > off the PCI bus during the execution of reset, or could we perhaps issue
> > an innocuous read to somewhere in PCI configuration space for the card?
>
> I had asked the hardware guy a similar question -- for the soft-reset
> operation, we'll _not_ be able to issue additional readw()s until '16
> PCI clocks elapse.' So, it seems we'll have to settle with the
> udelay() in this particular instance.

But the write that starts the reset can be delayed arbitrarily, so we need
to do *some* kind of read from the device to be know that it got there.
Can we access config space instead of mmio space?

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