Re: SCSI breakage on non-cache coherent architectures

Benjamin Herrenschmidt
2007-11-19T21:55:56Z

On Mon, 2007-11-19 at 13:43 -0800, Roland Dreier wrote:
> > I've been debugging various issues on the PowerPC 44x embedded
> > architecture which happens to have non-coherent PCI DMA.
> >
> > One of the problem I'm hitting is that one really need to enforce
> > kmalloc alignement to cache lines or bad things will happen (among
> > others with USB), for some reasons, powerpc failed to do so, I fixed it.
>
> Heh... I hit the same problem literally 5 years ago:
> http://lwn.net/Articles/1783/
>
> I implemented the __dma_buffer annotation:
> http://lwn.net/Articles/2269/
>
> But DaveM said we should just use the PCI pool code instead:
> http://lwn.net/Articles/2270/

Heh, well...

In this case, DaveM just proposed something akin to your
__dma_buffer :-)

On the other hand, after discussing with James, it looks like we'll just
be reverting the patch that removed the kmalloc of the sense buffer
since non cache-coherent archs are supposed to enforce kmalloc alignment
to cache lines.

__dma_buffer still seems like a good thing to have if too many other
drivers are hitting that but for this specific problem, it's not the
approach that we'll be taking.

Cheers,
Ben.