[PATCH] [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address)

[PATCH] [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address)

[Santosh Y]

From: Santosh Yaraganavi <santoshsy@gmail.com>

UTP Transfer request list base registers UTRLBA and UTRLBAU
must be assigned, lower-32 and upper-32 bits of UTRLD list
physical base addresses respectively.

Currently UTRLBAU is being assigned lower-32 bits of UTRLD
physical base address. This will cause an issue with
controllers that can support 64-bit addressing.

This patch correctly assigns upper-32 bits of UTRLD physical
base address to UTRLBAU.

Reported-by: Rene De Jong <rene.dejong@arm.com>
Signed-off-by: Santosh Yaraganavi <santoshsy@gmail.com>
Reviewed-by: Vinayak Holikatti <vinholikatti@gmail.com>
---
 drivers/scsi/ufs/ufshcd.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 52b96e8..ea32ade 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1032,11 +1032,11 @@ static int ufshcd_initialize_hba(struct ufs_hba *hba)
 		return -EIO;
 
 	/* Configure UTRL and UTMRL base address registers */
-	writel(hba->utrdl_dma_addr,
-	       (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L));
 	writel(lower_32_bits(hba->utrdl_dma_addr),
+	       (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L));
+	writel(upper_32_bits(hba->utrdl_dma_addr),
 	       (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_H));
-	writel(hba->utmrdl_dma_addr,
+	writel(lower_32_bits(hba->utmrdl_dma_addr),
 	       (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_L));
 	writel(upper_32_bits(hba->utmrdl_dma_addr),
 	       (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_H));
-- 
1.7.5.4

Re: [PATCH] [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address)

[Namjae Jeon]

2012/4/23 Santosh Y <santoshsy@gmail.com>:
> From: Santosh Yaraganavi <santoshsy@gmail.com>
>
> UTP Transfer request list base registers UTRLBA and UTRLBAU
> must be assigned, lower-32 and upper-32 bits of UTRLD list
> physical base addresses respectively.
>
> Currently UTRLBAU is being assigned lower-32 bits of UTRLD
> physical base address. This will cause an issue with
> controllers that can support 64-bit addressing.
>
> This patch correctly assigns upper-32 bits of UTRLD physical
> base address to UTRLBAU.
Hi. Santosh.
0 : 9 bits are reserved in UTRLBA of specification. is it considered also ?
Thanks.

>
> Reported-by: Rene De Jong <rene.dejong@arm.com>
> Signed-off-by: Santosh Yaraganavi <santoshsy@gmail.com>
> Reviewed-by: Vinayak Holikatti <vinholikatti@gmail.com>
> ---
>  drivers/scsi/ufs/ufshcd.c |    6 +++---
>  1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 52b96e8..ea32ade 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1032,11 +1032,11 @@ static int ufshcd_initialize_hba(struct ufs_hba *hba)
>                return -EIO;
>
>        /* Configure UTRL and UTMRL base address registers */
> -       writel(hba->utrdl_dma_addr,
> -              (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L));
>        writel(lower_32_bits(hba->utrdl_dma_addr),
> +              (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L));
> +       writel(upper_32_bits(hba->utrdl_dma_addr),
>               (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_H));
> -       writel(hba->utmrdl_dma_addr,
> +       writel(lower_32_bits(hba->utmrdl_dma_addr),
>               (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_L));
>        writel(upper_32_bits(hba->utmrdl_dma_addr),
>               (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_H));
> --
> 1.7.5.4
>
> --
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Re: [PATCH] [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address)

[Santosh Y]

On Tue, Apr 24, 2012 at 10:26 AM, Namjae Jeon <linkinjeon@gmail.com> wrote:
> 2012/4/23 Santosh Y <santoshsy@gmail.com>:
>> From: Santosh Yaraganavi <santoshsy@gmail.com>
>>
>> UTP Transfer request list base registers UTRLBA and UTRLBAU
>> must be assigned, lower-32 and upper-32 bits of UTRLD list
>> physical base addresses respectively.
>>
>> Currently UTRLBAU is being assigned lower-32 bits of UTRLD
>> physical base address. This will cause an issue with
>> controllers that can support 64-bit addressing.
>>
>> This patch correctly assigns upper-32 bits of UTRLD physical
>> base address to UTRLBAU.
> Hi. Santosh.
> 0 : 9 bits are reserved in UTRLBA of specification. is it considered also ?
> Thanks.
>

Hi Namjae,

During memory allocation for UTRDL, it is made sure that the UTRDL
physical base address is aligned to 1K by checking if the address is
aligned to PAGE_SIZE. If the address is PAGE_SIZE aligned, then it is
aligned to 1K. So we don't have to worry about the first 10 bits while
assigning the base address to UTRLBA.

-- 
~Santosh

Re: [PATCH] [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address)

[Namjae Jeon]

2012/4/24 Santosh Y <santoshsy@gmail.com>:
> On Tue, Apr 24, 2012 at 10:26 AM, Namjae Jeon <linkinjeon@gmail.com> wrote:
>> 2012/4/23 Santosh Y <santoshsy@gmail.com>:
>>> From: Santosh Yaraganavi <santoshsy@gmail.com>
>>>
>>> UTP Transfer request list base registers UTRLBA and UTRLBAU
>>> must be assigned, lower-32 and upper-32 bits of UTRLD list
>>> physical base addresses respectively.
>>>
>>> Currently UTRLBAU is being assigned lower-32 bits of UTRLD
>>> physical base address. This will cause an issue with
>>> controllers that can support 64-bit addressing.
>>>
>>> This patch correctly assigns upper-32 bits of UTRLD physical
>>> base address to UTRLBAU.
>> Hi. Santosh.
>> 0 : 9 bits are reserved in UTRLBA of specification. is it considered also ?
>> Thanks.
>>
>
> Hi Namjae,
>
> During memory allocation for UTRDL, it is made sure that the UTRDL
> physical base address is aligned to 1K by checking if the address is
> aligned to PAGE_SIZE. If the address is PAGE_SIZE aligned, then it is
> aligned to 1K. So we don't have to worry about the first 10 bits while
> assigning the base address to UTRLBA.
>
> --
> ~Santosh
Hi. Santosh.
Okay, I understand. Thanks for your reply.

Reviewed-by: Namjae Jeon <linkinjeon@gmail.com>