[PATCH 2.6] Add readX_relaxed to MPT Fusion driver

[PATCH 2.6] Add readX_relaxed to MPT Fusion driver

[Jeremy Higdon]

This patch makes use of readX_relaxed to improve PIO read
response times on platforms that define them (currently
SGI Altix :-), but it could be used in conjunction with the
PCI-X relaxed ordering attribute on another platform in the
future).

>From what I could see, there was only one PIO read in which
it was unsafe for the response to pass DMA write data, so
I made the default readX_relaxed.

jeremy


diff -ur -X /usr/people/jeremy/dontdiff linux-2.6.6/drivers/message/fusion/mptbase.c linux-2.6.7-rc1/drivers/message/fusion/mptbase.c
--- linux-2.6.6/drivers/message/fusion/mptbase.c	2004-05-28 23:14:11.000000000 -0700
+++ linux-2.6.7-rc1/drivers/message/fusion/mptbase.c	2004-05-27 16:48:09.000000000 -0700
@@ -282,7 +282,8 @@
 };
 MODULE_DEVICE_TABLE(pci, mptbase_pci_table);
 
-#define CHIPREG_READ32(addr) 		readl(addr)
+#define CHIPREG_READ32(addr) 		readl_relaxed(addr)
+#define CHIPREG_READ32_dmasync(addr)	readl(addr)
 #define CHIPREG_WRITE32(addr,val) 	writel(val, addr)
 #define CHIPREG_PIO_WRITE32(addr,val)	outl(val, (unsigned long)addr)
 #define CHIPREG_PIO_READ32(addr) 	inl((unsigned long)addr)
@@ -347,7 +348,7 @@
 	 */
 	while (1) {
 
-		if ((pa = CHIPREG_READ32(&ioc->chip->ReplyFifo)) == 0xFFFFFFFF)
+		if ((pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo)) == 0xFFFFFFFF)
 			return IRQ_HANDLED;
 
 		cb_idx = 0;