* [PATCH 0/11] qla2xxx: Add ISP24xx support.
@ 2005-06-14 5:31 Andrew Vasquez
2005-06-14 5:31 ` [PATCH 1/11] qla2xxx: Add ISP24xx definitions Andrew Vasquez
` (10 more replies)
0 siblings, 11 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:31 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
James,
What follows is a series of patches (against the latest scsi-misc-2.6
git tree) to add support for a new familiy of 4Gb ISP chips. The
firmware images to support these new ISPs will reside on the boards
themselves and therefore not require a large firmware-blob be compiled
into the driver.
A summary of the patches can be found towards the end of this message.
With the exception of the rather large firmware image update (direct
pointer to bzip'd patch listed), subsequent messages will contain
inlined patches.
All patches can be found at the following URL:
ftp://ftp.qlogic.com/outgoing/linux/patches/8.x/8.01.00b4k/
There are a set of patches present within the scsi-rc-fixes-2.6 tree
which should be carried over to scsi-misc-2.6 before applying:
[PATCH] qla2xxx: Pull-down scsi-host-addition to follow board initialization.
http://marc.theaimsgroup.com/?l=linux-scsi&m=111836291000433&q=raw
Re: [dm-devel] further testing w/ multipath ... and bugs
http://marc.theaimsgroup.com/?l=linux-scsi&m=111868700022257&q=raw
Regards,
Andrew Vasquez
QLogic Corporation
commit 8f70eac0a59dff15bf39da7af4fe7e5aba274ca5
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:15:19 2005 -0700
Firmware updates.
Resync with latest 21xx firmware -- 1.19.25.
Resync with latest 22xx firmware -- 2.02.08.
Resync with latest 23xx/63xx firmware -- 3.03.15.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit c82a228a4898ce097072deca69e3632824667a5c
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:05:45 2005 -0700
Code scrubbing.
Remove trailing whitespace from driver files.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit 911d04533e45895584fbaaa85a54ce5710d264f1
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:04:57 2005 -0700
NVRAM id-list updates.
Resync with latest NVRAM subsystem ID list.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit 4871198c793d20789a89d7cf8ff61b99f259570e
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:04:25 2005 -0700
Final glue-code for ISP24xx.
Add appropriate glue-code for ISP24xx support within
OS and initialization sections of driver.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit 6aba66c726c715fced8740684bfd1ba57651d015
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:04:02 2005 -0700
ISP24xx ISR routines.
Add appropriate glue-code for ISP24xx support -- this
included generalizing some of the core handling
routines (qla2x00_async_event() [pull-up retrieval of
mailbox values] and qla2x00_status_entry()]. Fixup
2100/2300 ISRs to handle the new conventions.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit a732ee4e5aba74cc97c0607e0e0a3827d1c3793d
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:03:48 2005 -0700
Add ISP24xx IOCB manipulation routines.
Add appropriate glue-code for ISP24xx support while
manipulting IOCB packets. Add an ISP24xx specific
'start_scsi' routine due to command-type-7 layout
changes.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit a3885ff384e4cdf03203fc9ea42a54763a0b39f8
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:03:35 2005 -0700
Add ISP24xx flash-manipulation routines.
Add read/write flash manipulation routines for the ISP24xx.
Update sysfs NVRAM objects to use generalized accessor
functions.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit d5f1f079921b48f94606053f246b8d16b39f3f74
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:03:20 2005 -0700
Add MBX command routines for ISP24xx support.
Generalize several routines [qla2x00_load_ram_ext(),
qla2x00_execute_fw(), qla2x00_verify_checksum()] to handle
larger addressing space.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit b01fb29c828317b98912a32ee51a144789c765ff
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:02:50 2005 -0700
Generalize SNS generic-services routines.
Consolidate completion-status checking while adding support
for the ISP24xx.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit 388467c29a156056c5fe5e2bdcd68b22fb876b54
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:02:37 2005 -0700
Add ISP24xx diagnostic routines.
Add function and structure definitions for the ISP24xx
diagnostic firmware dump routines.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
commit d6adba67d6a4f2fd751e3bb100dec5e0efdb7324
Author: Andrew Vasquez <andrew.vasquez@qlogic.com>
Date: Mon Jun 13 15:02:18 2005 -0700
Add ISP24xx definitions.
Add requisite structure definitions and #define's for ISP24xx
support.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/11] qla2xxx: Add ISP24xx definitions.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
@ 2005-06-14 5:31 ` Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:31 ` [PATCH 2/11] qla2xxx: Add ISP24xx diagnostic routines Andrew Vasquez
` (9 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:31 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Add ISP24xx definitions.
Add requisite structure definitions and #define's for ISP24xx
support.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_def.h | 121 ++++
drivers/scsi/qla2xxx/qla_fw.h | 1076 +++++++++++++++++++++++++++++++++++++
drivers/scsi/qla2xxx/qla_init.c | 6
drivers/scsi/qla2xxx/qla_inline.h | 11
4 files changed, 1197 insertions(+), 17 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -62,6 +62,22 @@
#define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322
#endif
+#ifndef PCI_DEVICE_ID_QLOGIC_ISP2422
+#define PCI_DEVICE_ID_QLOGIC_ISP2422 0x2422
+#endif
+
+#ifndef PCI_DEVICE_ID_QLOGIC_ISP2432
+#define PCI_DEVICE_ID_QLOGIC_ISP2432 0x2432
+#endif
+
+#ifndef PCI_DEVICE_ID_QLOGIC_ISP2512
+#define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512
+#endif
+
+#ifndef PCI_DEVICE_ID_QLOGIC_ISP2522
+#define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522
+#endif
+
#if defined(CONFIG_SCSI_QLA21XX) || defined(CONFIG_SCSI_QLA21XX_MODULE)
#define IS_QLA2100(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2100)
#else
@@ -96,9 +112,28 @@
#define IS_QLA6322(ha) 0
#endif
+#if defined(CONFIG_SCSI_QLA24XX) || defined(CONFIG_SCSI_QLA24XX_MODULE)
+#define IS_QLA2422(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422)
+#define IS_QLA2432(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432)
+#else
+#define IS_QLA2422(ha) 0
+#define IS_QLA2432(ha) 0
+#endif
+
+#if defined(CONFIG_SCSI_QLA25XX) || defined(CONFIG_SCSI_QLA25XX_MODULE)
+#define IS_QLA2512(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2512)
+#define IS_QLA2522(ha) ((ha)->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2522)
+#else
+#define IS_QLA2512(ha) 0
+#define IS_QLA2522(ha) 0
+#endif
+
#define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
IS_QLA6312(ha) || IS_QLA6322(ha))
+#define IS_QLA24XX(ha) (IS_QLA2422(ha) || IS_QLA2432(ha))
+#define IS_QLA25XX(ha) (IS_QLA2512(ha) || IS_QLA2522(ha))
+
/*
* Only non-ISP2[12]00 have extended addressing support in the firmware.
*/
@@ -212,10 +247,18 @@
#define MANAGEMENT_SERVER 0xfe
#define BROADCAST 0xff
-#define RESERVED_LOOP_ID(x) ((x > LAST_LOCAL_LOOP_ID && \
- x < SNS_FIRST_LOOP_ID) || \
- x == MANAGEMENT_SERVER || \
- x == BROADCAST)
+/*
+ * There is no correspondence between an N-PORT id and an AL_PA. Therefore the
+ * valid range of an N-PORT id is 0 through 0x7ef.
+ */
+#define NPH_LAST_HANDLE 0x7ef
+#define NPH_SNS 0x7fc /* FFFFFC */
+#define NPH_FABRIC_CONTROLLER 0x7fd /* FFFFFD */
+#define NPH_F_PORT 0x7fe /* FFFFFE */
+#define NPH_IP_BROADCAST 0x7ff /* FFFFFF */
+
+#define MAX_CMDSZ 16 /* SCSI maximum CDB size. */
+#include "qla_fw.h"
/*
* Timeout timer counts in seconds
@@ -232,6 +275,7 @@
#define REQUEST_ENTRY_CNT_2100 128 /* Number of request entries. */
#define REQUEST_ENTRY_CNT_2200 2048 /* Number of request entries. */
#define REQUEST_ENTRY_CNT_2XXX_EXT_MEM 4096 /* Number of request entries. */
+#define REQUEST_ENTRY_CNT_24XX 4096 /* Number of request entries. */
#define RESPONSE_ENTRY_CNT_2100 64 /* Number of response entries.*/
#define RESPONSE_ENTRY_CNT_2300 512 /* Number of response entries.*/
@@ -525,6 +569,8 @@ typedef struct {
#define MBS_LOOP_ID_USED 0x4008
#define MBS_ALL_IDS_IN_USE 0x4009
#define MBS_NOT_LOGGED_IN 0x400A
+#define MBS_LINK_DOWN_ERROR 0x400B
+#define MBS_DIAG_ECHO_TEST_ERROR 0x400C
/*
* ISP mailbox asynchronous event status codes
@@ -576,7 +622,7 @@ typedef struct {
#define FO1_CTIO_RETRY BIT_3
#define FO1_DISABLE_LIP_F7_SW BIT_4
#define FO1_DISABLE_100MS_LOS_WAIT BIT_5
-#define FO1_DISABLE_GPIO6_7 BIT_6
+#define FO1_DISABLE_GPIO6_7 BIT_6 /* LED bits */
#define FO1_AE_ON_LOOP_INIT_ERR BIT_7
#define FO1_SET_EMPHASIS_SWING BIT_8
#define FO1_AE_AUTO_BYPASS BIT_9
@@ -591,6 +637,15 @@ typedef struct {
#define FO3_ENABLE_EMERG_IOCB BIT_0
#define FO3_AE_RND_ERROR BIT_1
+/* 24XX additional firmware options */
+#define ADD_FO_COUNT 3
+#define ADD_FO1_DISABLE_GPIO_LED_CTRL BIT_6 /* LED bits */
+#define ADD_FO1_ENABLE_PUREX_IOCB BIT_10
+
+#define ADD_FO2_ENABLE_SEL_CLS2 BIT_5
+
+#define ADD_FO3_NO_ABT_ON_LINK_DOWN BIT_14
+
/*
* ISP mailbox commands
*/
@@ -659,6 +714,22 @@ typedef struct {
#define MBC_SEND_LFA_COMMAND 0x7D /* Send Loop Fabric Address */
#define MBC_LUN_RESET 0x7E /* Send LUN reset */
+/*
+ * ISP24xx mailbox commands
+ */
+#define MBC_SERDES_PARAMS 0x10 /* Serdes Tx Parameters. */
+#define MBC_GET_IOCB_STATUS 0x12 /* Get IOCB status command. */
+#define MBC_GET_TIMEOUT_PARAMS 0x22 /* Get FW timeouts. */
+#define MBC_GEN_SYSTEM_ERROR 0x2a /* Generate System Error. */
+#define MBC_SET_TIMEOUT_PARAMS 0x32 /* Set FW timeouts. */
+#define MBC_MID_INITIALIZE_FIRMWARE 0x48 /* MID Initialize firmware. */
+#define MBC_MID_GET_VP_DATABASE 0x49 /* MID Get VP Database. */
+#define MBC_MID_GET_VP_ENTRY 0x4a /* MID Get VP Entry. */
+#define MBC_HOST_MEMORY_COPY 0x53 /* Host Memory Copy. */
+#define MBC_SEND_RNFT_ELS 0x5e /* Send RNFT ELS request */
+#define MBC_GET_LINK_PRIV_STATS 0x6d /* Get link & private data. */
+#define MBC_SET_VENDOR_ID 0x76 /* Set Vendor ID. */
+
/* Firmware return data sizes */
#define FCAL_MAP_SIZE 128
@@ -888,6 +959,9 @@ typedef struct {
/*
* Get Link Status mailbox command return buffer.
*/
+#define GLSO_SEND_RPS BIT_0
+#define GLSO_USE_DID BIT_3
+
typedef struct {
uint32_t link_fail_cnt;
uint32_t loss_sync_cnt;
@@ -1182,7 +1256,6 @@ do { \
* ISP queue - command entry structure definition.
*/
#define COMMAND_TYPE 0x11 /* Command entry */
-#define MAX_CMDSZ 16 /* SCSI maximum CDB size. */
typedef struct {
uint8_t entry_type; /* Entry type. */
uint8_t entry_count; /* Entry count. */
@@ -1305,11 +1378,16 @@ typedef struct {
/*
* Status entry entry status
*/
+#define RF_RQ_DMA_ERROR BIT_6 /* Request Queue DMA error. */
#define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */
#define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */
#define RF_INV_E_PARAM BIT_3 /* Invalid entry parameter. */
#define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */
#define RF_BUSY BIT_1 /* Busy */
+#define RF_MASK (RF_RQ_DMA_ERROR | RF_INV_E_ORDER | RF_INV_E_COUNT | \
+ RF_INV_E_PARAM | RF_INV_E_TYPE | RF_BUSY)
+#define RF_MASK_24XX (RF_INV_E_ORDER | RF_INV_E_COUNT | RF_INV_E_PARAM | \
+ RF_INV_E_TYPE)
/*
* Status entry SCSI status bit definitions.
@@ -1524,9 +1602,6 @@ typedef struct {
port_id_t d_id;
uint8_t node_name[WWN_SIZE];
uint8_t port_name[WWN_SIZE];
- uint32_t type;
-#define SW_TYPE_IP BIT_1
-#define SW_TYPE_SCSI BIT_0
} sw_info_t;
/*
@@ -1541,6 +1616,8 @@ typedef struct {
union {
cmd_a64_entry_t cmd;
sts_entry_t rsp;
+ struct cmd_type_7 cmd24;
+ struct sts_entry_24xx rsp24;
} p;
uint8_t inq[INQ_DATA_SIZE];
} inq_cmd_rsp_t;
@@ -1576,10 +1653,13 @@ typedef struct {
union {
cmd_a64_entry_t cmd;
sts_entry_t rsp;
+ struct cmd_type_7 cmd24;
+ struct sts_entry_24xx rsp24;
} p;
rpt_lun_lst_t list;
} rpt_lun_cmd_rsp_t;
+
/*
* Fibre channel port type.
*/
@@ -1669,6 +1749,7 @@ typedef struct fc_port {
#define FCF_FAILOVER_DISABLE BIT_22
#define FCF_DSXXX_DEVICE BIT_23
#define FCF_AA_EVA_DEVICE BIT_24
+#define FCF_AA_MSA_DEVICE BIT_25
/* No loop ID flag. */
#define FC_NO_LOOP_ID 0x1000
@@ -1940,6 +2021,7 @@ struct qla_board_info {
char isp_name[8];
struct qla_fw_info *fw_info;
+ char *fw_fname;;
};
/* Return data from MBC_GET_ID_LIST call. */
@@ -1949,6 +2031,7 @@ struct gid_list_info {
uint8_t domain;
uint8_t loop_id_2100; /* ISP2100/ISP2200 -- 4 bytes. */
uint16_t loop_id; /* ISP23XX -- 6 bytes. */
+ uint16_t reserved_1; /* ISP24XX -- 8 bytes. */
};
#define GID_LIST_SIZE (sizeof(struct gid_list_info) * MAX_FIBRE_DEVICES)
@@ -1982,6 +2065,8 @@ typedef struct scsi_qla_host {
uint32_t enable_lip_full_login :1;
uint32_t enable_target_reset :1;
uint32_t enable_led_scheme :1;
+ uint32_t msi_enabled :1;
+ uint32_t msix_enabled :1;
} flags;
atomic_t loop_state;
@@ -2018,6 +2103,7 @@ typedef struct scsi_qla_host {
#define IODESC_PROCESS_NEEDED 22 /* IO descriptor processing needed */
#define IOCTL_ERROR_RECOVERY 23
#define LOOP_RESET_NEEDED 24
+#define BEACON_BLINK_NEEDED 25
uint32_t device_flags;
#define DFLG_LOCAL_DEVICES BIT_0
@@ -2058,6 +2144,7 @@ typedef struct scsi_qla_host {
uint16_t rsp_ring_index; /* Current index. */
uint16_t response_q_length;
+ int (*start_scsi)(srb_t *);
uint16_t (*calc_request_entries)(uint16_t);
void (*build_scsi_iocbs)(srb_t *, cmd_entry_t *, uint16_t);
@@ -2102,6 +2189,7 @@ typedef struct scsi_qla_host {
uint8_t serial2;
/* NVRAM configuration data */
+ uint16_t nvram_size;
uint16_t nvram_base;
uint16_t loop_reset_delay;
@@ -2161,7 +2249,8 @@ typedef struct scsi_qla_host {
struct dma_pool *s_dma_pool;
dma_addr_t init_cb_dma;
- init_cb_t *init_cb;
+ init_cb_t *init_cb;
+ int init_cb_size;
dma_addr_t iodesc_pd_dma;
port_database_t *iodesc_pd;
@@ -2202,6 +2291,7 @@ typedef struct scsi_qla_host {
uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
uint8_t fw_seriallink_options[4];
+ uint16_t fw_seriallink_options24[4];
/* Firmware dump information. */
void *fw_dump;
@@ -2210,8 +2300,13 @@ typedef struct scsi_qla_host {
char *fw_dump_buffer;
int fw_dump_buffer_len;
+//ISP24xx
+ int fw_dumped;
+ void *fw_dump24;
+ int fw_dump24_len;
+
uint8_t host_str[16];
- uint16_t pci_attr;
+ uint32_t pci_attr;
uint16_t product_id[4];
@@ -2219,8 +2314,8 @@ typedef struct scsi_qla_host {
#define BINZERO "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
char *model_desc;
- uint8_t node_name[WWN_SIZE];
- uint8_t nvram_version;
+ uint8_t *node_name;
+ uint8_t *port_name;
uint32_t isp_abort_cnt;
/* Needed for BEACON */
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
new file mode 100644
--- /dev/null
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -0,0 +1,1076 @@
+
+/********************************************************************************
+* QLOGIC LINUX SOFTWARE
+*
+* QLogic ISP2x00 device driver for Linux 2.6.x
+* Copyright (C) 2003-2004 QLogic Corporation
+* (www.qlogic.com)
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of the GNU General Public License as published by the
+* Free Software Foundation; either version 2, or (at your option) any
+* later version.
+*
+* This program is distributed in the hope that it will be useful, but
+* WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+* General Public License for more details.
+**
+******************************************************************************/
+
+#ifndef __QLA_FW_H
+#define __QLA_FW_H
+
+// ISP24xx
+
+#define RISC_SADDRESS 0x100000
+#define MBS_CHECKSUM_ERROR 0x4010
+
+/*
+ * Firmware Options.
+ */
+#define FO1_ENABLE_PUREX BIT_10
+#define FO1_DISABLE_LED_CTRL BIT_6
+#define FO2_ENABLE_SEL_CLASS2 BIT_5
+#define FO3_NO_ABTS_ON_LINKDOWN BIT_14
+
+/*
+ * Port Database structure definition for ISP 24xx.
+ */
+#define PDO_FORCE_ADISC BIT_1
+#define PDO_FORCE_PLOGI BIT_0
+
+
+#define PORT_DATABASE_24XX_SIZE 64
+struct port_database_24xx {
+ uint16_t flags;
+#define PDF_TASK_RETRY_ID BIT_14
+#define PDF_FC_TAPE BIT_7
+#define PDF_ACK0_CAPABLE BIT_6
+#define PDF_FCP2_CONF BIT_5
+#define PDF_CLASS_2 BIT_4
+#define PDF_HARD_ADDR BIT_1
+
+ uint8_t current_login_state;
+ uint8_t last_login_state;
+#define PDS_PLOGI_PENDING 0x03
+#define PDS_PLOGI_COMPLETE 0x04
+#define PDS_PRLI_PENDING 0x05
+#define PDS_PRLI_COMPLETE 0x06
+#define PDS_PORT_UNAVAILABLE 0x07
+#define PDS_PRLO_PENDING 0x09
+#define PDS_LOGO_PENDING 0x11
+//FIXME
+#define PDS_PRLI2_PENDING 0x12
+
+ uint8_t hard_address[3];
+ uint8_t reserved_1;
+
+ uint8_t port_id[3];
+ uint8_t sequence_id;
+
+ uint16_t port_timer;
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint16_t receive_data_size;
+ uint16_t reserved_2;
+
+ uint8_t prli_svc_param_word_0[2]; /* Big endian */
+ /* Bits 15-0 of word 0 */
+ uint8_t prli_svc_param_word_3[2]; /* Big endian */
+ /* Bits 15-0 of word 3 */
+
+ uint8_t port_name[WWN_SIZE];
+ uint8_t node_name[WWN_SIZE];
+
+ uint8_t reserved_3[24];
+};
+
+struct nvram_24xx {
+ /* NVRAM header. */
+ uint8_t id[4];
+ uint16_t nvram_version;
+ uint16_t reserved_0;
+
+ /* Firmware Initialization Control Block. */
+ uint16_t version;
+ uint16_t reserved_1;
+ uint16_t frame_payload_size;
+ uint16_t execution_throttle;
+ uint16_t exchange_count;
+ uint16_t hard_address;
+
+ uint8_t port_name[WWN_SIZE];
+ uint8_t node_name[WWN_SIZE];
+
+ uint16_t login_retry_count;
+ uint16_t link_down_on_nos;
+ uint16_t interrupt_delay_timer;
+ uint16_t login_timeout;
+
+ uint32_t firmware_options_1;
+ uint32_t firmware_options_2;
+ uint32_t firmware_options_3;
+
+ /* Offset 56. */
+
+ /*
+ * BIT 0 = Control Enable
+ * BIT 1-15 =
+ *
+ * BIT 0-7 = Reserved
+ * BIT 8-10 = Output Swing 1G
+ * BIT 11-13 = Output Emphasis 1G
+ * BIT 14-15 = Reserved
+ *
+ * BIT 0-7 = Reserved
+ * BIT 8-10 = Output Swing 2G
+ * BIT 11-13 = Output Emphasis 2G
+ * BIT 14-15 = Reserved
+ *
+ * BIT 0-7 = Reserved
+ * BIT 8-10 = Output Swing 4G
+ * BIT 11-13 = Output Emphasis 4G
+ * BIT 14-15 = Reserved
+ */
+ uint16_t seriallink_options[4];
+
+ uint16_t reserved_2[16];
+
+ /* Offset 96. */
+ uint16_t reserved_3[16];
+
+ /* PCIe table entries. */
+ uint16_t reserved_4[16];
+
+ /* Offset 160. */
+ uint16_t reserved_5[16];
+
+ /* Offset 192. */
+ uint16_t reserved_6[16];
+
+ /* Offset 224. */
+ uint16_t reserved_7[16];
+
+ /*
+ * BIT 0 = Enable spinup delay
+ * BIT 1 = Disable BIOS
+ * BIT 2 = Enable Memory Map BIOS
+ * BIT 3 = Enable Selectable Boot
+ * BIT 4 = Disable RISC code load
+ * BIT 5 =
+ * BIT 6 =
+ * BIT 7 =
+ *
+ * BIT 8 =
+ * BIT 9 =
+ * BIT 10 = Enable lip full login
+ * BIT 11 = Enable target reset
+ * BIT 12 =
+ * BIT 13 =
+ * BIT 14 =
+ * BIT 15 = Enable alternate WWN
+ *
+ * BIT 16-31 =
+ */
+ uint32_t host_p;
+
+ uint8_t alternate_port_name[WWN_SIZE];
+ uint8_t alternate_node_name[WWN_SIZE];
+
+ uint8_t boot_port_name[WWN_SIZE];
+ uint16_t boot_lun_number;
+ uint16_t reserved_8;
+
+ uint8_t alt1_boot_port_name[WWN_SIZE];
+ uint16_t alt1_boot_lun_number;
+ uint16_t reserved_9;
+
+ uint8_t alt2_boot_port_name[WWN_SIZE];
+ uint16_t alt2_boot_lun_number;
+ uint16_t reserved_10;
+
+ uint8_t alt3_boot_port_name[WWN_SIZE];
+ uint16_t alt3_boot_lun_number;
+ uint16_t reserved_11;
+
+ /*
+ * BIT 0 = Selective Login
+ * BIT 1 = Alt-Boot Enable
+ * BIT 2 = Reserved
+ * BIT 3 = Boot Order List
+ * BIT 4 = Reserved
+ * BIT 5 = Selective LUN
+ * BIT 6 = Reserved
+ * BIT 7-31 =
+ */
+ uint32_t efi_parameters;
+
+ uint8_t reset_delay;
+ uint8_t reserved_12;
+ uint16_t reserved_13;
+
+ uint16_t boot_id_number;
+ uint16_t reserved_14;
+
+ uint16_t max_luns_per_target;
+ uint16_t reserved_15;
+
+ uint16_t port_down_retry_count;
+ uint16_t link_down_timeout;
+
+ /* FCode parameters. */
+ uint16_t fcode_parameter;
+
+ uint16_t reserved_16[3];
+
+ /* Offset 352. */
+ uint8_t prev_drv_ver_major;
+ uint8_t prev_drv_ver_submajob;
+ uint8_t prev_drv_ver_minor;
+ uint8_t prev_drv_ver_subminor;
+
+ uint16_t prev_bios_ver_major;
+ uint16_t prev_bios_ver_minor;
+
+ uint16_t prev_efi_ver_major;
+ uint16_t prev_efi_ver_minor;
+
+ uint16_t prev_fw_ver_major;
+ uint8_t prev_fw_ver_minor;
+ uint8_t prev_fw_ver_subminor;
+
+ uint16_t reserved_17[8];
+
+ /* Offset 384. */
+ uint16_t reserved_18[16];
+
+ /* Offset 416. */
+ uint16_t reserved_19[16];
+
+ /* Offset 448. */
+ uint16_t reserved_20[16];
+
+ /* Offset 480. */
+ uint8_t model_name[16];
+
+ uint16_t reserved_21[2];
+
+ /* Offset 500. */
+ /* HW Parameter Block. */
+ uint16_t pcie_table_sig;
+ uint16_t pcie_table_offset;
+
+ uint16_t subsystem_vendor_id;
+ uint16_t subsystem_device_id;
+
+ uint32_t checksum;
+};
+
+/*
+ * ISP Initialization Control Block.
+ * Little endian except where noted.
+ */
+#define ICB_VERSION 1
+struct init_cb_24xx {
+ uint16_t version;
+ uint16_t reserved_1;
+
+ uint16_t frame_payload_size;
+ uint16_t execution_throttle;
+ uint16_t exchange_count;
+
+ uint16_t hard_address;
+
+ uint8_t port_name[WWN_SIZE]; /* Big endian. */
+ uint8_t node_name[WWN_SIZE]; /* Big endian. */
+
+ uint16_t response_q_inpointer;
+ uint16_t request_q_outpointer;
+
+ uint16_t login_retry_count;
+
+ uint16_t prio_request_q_outpointer;
+
+ uint16_t response_q_length;
+ uint16_t request_q_length;
+
+ uint16_t link_down_timeout; /* Milliseconds. */
+
+ uint16_t prio_request_q_length;
+
+ uint32_t request_q_address[2];
+ uint32_t response_q_address[2];
+ uint32_t prio_request_q_address[2];
+
+ uint8_t reserved_2[8];
+
+ uint16_t atio_q_inpointer;
+ uint16_t atio_q_length;
+ uint32_t atio_q_address[2];
+
+ uint16_t interrupt_delay_timer; /* 100us increments. */
+ uint16_t login_timeout;
+
+ /*
+ * BIT 0 = Enable Hard Loop Id
+ * BIT 1 = Enable Fairness
+ * BIT 2 = Enable Full-Duplex
+ * BIT 3 = Reserved
+ * BIT 4 = Enable Target Mode
+ * BIT 5 = Disable Initiator Mode
+ * BIT 6 = Reserved
+ * BIT 7 = Reserved
+ *
+ * BIT 8 = Reserved
+ * BIT 9 = Non Participating LIP
+ * BIT 10 = Descending Loop ID Search
+ * BIT 11 = Acquire Loop ID in LIPA
+ * BIT 12 = Reserved
+ * BIT 13 = Full Login after LIP
+ * BIT 14 = Node Name Option
+ * BIT 15-31 = Reserved
+ */
+ uint32_t firmware_options_1;
+
+ /*
+ * BIT 0 = Operation Mode bit 0
+ * BIT 1 = Operation Mode bit 1
+ * BIT 2 = Operation Mode bit 2
+ * BIT 3 = Operation Mode bit 3
+ * BIT 4 = Connection Options bit 0
+ * BIT 5 = Connection Options bit 1
+ * BIT 6 = Connection Options bit 2
+ * BIT 7 = Enable Non part on LIHA failure
+ *
+ * BIT 8 = Enable Class 2
+ * BIT 9 = Enable ACK0
+ * BIT 10 = Reserved
+ * BIT 11 = Enable FC-SP Security
+ * BIT 12 = FC Tape Enable
+ * BIT 13-31 = Reserved
+ */
+ uint32_t firmware_options_2;
+
+ /*
+ * BIT 0 = Reserved
+ * BIT 1 = Soft ID only
+ * BIT 2 = Reserved
+ * BIT 3 = Reserved
+ * BIT 4 = FCP RSP Payload bit 0
+ * BIT 5 = FCP RSP Payload bit 1
+ * BIT 6 = Enable Receive Out-of-Order data frame handling
+ * BIT 7 = Disable Automatic PLOGI on Local Loop
+ *
+ * BIT 8 = Reserved
+ * BIT 9 = Enable Out-of-Order FCP_XFER_RDY relative offset handling
+ * BIT 10 = Reserved
+ * BIT 11 = Reserved
+ * BIT 12 = Reserved
+ * BIT 13 = Data Rate bit 0
+ * BIT 14 = Data Rate bit 1
+ * BIT 15 = Data Rate bit 2
+ * BIT 16-31 = Reserved
+ */
+ uint32_t firmware_options_3;
+
+ uint8_t reserved_3[24];
+};
+
+/*
+ * ISP queue - command entry structure definition.
+ */
+#define COMMAND_TYPE_6 0x48 /* Command Type 6 entry */
+struct cmd_type_6 {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+ uint16_t timeout; /* Command timeout. */
+
+ uint16_t dseg_count; /* Data segment count. */
+
+ uint16_t fcp_rsp_dsd_len; /* FCP_RSP DSD length. */
+
+ uint8_t lun[8]; /* FCP LUN (BE). */
+
+ uint16_t control_flags; /* Control flags. */
+#define CF_DATA_SEG_DESCR_ENABLE BIT_2
+#define CF_READ_DATA BIT_1
+#define CF_WRITE_DATA BIT_0
+
+ uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
+ uint32_t fcp_cmnd_dseg_address[2]; /* Data segment address. */
+
+ uint32_t fcp_rsp_dseg_address[2]; /* Data segment address. */
+
+ uint32_t byte_count; /* Total byte count. */
+
+ uint8_t port_id[3]; /* PortID of destination port. */
+ uint8_t vp_index;
+
+ uint32_t fcp_data_dseg_address[2]; /* Data segment address. */
+ uint16_t fcp_data_dseg_len; /* Data segment length. */
+ uint16_t reserved_1; /* MUST be set to 0. */
+};
+
+#define COMMAND_TYPE_7 0x18 /* Command Type 7 entry */
+struct cmd_type_7 {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+ uint16_t timeout; /* Command timeout. */
+#define FW_MAX_TIMEOUT 0x1999
+
+ uint16_t dseg_count; /* Data segment count. */
+ uint16_t reserved_1;
+
+ uint8_t lun[8]; /* FCP LUN (BE). */
+
+ uint16_t task_mgmt_flags; /* Task management flags. */
+#define TMF_CLEAR_ACA BIT_14
+#define TMF_TARGET_RESET BIT_13
+#define TMF_LUN_RESET BIT_12
+#define TMF_CLEAR_TASK_SET BIT_10
+#define TMF_ABORT_TASK_SET BIT_9
+#define TMF_READ_DATA BIT_1
+#define TMF_WRITE_DATA BIT_0
+
+ uint8_t task;
+#define TSK_SIMPLE 0
+#define TSK_HEAD_OF_QUEUE 1
+#define TSK_ORDERED 2
+#define TSK_ACA 4
+#define TSK_UNTAGGED 5
+
+ uint8_t crn;
+
+ uint8_t fcp_cdb[MAX_CMDSZ]; /* SCSI command words. */
+ uint32_t byte_count; /* Total byte count. */
+
+ uint8_t port_id[3]; /* PortID of destination port. */
+ uint8_t vp_index;
+
+ uint32_t dseg_0_address[2]; /* Data segment 0 address. */
+ uint32_t dseg_0_len; /* Data segment 0 length. */
+};
+
+/*
+ * ISP queue - status entry structure definition.
+ */
+#define STATUS_TYPE 0x03 /* Status entry. */
+struct sts_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t comp_status; /* Completion status. */
+ uint16_t ox_id; /* OX_ID used by the firmware. */
+
+ uint32_t residual_len; /* Residual transfer length. */
+
+ uint16_t reserved_1;
+ uint16_t state_flags; /* State flags. */
+#define SF_TRANSFERRED_DATA BIT_11
+#define SF_FCP_RSP_DMA BIT_0
+
+ uint16_t reserved_2;
+ uint16_t scsi_status; /* SCSI status. */
+#define SS_CONFIRMATION_REQ BIT_12
+
+ uint32_t rsp_residual_count; /* FCP RSP residual count. */
+
+ uint32_t sense_len; /* FCP SENSE length. */
+ uint32_t rsp_data_len; /* FCP response data length. */
+
+ uint8_t data[28]; /* FCP response/sense information. */
+};
+
+/*
+ * Status entry completion status
+ */
+#define CS_DATA_REASSEMBLY_ERROR 0x11 /* Data Reassembly Error.. */
+#define CS_ABTS_BY_TARGET 0x13 /* Target send ABTS to abort IOCB. */
+#define CS_FW_RESOURCE 0x2C /* Firmware Resource Unavailable. */
+#define CS_TASK_MGMT_OVERRUN 0x30 /* Task management overrun (8+). */
+#define CS_ABORT_BY_TARGET 0x47 /* Abort By Target. */
+
+/*
+ * ISP queue - marker entry structure definition.
+ */
+#define MARKER_TYPE 0x04 /* Marker entry. */
+struct mrk_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t handle_count; /* Handle count. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint8_t modifier; /* Modifier (7-0). */
+#define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */
+#define MK_SYNC_ID 1 /* Synchronize ID */
+#define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */
+ uint8_t reserved_1;
+
+ uint8_t reserved_2;
+ uint8_t vp_index;
+
+ uint16_t reserved_3;
+
+ uint8_t lun[8]; /* FCP LUN (BE). */
+ uint8_t reserved_4[40];
+};
+
+/*
+ * ISP queue - CT Pass-Through entry structure definition.
+ */
+#define CT_IOCB_TYPE 0x29 /* CT Pass-Through IOCB entry */
+struct ct_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System Defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t comp_status; /* Completion status. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint16_t cmd_dsd_count;
+
+ uint8_t vp_index;
+ uint8_t reserved_1;
+
+ uint16_t timeout; /* Command timeout. */
+ uint16_t reserved_2;
+
+ uint16_t rsp_dsd_count;
+
+ uint8_t reserved_3[10];
+
+ uint32_t rsp_byte_count;
+ uint32_t cmd_byte_count;
+
+ uint32_t dseg_0_address[2]; /* Data segment 0 address. */
+ uint32_t dseg_0_len; /* Data segment 0 length. */
+ uint32_t dseg_1_address[2]; /* Data segment 1 address. */
+ uint32_t dseg_1_len; /* Data segment 1 length. */
+};
+
+/*
+ * ISP queue - ELS Pass-Through entry structure definition.
+ */
+#define ELS_IOCB_TYPE 0x53 /* ELS Pass-Through IOCB entry */
+struct els_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System Defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t reserved_1;
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint16_t tx_dsd_count;
+
+ uint8_t vp_index;
+ uint8_t sof_type;
+#define EST_SOFI3 (1 << 4)
+#define EST_SOFI2 (3 << 4)
+
+ uint32_t rx_xchg_address[2]; /* Receive exchange address. */
+ uint16_t rx_dsd_count;
+
+ uint8_t opcode;
+ uint8_t reserved_2;
+
+ uint8_t port_id[3];
+ uint8_t reserved_3;
+
+ uint16_t reserved_4;
+
+ uint16_t control_flags; /* Control flags. */
+#define ECF_PAYLOAD_DESCR_MASK (BIT_15|BIT_14|BIT_13)
+#define EPD_ELS_COMMAND (0 << 13)
+#define EPD_ELS_ACC (1 << 13)
+#define EPD_ELS_RJT (2 << 13)
+#define EPD_RX_XCHG (3 << 13)
+#define ECF_CLR_PASSTHRU_PEND BIT_12
+#define ECF_INCL_FRAME_HDR BIT_11
+
+ uint32_t rx_byte_count;
+ uint32_t tx_byte_count;
+
+ uint32_t tx_address[2]; /* Data segment 0 address. */
+ uint32_t tx_len; /* Data segment 0 length. */
+ uint32_t rx_address[2]; /* Data segment 1 address. */
+ uint32_t rx_len; /* Data segment 1 length. */
+};
+
+/*
+ * ISP queue - Mailbox Command entry structure definition.
+ */
+#define MBX_IOCB_TYPE 0x39
+struct mbx_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t handle_count; /* Handle count. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t mbx[28];
+};
+
+
+#define LOGINOUT_PORT_IOCB_TYPE 0x52 /* Login/Logout Port entry. */
+struct logio_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t comp_status; /* Completion status. */
+#define CS_LOGIO_ERROR 0x31 /* Login/Logout IOCB error. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint16_t control_flags; /* Control flags. */
+ /* Modifiers. */
+#define LCF_FCP2_OVERRIDE BIT_9 /* Set/Reset word 3 of PRLI. */
+#define LCF_CLASS_2 BIT_8 /* Enable class 2 during PLOGI. */
+#define LCF_FREE_NPORT BIT_7 /* Release NPORT handle after LOGO. */
+#define LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */
+#define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */
+#define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */
+#define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */
+#define LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */
+#define LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */
+ /* Commands. */
+#define LCF_COMMAND_PLOGI 0x00 /* PLOGI. */
+#define LCF_COMMAND_PRLI 0x01 /* PRLI. */
+#define LCF_COMMAND_PDISC 0x02 /* PDISC. */
+#define LCF_COMMAND_ADISC 0x03 /* ADISC. */
+#define LCF_COMMAND_LOGO 0x08 /* LOGO. */
+#define LCF_COMMAND_PRLO 0x09 /* PRLO. */
+#define LCF_COMMAND_TPRLO 0x0A /* TPRLO. */
+
+ uint8_t vp_index;
+ uint8_t reserved_1;
+
+ uint8_t port_id[3]; /* PortID of destination port. */
+
+ uint8_t rsp_size; /* Response size in 32bit words. */
+
+ uint32_t io_parameter[11]; /* General I/O parameters. */
+#define LSC_SCODE_NOLINK 0x01
+#define LSC_SCODE_NOIOCB 0x02
+#define LSC_SCODE_NOXCB 0x03
+#define LSC_SCODE_CMD_FAILED 0x04
+#define LSC_SCODE_NOFABRIC 0x05
+#define LSC_SCODE_FW_NOT_READY 0x07
+#define LSC_SCODE_NOT_LOGGED_IN 0x09
+#define LSC_SCODE_NOPCB 0x0A
+
+#define LSC_SCODE_ELS_REJECT 0x18
+#define LSC_SCODE_CMD_PARAM_ERR 0x19
+#define LSC_SCODE_PORTID_USED 0x1A
+#define LSC_SCODE_NPORT_USED 0x1B
+#define LSC_SCODE_NONPORT 0x1C
+#define LSC_SCODE_LOGGED_IN 0x1D
+#define LSC_SCODE_NOFLOGI_ACC 0x1F
+};
+
+#define TSK_MGMT_IOCB_TYPE 0x14
+struct tsk_mgmt_entry {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t handle_count; /* Handle count. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+
+ uint16_t reserved_1;
+
+ uint16_t delay; /* Activity delay in seconds. */
+
+ uint16_t timeout; /* Command timeout. */
+
+ uint8_t lun[8]; /* FCP LUN (BE). */
+
+ uint32_t control_flags; /* Control Flags. */
+#define TCF_NOTMCMD_TO_TARGET BIT_31
+#define TCF_LUN_RESET BIT_4
+#define TCF_ABORT_TASK_SET BIT_3
+#define TCF_CLEAR_TASK_SET BIT_2
+#define TCF_TARGET_RESET BIT_1
+#define TCF_CLEAR_ACA BIT_0
+
+ uint8_t reserved_2[20];
+
+ uint8_t port_id[3]; /* PortID of destination port. */
+ uint8_t vp_index;
+
+ uint8_t reserved_3[12];
+};
+
+#define ABORT_IOCB_TYPE 0x33
+struct abort_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t handle_count; /* Handle count. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t nport_handle; /* N_PORT handle. */
+ /* or Completion status. */
+
+ uint16_t options; /* Options. */
+#define AOF_NO_ABTS BIT_0 /* Do not send any ABTS. */
+
+ uint32_t handle_to_abort; /* System handle to abort. */
+
+ uint8_t reserved_1[32];
+
+ uint8_t port_id[3]; /* PortID of destination port. */
+ uint8_t vp_index;
+
+ uint8_t reserved_2[12];
+};
+
+/*
+ * ISP I/O Register Set structure definitions.
+ */
+struct device_reg_24xx {
+ volatile uint32_t flash_addr; /* Flash/NVRAM BIOS address. */
+#define FARX_DATA_FLAG BIT_31
+#define FARX_ACCESS_FLASH_CONF 0x7FFD0000
+#define FARX_ACCESS_FLASH_DATA 0x7FF00000
+#define FARX_ACCESS_NVRAM_CONF 0x7FFF0000
+#define FARX_ACCESS_NVRAM_DATA 0x7FFE0000
+
+#define FA_NVRAM_FUNC0_ADDR 0x80
+#define FA_NVRAM_FUNC1_ADDR 0x180
+
+#define FA_NVRAM_VPD_SIZE 0x80
+#define FA_NVRAM_VPD0_ADDR 0x00
+#define FA_NVRAM_VPD1_ADDR 0x100
+ /*
+ * RISC code begins at offset 512KB
+ * within flash. Consisting of two
+ * contiguous RISC code segments.
+ */
+#define FA_RISC_CODE_ADDR 0x20000
+#define FA_RISC_CODE_SEGMENTS 2
+
+ volatile uint32_t flash_data; /* Flash/NVRAM BIOS data. */
+
+ volatile uint32_t ctrl_status; /* Control/Status. */
+#define CSRX_FLASH_ACCESS_ERROR BIT_18 /* Flash/NVRAM Access Error. */
+#define CSRX_DMA_ACTIVE BIT_17 /* DMA Active status. */
+#define CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */
+#define CSRX_FUNCTION BIT_15 /* Function number. */
+ /* PCI-X Bus Mode. */
+#define CSRX_PCIX_BUS_MODE_MASK (BIT_11|BIT_10|BIT_9|BIT_8)
+#define PBM_PCI_33MHZ (0 << 8)
+#define PBM_PCIX_M1_66MHZ (1 << 8)
+#define PBM_PCIX_M1_100MHZ (2 << 8)
+#define PBM_PCIX_M1_133MHZ (3 << 8)
+#define PBM_PCIX_M2_66MHZ (5 << 8)
+#define PBM_PCIX_M2_100MHZ (6 << 8)
+#define PBM_PCIX_M2_133MHZ (7 << 8)
+#define PBM_PCI_66MHZ (8 << 8)
+ /* Max Write Burst byte count. */
+#define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)
+#define MWB_512_BYTES (0 << 4)
+#define MWB_1024_BYTES (1 << 4)
+#define MWB_2048_BYTES (2 << 4)
+#define MWB_4096_BYTES (3 << 4)
+
+#define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */
+#define CSRX_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable. */
+#define CSRX_ISP_SOFT_RESET BIT_0 /* ISP soft reset. */
+
+ volatile uint32_t ictrl; /* Interrupt control. */
+#define ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */
+
+ volatile uint32_t istatus; /* Interrupt status. */
+#define ISRX_RISC_INT BIT_3 /* RISC interrupt. */
+
+ uint32_t unused_1[2]; /* Gap. */
+
+ /* Request Queue. */
+ volatile uint32_t req_q_in; /* In-Pointer. */
+ volatile uint32_t req_q_out; /* Out-Pointer. */
+ /* Response Queue. */
+ volatile uint32_t rsp_q_in; /* In-Pointer. */
+ volatile uint32_t rsp_q_out; /* Out-Pointer. */
+ /* Priority Request Queue. */
+ volatile uint32_t preq_q_in; /* In-Pointer. */
+ volatile uint32_t preq_q_out; /* Out-Pointer. */
+
+ uint32_t unused_2[2]; /* Gap. */
+
+ /* ATIO Queue. */
+ volatile uint32_t atio_q_in; /* In-Pointer. */
+ volatile uint32_t atio_q_out; /* Out-Pointer. */
+
+ volatile uint32_t host_status;
+#define HSRX_RISC_INT BIT_15 /* RISC to Host interrupt. */
+#define HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */
+
+ volatile uint32_t hccr; /* Host command & control register. */
+ /* HCCR statuses. */
+#define HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */
+#define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */
+#define HCCRX_RISC_PAUSE BIT_4 /* RISC Pause mode bit. */
+ /* HCCR commands. */
+ /* NOOP. */
+#define HCCRX_NOOP 0x00000000
+ /* Set RISC Reset. */
+#define HCCRX_SET_RISC_RESET 0x10000000
+ /* Clear RISC Reset. */
+#define HCCRX_CLR_RISC_RESET 0x20000000
+ /* Set RISC Pause. */
+#define HCCRX_SET_RISC_PAUSE 0x30000000
+ /* Releases RISC Pause. */
+#define HCCRX_REL_RISC_PAUSE 0x40000000
+ /* Set HOST to RISC interrupt. */
+#define HCCRX_SET_HOST_INT 0x50000000
+ /* Clear HOST to RISC interrupt. */
+#define HCCRX_CLR_HOST_INT 0x60000000
+ /* Clear RISC to PCI interrupt. */
+#define HCCRX_CLR_RISC_INT 0xA0000000
+
+ volatile uint32_t gpiod; /* GPIO Data register. */
+ /* LED update mask. */
+#define GPDX_LED_UPDATE_MASK (BIT_20|BIT_19|BIT_18)
+ /* Data update mask. */
+#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16)
+ /* LED control mask. */
+#define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)
+ /* LED bit values. Color names as
+ * referenced in fw spec.
+ */
+#define GPDX_LED_YELLOW_ON BIT_2
+#define GPDX_LED_GREEN_ON BIT_3
+#define GPDX_LED_AMBER_ON BIT_4
+ /* Data in/out. */
+#define GPDX_DATA_INOUT (BIT_1|BIT_0)
+
+ volatile uint32_t gpioe; /* GPIO Enable register. */
+ /* Enable update mask. */
+#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16)
+ /* Enable. */
+#define GPEX_ENABLE (BIT_1|BIT_0)
+
+ volatile uint32_t iobase_addr; /* I/O Bus Base Address register. */
+
+ uint32_t unused_3[10]; /* Gap. */
+
+ volatile uint16_t mailbox0;
+ volatile uint16_t mailbox1;
+ volatile uint16_t mailbox2;
+ volatile uint16_t mailbox3;
+ volatile uint16_t mailbox4;
+ volatile uint16_t mailbox5;
+ volatile uint16_t mailbox6;
+ volatile uint16_t mailbox7;
+ volatile uint16_t mailbox8;
+ volatile uint16_t mailbox9;
+ volatile uint16_t mailbox10;
+ volatile uint16_t mailbox11;
+ volatile uint16_t mailbox12;
+ volatile uint16_t mailbox13;
+ volatile uint16_t mailbox14;
+ volatile uint16_t mailbox15;
+ volatile uint16_t mailbox16;
+ volatile uint16_t mailbox17;
+ volatile uint16_t mailbox18;
+ volatile uint16_t mailbox19;
+ volatile uint16_t mailbox20;
+ volatile uint16_t mailbox21;
+ volatile uint16_t mailbox22;
+ volatile uint16_t mailbox23;
+ volatile uint16_t mailbox24;
+ volatile uint16_t mailbox25;
+ volatile uint16_t mailbox26;
+ volatile uint16_t mailbox27;
+ volatile uint16_t mailbox28;
+ volatile uint16_t mailbox29;
+ volatile uint16_t mailbox30;
+ volatile uint16_t mailbox31;
+};
+
+/* MID Support ***************************************************************/
+
+#define MAX_MID_VPS 125
+
+struct mid_conf_entry_24xx {
+ uint16_t reserved_1;
+
+ /*
+ * BIT 0 = Enable Hard Loop Id
+ * BIT 1 = Acquire Loop ID in LIPA
+ * BIT 2 = ID not Acquired
+ * BIT 3 = Enable VP
+ * BIT 4 = Enable Initiator Mode
+ * BIT 5 = Disable Target Mode
+ * BIT 6-7 = Reserved
+ */
+ uint8_t options;
+
+ uint8_t hard_address;
+
+ uint8_t port_name[WWN_SIZE];
+ uint8_t node_name[WWN_SIZE];
+};
+
+struct mid_init_cb_24xx {
+ struct init_cb_24xx init_cb;
+
+ uint16_t count;
+ uint16_t options;
+
+ struct mid_conf_entry_24xx entries[MAX_MID_VPS];
+};
+
+
+struct mid_db_entry_24xx {
+ uint16_t status;
+#define MDBS_NON_PARTIC BIT_3
+#define MDBS_ID_ACQUIRED BIT_1
+#define MDBS_ENABLED BIT_0
+
+ uint8_t options;
+ uint8_t hard_address;
+
+ uint8_t port_name[WWN_SIZE];
+ uint8_t node_name[WWN_SIZE];
+
+ uint8_t port_id[3];
+ uint8_t reserved_1;
+};
+
+struct mid_db_24xx {
+ struct mid_db_entry_24xx entries[MAX_MID_VPS];
+};
+
+#define VP_CTRL_IOCB_TYPE 0x30 /* Vitual Port Control entry. */
+struct vp_ctrl_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t vp_idx_failed;
+
+ uint16_t comp_status; /* Completion status. */
+#define CS_VCE_ACQ_ID_ERROR 0x02 /* Error while acquireing ID. */
+#define CS_VCE_BUSY 0x05 /* Firmware not ready to accept cmd. */
+
+ uint16_t command;
+#define VCE_COMMAND_ENABLE_VPS 0x00 /* Enable VPs. */
+#define VCE_COMMAND_DISABLE_VPS 0x08 /* Disable VPs. */
+#define VCE_COMMAND_DISABLE_VPS_REINIT 0x09 /* Disable VPs and reinit link. */
+#define VCE_COMMAND_DISABLE_VPS_LOGO 0x0a /* Disable VPs and LOGO ports. */
+
+ uint16_t vp_count;
+
+ uint8_t vp_idx_map[16];
+
+ uint8_t reserved_4[32];
+};
+
+#define VP_CONFIG_IOCB_TYPE 0x31 /* Vitual Port Config entry. */
+struct vp_config_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t reserved_1;
+
+ uint16_t comp_status; /* Completion status. */
+#define CS_VCT_STS_ERROR 0x01 /* Specified VPs were not disabled. */
+#define CS_VCT_CNT_ERROR 0x02 /* Invalid VP count. */
+#define CS_VCT_ERROR 0x03 /* Unknown error. */
+#define CS_VCT_IDX_ERROR 0x02 /* Invalid VP index. */
+#define CS_VCT_BUSY 0x05 /* Firmware not ready to accept cmd. */
+
+ uint8_t command;
+#define VCT_COMMAND_MOD_VPS 0x00 /* Enable VPs. */
+#define VCT_COMMAND_MOD_ENABLE_VPS 0x08 /* Disable VPs. */
+
+ uint8_t vp_count;
+
+ uint8_t vp_idx1;
+ uint8_t vp_idx2;
+
+ uint8_t options_idx1;
+ uint8_t hard_address_idx1;
+ uint16_t reserved_2;
+ uint8_t port_name_idx1[WWN_SIZE];
+ uint8_t node_name_idx1[WWN_SIZE];
+
+ uint8_t options_idx2;
+ uint8_t hard_address_idx2;
+ uint16_t reserved_3;
+ uint8_t port_name_idx2[WWN_SIZE];
+ uint8_t node_name_idx2[WWN_SIZE];
+
+ uint8_t reserved_4[8];
+};
+
+#define VP_RPT_ID_IOCB_TYPE 0x32 /* Report ID Acquisition entry. */
+struct vp_rpt_id_entry_24xx {
+ uint8_t entry_type; /* Entry type. */
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+
+ uint32_t handle; /* System handle. */
+
+ uint16_t vp_count; /* Format 0 -- | VP setup | VP acq |. */
+ /* Format 1 -- | VP count |. */
+ uint16_t vp_idx; /* Format 0 -- Reserved. */
+ /* Format 1 -- VP status and index. */
+
+ uint8_t port_id[3];
+ uint8_t format;
+
+ uint8_t vp_idx_map[16];
+
+ uint8_t reserved_4[32];
+};
+
+/* END MID Support ***********************************************************/
+#endif
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -1368,8 +1368,6 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
/*
* Set host adapter parameters.
*/
- ha->nvram_version = nv->nvram_version;
-
ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
/* Always load RISC code on non ISP2[12]00 chips. */
if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
@@ -2141,7 +2139,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_ho
loop_id = ha->min_external_loopid;
for (; loop_id <= ha->last_loop_id; loop_id++) {
- if (RESERVED_LOOP_ID(loop_id))
+ if (qla2x00_is_reserved_id(ha, loop_id))
continue;
if (atomic_read(&ha->loop_down_timer) ||
@@ -2311,7 +2309,7 @@ qla2x00_find_new_loop_id(scsi_qla_host_t
}
/* Skip reserved loop IDs. */
- while (RESERVED_LOOP_ID(dev->loop_id)) {
+ while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
dev->loop_id++;
}
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
--- a/drivers/scsi/qla2xxx/qla_inline.h
+++ b/drivers/scsi/qla2xxx/qla_inline.h
@@ -273,3 +273,14 @@ qla2x00_delete_timer_from_cmd(srb_t *sp)
}
}
+
+static inline int qla2x00_is_reserved_id(scsi_qla_host_t *, uint16_t);
+static inline int
+qla2x00_is_reserved_id(scsi_qla_host_t *ha, uint16_t loop_id)
+{
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return (loop_id > NPH_LAST_HANDLE);
+
+ return ((loop_id > ha->last_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
+ loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST);
+};
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/11] qla2xxx: Add ISP24xx diagnostic routines.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
2005-06-14 5:31 ` [PATCH 1/11] qla2xxx: Add ISP24xx definitions Andrew Vasquez
@ 2005-06-14 5:31 ` Andrew Vasquez
2005-06-14 5:31 ` [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines Andrew Vasquez
` (8 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:31 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Add ISP24xx diagnostic routines.
Add function and structure definitions for the ISP24xx
diagnostic firmware dump routines.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_dbg.c | 1194 ++++++++++++++++++++++++++++++++++++++++
drivers/scsi/qla2xxx/qla_dbg.h | 32 +
drivers/scsi/qla2xxx/qla_gbl.h | 3
3 files changed, 1229 insertions(+), 0 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -975,6 +975,1185 @@ qla_uprintf(char **uiter, char *fmt, ...
return (len);
}
+
+void
+qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
+{
+ int rval;
+ uint32_t cnt, timer;
+ uint32_t risc_address;
+ uint16_t mb[4];
+
+ uint32_t stat;
+ struct device_reg_24xx __iomem *reg;
+ uint32_t __iomem *dmp_reg;
+ uint32_t *iter_reg;
+ uint16_t __iomem *mbx_reg;
+ unsigned long flags;
+ struct qla24xx_fw_dump *fw;
+ uint32_t ext_mem_cnt;
+
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ risc_address = ext_mem_cnt = 0;
+ memset(mb, 0, sizeof(mb));
+ flags = 0;
+
+ if (!hardware_locked)
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+
+ if (!ha->fw_dump24) {
+ qla_printk(KERN_WARNING, ha,
+ "No buffer available for dump!!!\n");
+ goto qla24xx_fw_dump_failed;
+ }
+
+ if (ha->fw_dumped) {
+ qla_printk(KERN_WARNING, ha,
+ "Firmware has been previously dumped (%p) -- ignoring "
+ "request...\n", ha->fw_dump24);
+ goto qla24xx_fw_dump_failed;
+ }
+ fw = (struct qla24xx_fw_dump *) ha->fw_dump24;
+
+ rval = QLA_SUCCESS;
+ fw->hccr = RD_REG_DWORD(®->hccr);
+
+ /* Pause RISC. */
+ if ((fw->hccr & HCCRX_RISC_PAUSE) == 0) {
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET |
+ HCCRX_CLR_HOST_INT);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
+ for (cnt = 30000;
+ (RD_REG_DWORD(®->hccr) & HCCRX_RISC_PAUSE) == 0 &&
+ rval == QLA_SUCCESS; cnt--) {
+ if (cnt)
+ udelay(100);
+ else
+ rval = QLA_FUNCTION_TIMEOUT;
+ }
+ }
+
+ /* Disable interrupts. */
+ WRT_REG_DWORD(®->ictrl, 0);
+ RD_REG_DWORD(®->ictrl);
+
+ if (rval == QLA_SUCCESS) {
+ /* Host interface registers. */
+ dmp_reg = (uint32_t __iomem *)(reg + 0);
+ for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
+ fw->host_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ /* Mailbox registers. */
+ mbx_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
+ for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
+ fw->mailbox_reg[cnt] = RD_REG_WORD(mbx_reg++);
+
+ /* Transfer sequence registers. */
+ iter_reg = fw->xseq_gp_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0xBF00);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF10);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF20);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF30);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF40);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF50);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF60);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBF70);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBFE0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->xseq_0_reg) / 4; cnt++)
+ fw->xseq_0_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xBFF0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->xseq_1_reg) / 4; cnt++)
+ fw->xseq_1_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ /* Receive sequence registers. */
+ iter_reg = fw->rseq_gp_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0xFF00);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF10);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF20);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF30);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF40);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF50);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF60);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFF70);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFFD0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->rseq_0_reg) / 4; cnt++)
+ fw->rseq_0_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFFE0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->rseq_1_reg) / 4; cnt++)
+ fw->rseq_1_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0xFFF0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->rseq_2_reg) / 4; cnt++)
+ fw->rseq_2_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ /* Command DMA registers. */
+ WRT_REG_DWORD(®->iobase_addr, 0x7100);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->cmd_dma_reg) / 4; cnt++)
+ fw->cmd_dma_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ /* Queues. */
+ iter_reg = fw->req0_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7200);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 8; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xE4);
+ for (cnt = 0; cnt < 7; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->resp0_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7300);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 8; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xE4);
+ for (cnt = 0; cnt < 7; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->req1_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7400);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 8; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xE4);
+ for (cnt = 0; cnt < 7; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ /* Transmit DMA registers. */
+ iter_reg = fw->xmt0_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7600);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7610);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->xmt1_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7620);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7630);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->xmt2_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7640);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7650);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->xmt3_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7660);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7670);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->xmt4_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7680);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7690);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x76A0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < sizeof(fw->xmt_data_dma_reg) / 4; cnt++)
+ fw->xmt_data_dma_reg[cnt] = RD_REG_DWORD(dmp_reg++);
+
+ /* Receive DMA registers. */
+ iter_reg = fw->rcvt0_data_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7700);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7710);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ iter_reg = fw->rcvt1_data_dma_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x7720);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x7730);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ /* RISC registers. */
+ iter_reg = fw->risc_gp_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x0F00);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F10);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F20);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F30);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F40);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F50);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F60);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F70);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x0F70);
+ RD_REG_DWORD(®->iobase_addr);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0000000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[0] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0100000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[1] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0200000);
+ dmp_reg = (uint32_t *)((uint8_t *)reg + 0xFC);
+ fw->shadow_reg[2] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0300000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[3] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0400000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[4] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0500000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[5] = RD_REG_DWORD(dmp_reg);
+
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xF0);
+ WRT_REG_DWORD(dmp_reg, 0xB0600000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xFC);
+ fw->shadow_reg[6] = RD_REG_DWORD(dmp_reg);
+
+ /* Local memory controller registers. */
+ iter_reg = fw->lmc_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x3000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3010);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3020);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3030);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3040);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3050);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x3060);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ /* Fibre Protocol Module registers. */
+ iter_reg = fw->fpm_hdw_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x4000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4010);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4020);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4030);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4040);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4050);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4060);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4070);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4080);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x4090);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x40A0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x40B0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ /* Frame Buffer registers. */
+ iter_reg = fw->fb_hdw_reg;
+ WRT_REG_DWORD(®->iobase_addr, 0x6000);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6010);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6020);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6030);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6040);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6100);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6130);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6150);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6170);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x6190);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ WRT_REG_DWORD(®->iobase_addr, 0x61B0);
+ dmp_reg = (uint32_t __iomem *)((uint8_t __iomem *)reg + 0xC0);
+ for (cnt = 0; cnt < 16; cnt++)
+ *iter_reg++ = RD_REG_DWORD(dmp_reg++);
+
+ /* Reset RISC. */
+ WRT_REG_DWORD(®->ctrl_status,
+ CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_DWORD(®->ctrl_status) &
+ CSRX_DMA_ACTIVE) == 0)
+ break;
+
+ udelay(10);
+ }
+
+ WRT_REG_DWORD(®->ctrl_status,
+ CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ udelay(20);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_DWORD(®->ctrl_status) &
+ CSRX_ISP_SOFT_RESET) == 0)
+ break;
+
+ udelay(10);
+ }
+ WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+ }
+
+ for (cnt = 30000; RD_REG_WORD(®->mailbox0) != 0 &&
+ rval == QLA_SUCCESS; cnt--) {
+ if (cnt)
+ udelay(100);
+ else
+ rval = QLA_FUNCTION_TIMEOUT;
+ }
+
+ /* Memory. */
+ if (rval == QLA_SUCCESS) {
+ /* Code RAM. */
+ risc_address = 0x20000;
+ WRT_REG_WORD(®->mailbox0, MBC_READ_RAM_EXTENDED);
+ clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
+ }
+ for (cnt = 0; cnt < sizeof(fw->code_ram) / 4 && rval == QLA_SUCCESS;
+ cnt++, risc_address++) {
+ WRT_REG_WORD(®->mailbox1, LSW(risc_address));
+ WRT_REG_WORD(®->mailbox8, MSW(risc_address));
+ RD_REG_WORD(®->mailbox8);
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
+
+ for (timer = 6000000; timer; timer--) {
+ /* Check for pending interrupts. */
+ stat = RD_REG_DWORD(®->host_status);
+ if (stat & HSRX_RISC_INT) {
+ stat &= 0xff;
+
+ if (stat == 0x1 || stat == 0x2 ||
+ stat == 0x10 || stat == 0x11) {
+ set_bit(MBX_INTERRUPT,
+ &ha->mbx_cmd_flags);
+
+ mb[0] = RD_REG_WORD(®->mailbox0);
+ mb[2] = RD_REG_WORD(®->mailbox2);
+ mb[3] = RD_REG_WORD(®->mailbox3);
+
+ WRT_REG_DWORD(®->hccr,
+ HCCRX_CLR_RISC_INT);
+ RD_REG_DWORD(®->hccr);
+ break;
+ }
+
+ /* Clear this intr; it wasn't a mailbox intr */
+ WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT);
+ RD_REG_DWORD(®->hccr);
+ }
+ udelay(5);
+ }
+
+ if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) {
+ rval = mb[0] & MBS_MASK;
+ fw->code_ram[cnt] = (mb[3] << 16) | mb[2];
+ } else {
+ rval = QLA_FUNCTION_FAILED;
+ }
+ }
+
+ if (rval == QLA_SUCCESS) {
+ /* External Memory. */
+ risc_address = 0x100000;
+ ext_mem_cnt = ha->fw_memory_size - 0x100000 + 1;
+ WRT_REG_WORD(®->mailbox0, MBC_READ_RAM_EXTENDED);
+ clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
+ }
+ for (cnt = 0; cnt < ext_mem_cnt && rval == QLA_SUCCESS;
+ cnt++, risc_address++) {
+ WRT_REG_WORD(®->mailbox1, LSW(risc_address));
+ WRT_REG_WORD(®->mailbox8, MSW(risc_address));
+ RD_REG_WORD(®->mailbox8);
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT);
+
+ for (timer = 6000000; timer; timer--) {
+ /* Check for pending interrupts. */
+ stat = RD_REG_DWORD(®->host_status);
+ if (stat & HSRX_RISC_INT) {
+ stat &= 0xff;
+
+ if (stat == 0x1 || stat == 0x2 ||
+ stat == 0x10 || stat == 0x11) {
+ set_bit(MBX_INTERRUPT,
+ &ha->mbx_cmd_flags);
+
+ mb[0] = RD_REG_WORD(®->mailbox0);
+ mb[2] = RD_REG_WORD(®->mailbox2);
+ mb[3] = RD_REG_WORD(®->mailbox3);
+
+ WRT_REG_DWORD(®->hccr,
+ HCCRX_CLR_RISC_INT);
+ RD_REG_DWORD(®->hccr);
+ break;
+ }
+
+ /* Clear this intr; it wasn't a mailbox intr */
+ WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT);
+ RD_REG_DWORD(®->hccr);
+ }
+ udelay(5);
+ }
+
+ if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) {
+ rval = mb[0] & MBS_MASK;
+ fw->ext_mem[cnt] = (mb[3] << 16) | mb[2];
+ } else {
+ rval = QLA_FUNCTION_FAILED;
+ }
+ }
+
+ if (rval != QLA_SUCCESS) {
+ qla_printk(KERN_WARNING, ha,
+ "Failed to dump firmware (%x)!!!\n", rval);
+ ha->fw_dumped = 0;
+
+ } else {
+ qla_printk(KERN_INFO, ha,
+ "Firmware dump saved to temp buffer (%ld/%p).\n",
+ ha->host_no, ha->fw_dump24);
+ ha->fw_dumped = 1;
+ }
+
+qla24xx_fw_dump_failed:
+ if (!hardware_locked)
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+}
+
+void
+qla24xx_ascii_fw_dump(scsi_qla_host_t *ha)
+{
+ uint32_t cnt;
+ char *uiter;
+ struct qla24xx_fw_dump *fw;
+ uint32_t ext_mem_cnt;
+
+ uiter = ha->fw_dump_buffer;
+ fw = ha->fw_dump24;
+
+ qla_uprintf(&uiter, "ISP FW Version %d.%02d.%02d Attributes %04x\n",
+ ha->fw_major_version, ha->fw_minor_version,
+ ha->fw_subminor_version, ha->fw_attributes);
+
+ qla_uprintf(&uiter, "\nHCCR Register\n%04x\n", fw->hccr);
+
+ qla_uprintf(&uiter, "\nHost Interface Registers");
+ for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->host_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nMailbox Registers");
+ for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->mailbox_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXSEQ GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xseq_gp_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXSEQ-0 Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_0_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xseq_0_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXSEQ-1 Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_1_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xseq_1_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRSEQ GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rseq_gp_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRSEQ-0 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_0_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rseq_0_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRSEQ-1 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_1_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rseq_1_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRSEQ-2 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_2_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rseq_2_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nCommand DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->cmd_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->cmd_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRequest0 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->req0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->req0_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nResponse0 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->resp0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->resp0_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRequest1 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->req1_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->req1_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT0 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt0_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT1 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt1_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt1_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT2 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt2_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt2_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT3 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt3_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt3_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT4 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt4_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt4_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nXMT Data DMA Common Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->xmt_data_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRCV Thread 0 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->rcvt0_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rcvt0_data_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRCV Thread 1 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->rcvt1_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->rcvt1_data_dma_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nRISC GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->risc_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->risc_gp_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nShadow Registers");
+ for (cnt = 0; cnt < sizeof(fw->shadow_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->shadow_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nLMC Registers");
+ for (cnt = 0; cnt < sizeof(fw->lmc_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->lmc_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nFPM Hardware Registers");
+ for (cnt = 0; cnt < sizeof(fw->fpm_hdw_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->fpm_hdw_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nFB Hardware Registers");
+ for (cnt = 0; cnt < sizeof(fw->fb_hdw_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ qla_uprintf(&uiter, "\n");
+
+ qla_uprintf(&uiter, "%08x ", fw->fb_hdw_reg[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nCode RAM");
+ for (cnt = 0; cnt < sizeof (fw->code_ram) / 4; cnt++) {
+ if (cnt % 8 == 0) {
+ qla_uprintf(&uiter, "\n%08x: ", cnt + 0x20000);
+ }
+ qla_uprintf(&uiter, "%08x ", fw->code_ram[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n\nExternal Memory");
+ ext_mem_cnt = ha->fw_memory_size - 0x100000 + 1;
+ for (cnt = 0; cnt < ext_mem_cnt; cnt++) {
+ if (cnt % 8 == 0) {
+ qla_uprintf(&uiter, "\n%08x: ", cnt + 0x100000);
+ }
+ qla_uprintf(&uiter, "%08x ", fw->ext_mem[cnt]);
+ }
+
+ qla_uprintf(&uiter, "\n[<==END] ISP Debug Dump");
+}
+
+void
+qla24xx_console_fw_dump(scsi_qla_host_t *ha)
+{
+ uint32_t cnt;
+ char *uiter;
+ struct qla24xx_fw_dump *fw;
+ uint32_t ext_mem_cnt;
+
+ uiter = ha->fw_dump_buffer;
+ fw = ha->fw_dump24;
+
+ printk("ISP FW Version %d.%02d.%02d Attributes %04x\n",
+ ha->fw_major_version, ha->fw_minor_version,
+ ha->fw_subminor_version, ha->fw_attributes);
+
+ printk("\nHCCR Register\n%04x\n", fw->hccr);
+
+ printk("\nHost Interface Registers");
+ for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->host_reg[cnt]);
+ }
+
+ printk("\n\nMailbox Registers");
+ for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->mailbox_reg[cnt]);
+ }
+
+ printk("\n\nXSEQ GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xseq_gp_reg[cnt]);
+ }
+
+ printk("\n\nXSEQ-0 Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_0_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xseq_0_reg[cnt]);
+ }
+
+ printk("\n\nXSEQ-1 Registers");
+ for (cnt = 0; cnt < sizeof(fw->xseq_1_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xseq_1_reg[cnt]);
+ }
+
+ printk("\n\nRSEQ GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rseq_gp_reg[cnt]);
+ }
+
+ printk("\n\nRSEQ-0 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_0_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rseq_0_reg[cnt]);
+ }
+
+ printk("\n\nRSEQ-1 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_1_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rseq_1_reg[cnt]);
+ }
+
+ printk("\n\nRSEQ-2 Registers");
+ for (cnt = 0; cnt < sizeof(fw->rseq_2_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rseq_2_reg[cnt]);
+ }
+
+ printk("\n\nCommand DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->cmd_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->cmd_dma_reg[cnt]);
+ }
+
+ printk("\n\nRequest0 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->req0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->req0_dma_reg[cnt]);
+ }
+
+ printk("\n\nResponse0 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->resp0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->resp0_dma_reg[cnt]);
+ }
+
+ printk("\n\nRequest1 Queue DMA Channel Registers");
+ for (cnt = 0; cnt < sizeof(fw->req1_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->req1_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT0 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt0_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt0_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT1 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt1_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt1_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT2 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt2_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt2_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT3 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt3_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt3_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT4 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt4_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt4_dma_reg[cnt]);
+ }
+
+ printk("\n\nXMT Data DMA Common Registers");
+ for (cnt = 0; cnt < sizeof(fw->xmt_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->xmt_data_dma_reg[cnt]);
+ }
+
+ printk("\n\nRCV Thread 0 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->rcvt0_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rcvt0_data_dma_reg[cnt]);
+ }
+
+ printk("\n\nRCV Thread 1 Data DMA Registers");
+ for (cnt = 0; cnt < sizeof(fw->rcvt1_data_dma_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->rcvt1_data_dma_reg[cnt]);
+ }
+
+ printk("\n\nRISC GP Registers");
+ for (cnt = 0; cnt < sizeof(fw->risc_gp_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->risc_gp_reg[cnt]);
+ }
+
+ printk("\n\nShadow Registers");
+ for (cnt = 0; cnt < sizeof(fw->shadow_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->shadow_reg[cnt]);
+ }
+
+ printk("\n\nLMC Registers");
+ for (cnt = 0; cnt < sizeof(fw->lmc_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->lmc_reg[cnt]);
+ }
+
+ printk("\n\nFPM Hardware Registers");
+ for (cnt = 0; cnt < sizeof(fw->fpm_hdw_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->fpm_hdw_reg[cnt]);
+ }
+
+ printk("\n\nFB Hardware Registers");
+ for (cnt = 0; cnt < sizeof(fw->fb_hdw_reg) / 4; cnt++) {
+ if (cnt % 8 == 0)
+ printk("\n");
+
+ printk("%08x ", fw->fb_hdw_reg[cnt]);
+ }
+
+ printk("\n\nCode RAM");
+ for (cnt = 0; cnt < sizeof (fw->code_ram) / 4; cnt++) {
+ if (cnt % 8 == 0) {
+ printk("\n%08x: ", cnt + 0x20000);
+ }
+ printk("%08x ", fw->code_ram[cnt]);
+ }
+
+ printk("\n\nExternal Memory");
+ ext_mem_cnt = ha->fw_memory_size - 0x100000 + 1;
+ for (cnt = 0; cnt < ext_mem_cnt; cnt++) {
+ if (cnt % 8 == 0) {
+ printk("\n%08x: ", cnt + 0x100000);
+ }
+ printk("%08x ", fw->ext_mem[cnt]);
+ }
+
+ printk("\n[<==END] ISP Debug Dump");
+}
+
//FIXME
/****************************************************************************/
@@ -1066,6 +2245,21 @@ qla2x00_print_scsi_cmd(struct scsi_cmnd
printk(" state=%d\n", sp->state);
}
+void
+qla2x00_dump_pkt(void *pkt)
+{
+ uint32_t i;
+ uint8_t *data = (uint8_t *) pkt;
+
+ for (i = 0; i < 64; i++) {
+ if (!(i % 4))
+ printk("\n%02x: ", i);
+
+ printk("%02x ", data[i]);
+ }
+ printk("\n");
+}
+
#if defined(QL_DEBUG_ROUTINES)
/*
* qla2x00_formatted_dump_buffer
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -230,4 +230,36 @@ struct qla2100_fw_dump {
uint16_t risc_ram[0xf000];
};
+#define FW_DUMP_SIZE_24XX 0x2B0000
+struct qla24xx_fw_dump {
+ uint32_t hccr;
+ uint32_t host_reg[32];
+ uint16_t mailbox_reg[32];
+ uint32_t xseq_gp_reg[128];
+ uint32_t xseq_0_reg[16];
+ uint32_t xseq_1_reg[16];
+ uint32_t rseq_gp_reg[128];
+ uint32_t rseq_0_reg[16];
+ uint32_t rseq_1_reg[16];
+ uint32_t rseq_2_reg[16];
+ uint32_t cmd_dma_reg[16];
+ uint32_t req0_dma_reg[15];
+ uint32_t resp0_dma_reg[15];
+ uint32_t req1_dma_reg[15];
+ uint32_t xmt0_dma_reg[32];
+ uint32_t xmt1_dma_reg[32];
+ uint32_t xmt2_dma_reg[32];
+ uint32_t xmt3_dma_reg[32];
+ uint32_t xmt4_dma_reg[32];
+ uint32_t xmt_data_dma_reg[16];
+ uint32_t rcvt0_data_dma_reg[32];
+ uint32_t rcvt1_data_dma_reg[32];
+ uint32_t risc_gp_reg[128];
+ uint32_t shadow_reg[7];
+ uint32_t lmc_reg[112];
+ uint32_t fpm_hdw_reg[192];
+ uint32_t fb_hdw_reg[176];
+ uint32_t code_ram[0x2000];
+ uint32_t ext_mem[1];
+};
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -198,11 +198,14 @@ extern void qla2x00_write_nvram_word(scs
*/
extern void qla2100_fw_dump(scsi_qla_host_t *, int);
extern void qla2300_fw_dump(scsi_qla_host_t *, int);
+extern void qla24xx_fw_dump(scsi_qla_host_t *, int);
extern void qla2100_ascii_fw_dump(scsi_qla_host_t *);
extern void qla2300_ascii_fw_dump(scsi_qla_host_t *);
+extern void qla24xx_ascii_fw_dump(scsi_qla_host_t *);
extern void qla2x00_dump_regs(scsi_qla_host_t *);
extern void qla2x00_dump_buffer(uint8_t *, uint32_t);
extern void qla2x00_print_scsi_cmd(struct scsi_cmnd *);
+extern void qla2x00_dump_pkt(void *);
/*
* Global Function Prototypes in qla_gs.c source file.
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
2005-06-14 5:31 ` [PATCH 1/11] qla2xxx: Add ISP24xx definitions Andrew Vasquez
2005-06-14 5:31 ` [PATCH 2/11] qla2xxx: Add ISP24xx diagnostic routines Andrew Vasquez
@ 2005-06-14 5:31 ` Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:31 ` [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support Andrew Vasquez
` (7 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:31 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Generalize SNS generic-services routines.
Consolidate completion-status checking while adding support
for the ISP24xx.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_gs.c | 174 +++++++++++++++++++++++++++--------------
1 files changed, 115 insertions(+), 59 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c
--- a/drivers/scsi/qla2xxx/qla_gs.c
+++ b/drivers/scsi/qla2xxx/qla_gs.c
@@ -21,12 +21,19 @@
static inline ms_iocb_entry_t *
qla2x00_prep_ms_iocb(scsi_qla_host_t *, uint32_t, uint32_t);
+static inline void *
+qla24xx_prep_ms_iocb(scsi_qla_host_t *, uint32_t, uint32_t);
+
static inline struct ct_sns_req *
qla2x00_prep_ct_req(struct ct_sns_req *, uint16_t, uint16_t);
static inline struct sns_cmd_pkt *
qla2x00_prep_sns_cmd(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t);
+static int
+qla2x00_chk_ms_status(scsi_qla_host_t *, ms_iocb_entry_t *, struct ct_sns_rsp *,
+ const char *);
+
static int qla2x00_sns_ga_nxt(scsi_qla_host_t *, fc_port_t *);
static int qla2x00_sns_gid_pt(scsi_qla_host_t *, sw_info_t *);
static int qla2x00_sns_gpn_id(scsi_qla_host_t *, sw_info_t *);
@@ -34,8 +41,9 @@ static int qla2x00_sns_gnn_id(scsi_qla_h
static int qla2x00_sns_rft_id(scsi_qla_host_t *);
static int qla2x00_sns_rnn_id(scsi_qla_host_t *);
+
/**
- * qla2x00_prep_ms_iocb() - Prepare common MS IOCB fields for SNS CT query.
+ * qla2x00_prep_ms_iocb() - Prepare common MS/CT IOCB fields for SNS CT query.
* @ha: HA context
* @req_size: request size in bytes
* @rsp_size: response size in bytes
@@ -47,6 +55,9 @@ qla2x00_prep_ms_iocb(scsi_qla_host_t *ha
{
ms_iocb_entry_t *ms_pkt;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_prep_ms_iocb(ha, req_size, rsp_size);
+
ms_pkt = ha->ms_iocb;
memset(ms_pkt, 0, sizeof(ms_iocb_entry_t));
@@ -72,6 +83,42 @@ qla2x00_prep_ms_iocb(scsi_qla_host_t *ha
}
/**
+ * qla24xx_prep_ms_iocb() - Prepare common CT IOCB fields for SNS CT query.
+ * @ha: HA context
+ * @req_size: request size in bytes
+ * @rsp_size: response size in bytes
+ *
+ * Returns a pointer to the @ha's ms_iocb.
+ */
+static inline void *
+qla24xx_prep_ms_iocb(scsi_qla_host_t *ha, uint32_t req_size, uint32_t rsp_size)
+{
+ struct ct_entry_24xx *ct_pkt;
+
+ ct_pkt = (struct ct_entry_24xx *)ha->ms_iocb;
+ memset(ct_pkt, 0, sizeof(struct ct_entry_24xx));
+
+ ct_pkt->entry_type = CT_IOCB_TYPE;
+ ct_pkt->entry_count = 1;
+ ct_pkt->nport_handle = __constant_cpu_to_le16(NPH_SNS);
+ ct_pkt->timeout = __constant_cpu_to_le16(25);
+ ct_pkt->cmd_dsd_count = __constant_cpu_to_le16(1);
+ ct_pkt->rsp_dsd_count = __constant_cpu_to_le16(1);
+ ct_pkt->rsp_byte_count = cpu_to_le32(rsp_size);
+ ct_pkt->cmd_byte_count = cpu_to_le32(req_size);
+
+ ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
+ ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
+ ct_pkt->dseg_0_len = ct_pkt->cmd_byte_count;
+
+ ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
+ ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
+ ct_pkt->dseg_1_len = ct_pkt->rsp_byte_count;
+
+ return (ct_pkt);
+}
+
+/**
* qla2x00_prep_ct_req() - Prepare common CT request fields for SNS query.
* @ct_req: CT request buffer
* @cmd: GS command
@@ -93,6 +140,47 @@ qla2x00_prep_ct_req(struct ct_sns_req *c
return (ct_req);
}
+static int
+qla2x00_chk_ms_status(scsi_qla_host_t *ha, ms_iocb_entry_t *ms_pkt,
+ struct ct_sns_rsp *ct_rsp, const char *routine)
+{
+ int rval;
+ uint16_t comp_status;
+
+ rval = QLA_FUNCTION_FAILED;
+ if (ms_pkt->entry_status != 0) {
+ DEBUG2_3(printk("scsi(%ld): %s failed, error status (%x).\n",
+ ha->host_no, routine, ms_pkt->entry_status));
+ } else {
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ comp_status =
+ ((struct ct_entry_24xx *)ms_pkt)->comp_status;
+ else
+ comp_status = le16_to_cpu(ms_pkt->status);
+ switch (comp_status) {
+ case CS_COMPLETE:
+ case CS_DATA_UNDERRUN:
+ case CS_DATA_OVERRUN: /* Overrun? */
+ if (ct_rsp->header.response !=
+ __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
+ DEBUG2_3(printk("scsi(%ld): %s failed, "
+ "rejected request:\n", ha->host_no,
+ routine));
+ DEBUG2_3(qla2x00_dump_buffer(
+ (uint8_t *)&ct_rsp->header,
+ sizeof(struct ct_rsp_hdr)));
+ } else
+ rval = QLA_SUCCESS;
+ break;
+ default:
+ DEBUG2_3(printk("scsi(%ld): %s failed, completion "
+ "status (%x).\n", ha->host_no, routine,
+ comp_status));
+ break;
+ }
+ }
+ return rval;
+}
/**
* qla2x00_ga_nxt() - SNS scan for fabric devices via GA_NXT command.
@@ -135,12 +223,8 @@ qla2x00_ga_nxt(scsi_qla_host_t *ha, fc_p
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): GA_NXT issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): GA_NXT failed, rejected request, "
- "ga_nxt_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "GA_NXT") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
/* Populate fc_port_t entry. */
@@ -223,12 +307,8 @@ qla2x00_gid_pt(scsi_qla_host_t *ha, sw_i
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): GID_PT issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): GID_PT failed, rejected request, "
- "gid_pt_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "GID_PT") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
/* Set port IDs in switch info list. */
@@ -302,12 +382,8 @@ qla2x00_gpn_id(scsi_qla_host_t *ha, sw_i
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): GPN_ID issue IOCB failed "
"(%d).\n", ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): GPN_ID failed, rejected "
- "request, gpn_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp,
+ "GPN_ID") != QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
/* Save portname */
@@ -367,12 +443,8 @@ qla2x00_gnn_id(scsi_qla_host_t *ha, sw_i
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): GNN_ID issue IOCB failed "
"(%d).\n", ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): GNN_ID failed, rejected "
- "request, gnn_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp,
+ "GNN_ID") != QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
/* Save nodename */
@@ -446,12 +518,8 @@ qla2x00_rft_id(scsi_qla_host_t *ha)
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): RFT_ID issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): RFT_ID failed, rejected "
- "request, rft_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "RFT_ID") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
DEBUG2(printk("scsi(%ld): RFT_ID exiting normally.\n",
@@ -505,12 +573,8 @@ qla2x00_rff_id(scsi_qla_host_t *ha)
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): RFF_ID issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): RFF_ID failed, rejected "
- "request, rff_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "RFF_ID") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
DEBUG2(printk("scsi(%ld): RFF_ID exiting normally.\n",
@@ -553,7 +617,7 @@ qla2x00_rnn_id(scsi_qla_host_t *ha)
ct_req->req.rnn_id.port_id[1] = ha->d_id.b.area;
ct_req->req.rnn_id.port_id[2] = ha->d_id.b.al_pa;
- memcpy(ct_req->req.rnn_id.node_name, ha->init_cb->node_name, WWN_SIZE);
+ memcpy(ct_req->req.rnn_id.node_name, ha->node_name, WWN_SIZE);
/* Execute MS IOCB */
rval = qla2x00_issue_iocb(ha, ha->ms_iocb, ha->ms_iocb_dma,
@@ -562,12 +626,8 @@ qla2x00_rnn_id(scsi_qla_host_t *ha)
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): RNN_ID issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): RNN_ID failed, rejected "
- "request, rnn_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "RNN_ID") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
DEBUG2(printk("scsi(%ld): RNN_ID exiting normally.\n",
@@ -611,7 +671,7 @@ qla2x00_rsnn_nn(scsi_qla_host_t *ha)
ct_rsp = &ha->ct_sns->p.rsp;
/* Prepare CT arguments -- node_name, symbolic node_name, size */
- memcpy(ct_req->req.rsnn_nn.node_name, ha->init_cb->node_name, WWN_SIZE);
+ memcpy(ct_req->req.rsnn_nn.node_name, ha->node_name, WWN_SIZE);
/* Prepare the Symbolic Node Name */
/* Board type */
@@ -641,12 +701,8 @@ qla2x00_rsnn_nn(scsi_qla_host_t *ha)
/*EMPTY*/
DEBUG2_3(printk("scsi(%ld): RSNN_NN issue IOCB failed (%d).\n",
ha->host_no, rval));
- } else if (ct_rsp->header.response !=
- __constant_cpu_to_be16(CT_ACCEPT_RESPONSE)) {
- DEBUG2_3(printk("scsi(%ld): RSNN_NN failed, rejected "
- "request, rsnn_id_rsp:\n", ha->host_no));
- DEBUG2_3(qla2x00_dump_buffer((uint8_t *)&ct_rsp->header,
- sizeof(struct ct_rsp_hdr)));
+ } else if (qla2x00_chk_ms_status(ha, ms_pkt, ct_rsp, "RSNN_NN") !=
+ QLA_SUCCESS) {
rval = QLA_FUNCTION_FAILED;
} else {
DEBUG2(printk("scsi(%ld): RSNN_NN exiting normally.\n",
@@ -1028,14 +1084,14 @@ qla2x00_sns_rnn_id(scsi_qla_host_t *ha)
sns_cmd->p.cmd.param[1] = ha->d_id.b.area;
sns_cmd->p.cmd.param[2] = ha->d_id.b.domain;
- sns_cmd->p.cmd.param[4] = ha->init_cb->node_name[7];
- sns_cmd->p.cmd.param[5] = ha->init_cb->node_name[6];
- sns_cmd->p.cmd.param[6] = ha->init_cb->node_name[5];
- sns_cmd->p.cmd.param[7] = ha->init_cb->node_name[4];
- sns_cmd->p.cmd.param[8] = ha->init_cb->node_name[3];
- sns_cmd->p.cmd.param[9] = ha->init_cb->node_name[2];
- sns_cmd->p.cmd.param[10] = ha->init_cb->node_name[1];
- sns_cmd->p.cmd.param[11] = ha->init_cb->node_name[0];
+ sns_cmd->p.cmd.param[4] = ha->node_name[7];
+ sns_cmd->p.cmd.param[5] = ha->node_name[6];
+ sns_cmd->p.cmd.param[6] = ha->node_name[5];
+ sns_cmd->p.cmd.param[7] = ha->node_name[4];
+ sns_cmd->p.cmd.param[8] = ha->node_name[3];
+ sns_cmd->p.cmd.param[9] = ha->node_name[2];
+ sns_cmd->p.cmd.param[10] = ha->node_name[1];
+ sns_cmd->p.cmd.param[11] = ha->node_name[0];
/* Execute SNS command. */
rval = qla2x00_send_sns(ha, ha->sns_cmd_dma, RNN_ID_SNS_CMD_SIZE / 2,
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (2 preceding siblings ...)
2005-06-14 5:31 ` [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines Andrew Vasquez
@ 2005-06-14 5:31 ` Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 5/11] qla2xxx: Add ISP24xx flash-manipulation routines Andrew Vasquez
` (6 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:31 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Add MBX command routines for ISP24xx support.
Generalize several routines [qla2x00_load_ram_ext(),
qla2x00_execute_fw(), qla2x00_verify_checksum()] to handle
larger addressing space.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_gbl.h | 19 +
drivers/scsi/qla2xxx/qla_mbx.c | 1024 +++++++++++++++++++++++++++++++---------
2 files changed, 811 insertions(+), 232 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -95,10 +95,10 @@ extern int
qla2x00_load_ram(scsi_qla_host_t *, dma_addr_t, uint16_t, uint16_t);
extern int
-qla2x00_load_ram_ext(scsi_qla_host_t *, dma_addr_t, uint32_t, uint16_t);
+qla2x00_load_ram_ext(scsi_qla_host_t *, dma_addr_t, uint32_t, uint32_t);
extern int
-qla2x00_execute_fw(scsi_qla_host_t *);
+qla2x00_execute_fw(scsi_qla_host_t *, uint32_t);
extern void
qla2x00_get_fw_version(scsi_qla_host_t *, uint16_t *,
@@ -114,7 +114,7 @@ extern int
qla2x00_mbx_reg_test(scsi_qla_host_t *);
extern int
-qla2x00_verify_checksum(scsi_qla_host_t *);
+qla2x00_verify_checksum(scsi_qla_host_t *, uint32_t);
extern int
qla2x00_issue_iocb(scsi_qla_host_t *, void *, dma_addr_t, size_t);
@@ -124,7 +124,7 @@ qla2x00_abort_command(scsi_qla_host_t *,
#if USE_ABORT_TGT
extern int
-qla2x00_abort_target(fc_port_t *fcport);
+qla2x00_abort_target(fc_port_t *);
#endif
extern int
@@ -163,7 +163,7 @@ extern int
qla2x00_login_local_device(scsi_qla_host_t *, uint16_t, uint16_t *, uint8_t);
extern int
-qla2x00_fabric_logout(scsi_qla_host_t *ha, uint16_t loop_id);
+qla2x00_fabric_logout(scsi_qla_host_t *, uint16_t, uint8_t, uint8_t, uint8_t);
extern int
qla2x00_full_login_lip(scsi_qla_host_t *ha);
@@ -178,6 +178,15 @@ qla2x00_get_resource_cnts(scsi_qla_host_
extern int
qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map);
+extern int qla2x00_system_error(scsi_qla_host_t *);
+
+extern int
+qla2x00_get_serdes_params(scsi_qla_host_t *, uint16_t *, uint16_t *,
+ uint16_t *);
+
+extern int
+qla2x00_set_serdes_params(scsi_qla_host_t *, uint16_t, uint16_t, uint16_t);
+
/*
* Global Function Prototypes in qla_isr.c source file.
*/
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -20,6 +20,10 @@
#include <linux/delay.h>
+//ISP24xx
+int qla24xx_abort_command(scsi_qla_host_t *, srb_t *);
+int qla24xx_abort_target(scsi_qla_host_t *, fc_port_t *);
+
static void
qla2x00_mbx_sem_timeout(unsigned long data)
{
@@ -57,10 +61,12 @@ static int
qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
{
int rval;
- unsigned long flags = 0;
- device_reg_t __iomem *reg = ha->iobase;
- struct timer_list tmp_intr_timer;
- uint8_t abort_active = test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
+ unsigned long flags = 0;
+ device_reg_t __iomem *reg = NULL;
+ struct device_reg_24xx __iomem *reg24 = NULL;
+
+ struct timer_list tmp_intr_timer;
+ uint8_t abort_active;
uint8_t io_lock_on = ha->flags.init_done;
uint16_t command;
uint16_t *iptr;
@@ -71,19 +77,20 @@ qla2x00_mailbox_command(scsi_qla_host_t
unsigned long wait_time;
rval = QLA_SUCCESS;
+ abort_active = test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
- DEBUG11(printk("qla2x00_mailbox_command(%ld): entered.\n",
- ha->host_no);)
/*
- * Wait for active mailbox commands to finish by waiting at most
- * tov seconds. This is to serialize actual issuing of mailbox cmds
- * during non ISP abort time.
+ * Wait for active mailbox commands to finish by waiting at most tov
+ * seconds. This is to serialize actual issuing of mailbox cmds during
+ * non ISP abort time.
*/
if (!abort_active) {
if (qla2x00_down_timeout(&ha->mbx_cmd_sem, mcp->tov * HZ)) {
/* Timeout occurred. Return error. */
- DEBUG2_3_11(printk("qla2x00_mailbox_command(%ld): cmd "
- "access timeout. Exiting.\n", ha->host_no);)
+ DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
+ "Exiting.\n", __func__, ha->host_no);)
return QLA_FUNCTION_TIMEOUT;
}
}
@@ -96,13 +103,19 @@ qla2x00_mailbox_command(scsi_qla_host_t
if (!abort_active)
spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
- DEBUG11(printk("scsi%d: prepare to issue mbox cmd=0x%x.\n",
- (int)ha->host_no, mcp->mb[0]);)
+ DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
+ ha->host_no, mcp->mb[0]);)
spin_lock_irqsave(&ha->hardware_lock, flags);
/* Load mailbox registers. */
- optr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 0);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ reg24 = (struct device_reg_24xx __iomem *)ha->iobase;
+ optr = (uint16_t __iomem *)®24->mailbox0;
+ } else {
+ reg = ha->iobase;
+ optr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 0);
+ }
iptr = mcp->mb;
command = mcp->mb[0];
@@ -120,16 +133,15 @@ qla2x00_mailbox_command(scsi_qla_host_t
}
#if defined(QL_DEBUG_LEVEL_1)
- printk("qla2x00_mailbox_command: Loaded MBX registers "
- "(displayed in bytes) = \n");
+ printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
+ __func__, ha->host_no);
qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
printk("\n");
qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
printk("\n");
qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
printk("\n");
- printk("qla2x00_mailbox_command: I/O address = %lx.\n",
- (u_long)optr);
+ printk("%s(%ld): I/O address = %p.\n", __func__, ha->host_no, optr);
qla2x00_dump_regs(ha);
#endif
@@ -138,17 +150,15 @@ qla2x00_mailbox_command(scsi_qla_host_t
clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
/* Unlock mbx registers and wait for interrupt */
-
- DEBUG11(printk("qla2x00_mailbox_command: going to unlock irq & "
- "waiting for interrupt. jiffies=%lx.\n", jiffies);)
+ DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
+ "jiffies=%lx.\n", __func__, ha->host_no, jiffies);)
/* Wait for mbx cmd completion until timeout */
if (!abort_active && io_lock_on) {
/* sleep on completion semaphore */
- DEBUG11(printk("qla2x00_mailbox_command(%ld): "
- "INTERRUPT MODE. Initializing timer.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): INTERRUPT MODE. Initializing timer.\n",
+ __func__, ha->host_no);)
init_timer(&tmp_intr_timer);
tmp_intr_timer.data = (unsigned long)&ha->mbx_intr_sem;
@@ -156,16 +166,19 @@ qla2x00_mailbox_command(scsi_qla_host_t
tmp_intr_timer.function =
(void (*)(unsigned long))qla2x00_mbx_sem_timeout;
- DEBUG11(printk("qla2x00_mailbox_command(%ld): "
- "Adding timer.\n", ha->host_no);)
+ DEBUG11(printk("%s(%ld): Adding timer.\n", __func__,
+ ha->host_no);)
add_timer(&tmp_intr_timer);
- DEBUG11(printk("qla2x00_mailbox_command: going to "
- "unlock & sleep. time=0x%lx.\n", jiffies);)
+ DEBUG11(printk("%s(%ld): going to unlock & sleep. "
+ "time=0x%lx.\n", __func__, ha->host_no, jiffies);)
set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
- WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ WRT_REG_DWORD(®24->hccr, HCCRX_SET_HOST_INT);
+ else
+ WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
if (!abort_active)
@@ -176,19 +189,20 @@ qla2x00_mailbox_command(scsi_qla_host_t
*/
down(&ha->mbx_intr_sem);
- DEBUG11(printk("qla2x00_mailbox_command:"
- "waking up."
- "time=0x%lx\n", jiffies);)
+ DEBUG11(printk("%s(%ld): waking up. time=0x%lx\n", __func__,
+ ha->host_no, jiffies);)
clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
/* delete the timer */
del_timer(&tmp_intr_timer);
} else {
+ DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
+ ha->host_no, command);)
- DEBUG3_11(printk("qla2x00_mailbox_command(%ld): cmd=%x "
- "POLLING MODE.\n", ha->host_no, command);)
-
- WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ WRT_REG_DWORD(®24->hccr, HCCRX_SET_HOST_INT);
+ else
+ WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
if (!abort_active)
spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
@@ -212,8 +226,8 @@ qla2x00_mailbox_command(scsi_qla_host_t
if (ha->flags.mbox_int) {
uint16_t *iptr2;
- DEBUG3_11(printk("qla2x00_mailbox_cmd: cmd %x completed.\n",
- command);)
+ DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
+ ha->host_no, command);)
/* Got interrupt. Clear the flag. */
ha->flags.mbox_int = 0;
@@ -238,12 +252,22 @@ qla2x00_mailbox_command(scsi_qla_host_t
#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
defined(QL_DEBUG_LEVEL_11)
- printk("qla2x00_mailbox_command(%ld): **** MB Command Timeout "
- "for cmd %x ****\n", ha->host_no, command);
- printk("qla2x00_mailbox_command: icontrol=%x jiffies=%lx\n",
- RD_REG_WORD(®->ictrl), jiffies);
- printk("qla2x00_mailbox_command: *** mailbox[0] = 0x%x ***\n",
- RD_REG_WORD(optr));
+ uint16_t mb0;
+ uint32_t ictrl;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mb0 = RD_REG_WORD(®24->mailbox0);
+ ictrl = RD_REG_DWORD(®24->ictrl);
+ } else {
+ mb0 = RD_MAILBOX_REG(ha, reg, 0);
+ ictrl = RD_REG_WORD(®->ictrl);
+ }
+ printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
+ __func__, ha->host_no, command);
+ printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
+ ha->host_no, ictrl, jiffies);
+ printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
+ ha->host_no, mb0);
qla2x00_dump_regs(ha);
#endif
@@ -259,22 +283,21 @@ qla2x00_mailbox_command(scsi_qla_host_t
ha->mcp = NULL;
if (!abort_active) {
- DEBUG11(printk("qla2x00_mailbox_cmd: checking for additional "
- "resp interrupt.\n");)
+ DEBUG11(printk("%s(%ld): checking for additional resp "
+ "interrupt.\n", __func__, ha->host_no);)
/* polling mode for non isp_abort commands. */
qla2x00_poll(ha);
}
- if (rval == QLA_FUNCTION_TIMEOUT) {
+ if (rval == QLA_FUNCTION_TIMEOUT &&
+ mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
if (!io_lock_on || (mcp->flags & IOCTL_CMD)) {
/* not in dpc. schedule it for dpc to take over. */
- DEBUG(printk("qla2x00_mailbox_command(%ld): timeout "
- "schedule isp_abort_needed.\n",
- ha->host_no);)
- DEBUG2_3_11(printk("qla2x00_mailbox_command(%ld): "
- "timeout schedule isp_abort_needed.\n",
- ha->host_no);)
+ DEBUG(printk("%s(%ld): timeout schedule "
+ "isp_abort_needed.\n", __func__, ha->host_no);)
+ DEBUG2_3_11(printk("%s(%ld): timeout schedule "
+ "isp_abort_needed.\n", __func__, ha->host_no);)
qla_printk(KERN_WARNING, ha,
"Mailbox command timeout occured. Scheduling ISP "
"abort.\n");
@@ -283,12 +306,11 @@ qla2x00_mailbox_command(scsi_qla_host_t
up(ha->dpc_wait);
} else if (!abort_active) {
-
/* call abort directly since we are in the DPC thread */
- DEBUG(printk("qla2x00_mailbox_command(%ld): timeout "
- "calling abort_isp\n", ha->host_no);)
- DEBUG2_3_11(printk("qla2x00_mailbox_command(%ld): "
- "timeout calling abort_isp\n", ha->host_no);)
+ DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
+ __func__, ha->host_no);)
+ DEBUG2_3_11(printk("%s(%ld): timeout calling "
+ "abort_isp\n", __func__, ha->host_no);)
qla_printk(KERN_WARNING, ha,
"Mailbox command timeout occured. Issuing ISP "
"abort.\n");
@@ -296,15 +318,14 @@ qla2x00_mailbox_command(scsi_qla_host_t
set_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
if (qla2x00_abort_isp(ha)) {
- /* failed. retry later. */
+ /* Failed. retry later. */
set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
}
clear_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
-
- DEBUG(printk("qla2x00_mailbox_command: finished "
- "abort_isp\n");)
- DEBUG2_3_11(printk("qla2x00_mailbox_command: finished "
- "abort_isp\n");)
+ DEBUG(printk("%s(%ld): finished abort_isp\n", __func__,
+ ha->host_no);)
+ DEBUG2_3_11(printk("%s(%ld): finished abort_isp\n",
+ __func__, ha->host_no);)
}
}
@@ -313,17 +334,13 @@ qla2x00_mailbox_command(scsi_qla_host_t
up(&ha->mbx_cmd_sem);
if (rval) {
- DEBUG2_3_11(printk("qla2x00_mailbox_command(%ld): **** FAILED. "
- "mbx0=%x, mbx1=%x, mbx2=%x, cmd=%x ****\n",
- ha->host_no, mcp->mb[0], mcp->mb[1], mcp->mb[2], command);)
+ DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
+ "mbx2=%x, cmd=%x ****\n", __func__, ha->host_no,
+ mcp->mb[0], mcp->mb[1], mcp->mb[2], command);)
} else {
- DEBUG11(printk("qla2x00_mailbox_command(%ld): done.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
}
- DEBUG11(printk("qla2x00_mailbox_command(%ld): exiting.\n",
- ha->host_no);)
-
return rval;
}
@@ -418,64 +435,40 @@ qla2x00_load_ram(scsi_qla_host_t *ha, dm
*/
int
qla2x00_load_ram_ext(scsi_qla_host_t *ha, dma_addr_t req_dma,
- uint32_t risc_addr, uint16_t risc_code_size)
+ uint32_t risc_addr, uint32_t risc_code_size)
{
int rval;
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
- uint32_t req_len;
- dma_addr_t nml_dma;
- uint32_t nml_len;
- uint32_t normalized;
DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
- req_len = risc_code_size;
- nml_dma = 0;
- nml_len = 0;
-
- normalized = qla2x00_normalize_dma_addr(&req_dma, &req_len, &nml_dma,
- &nml_len);
-
- /* Load first segment */
mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
mcp->mb[1] = LSW(risc_addr);
mcp->mb[2] = MSW(req_dma);
mcp->mb[3] = LSW(req_dma);
- mcp->mb[4] = (uint16_t)req_len;
mcp->mb[6] = MSW(MSD(req_dma));
mcp->mb[7] = LSW(MSD(req_dma));
mcp->mb[8] = MSW(risc_addr);
- mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
+ mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[4] = MSW(risc_code_size);
+ mcp->mb[5] = LSW(risc_code_size);
+ mcp->out_mb |= MBX_5|MBX_4;
+ } else {
+ mcp->mb[4] = LSW(risc_code_size);
+ mcp->out_mb |= MBX_4;
+ }
+
mcp->in_mb = MBX_0;
mcp->tov = 30;
mcp->flags = 0;
rval = qla2x00_mailbox_command(ha, mcp);
- /* Load second segment - if necessary */
- if (normalized && (rval == QLA_SUCCESS)) {
- risc_addr += req_len;
- mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
- mcp->mb[1] = LSW(risc_addr);
- mcp->mb[2] = MSW(nml_dma);
- mcp->mb[3] = LSW(nml_dma);
- mcp->mb[4] = (uint16_t)nml_len;
- mcp->mb[6] = MSW(MSD(nml_dma));
- mcp->mb[7] = LSW(MSD(nml_dma));
- mcp->mb[8] = MSW(risc_addr);
- mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
- mcp->in_mb = MBX_0;
- mcp->tov = 30;
- mcp->flags = 0;
- rval = qla2x00_mailbox_command(ha, mcp);
- }
-
if (rval != QLA_SUCCESS) {
- /*EMPTY*/
- DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n",
- __func__, ha->host_no, rval, mcp->mb[0]));
+ DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
+ ha->host_no, rval, mcp->mb[0]));
} else {
- /*EMPTY*/
DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
}
@@ -484,42 +477,62 @@ qla2x00_load_ram_ext(scsi_qla_host_t *ha
/*
* qla2x00_execute_fw
- * Start adapter firmware.
+ * Start adapter firmware.
*
* Input:
- * ha = adapter block pointer.
- * TARGET_QUEUE_LOCK must be released.
- * ADAPTER_STATE_LOCK must be released.
+ * ha = adapter block pointer.
+ * TARGET_QUEUE_LOCK must be released.
+ * ADAPTER_STATE_LOCK must be released.
*
* Returns:
- * qla2x00 local function return status code.
+ * qla2x00 local function return status code.
*
* Context:
- * Kernel context.
+ * Kernel context.
*/
int
-qla2x00_execute_fw(scsi_qla_host_t *ha)
+qla2x00_execute_fw(scsi_qla_host_t *ha, uint32_t risc_addr)
{
int rval;
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
- DEBUG11(printk("qla2x00_execute_fw(%ld): entered.\n", ha->host_no);)
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
- mcp->mb[1] = *ha->brd_info->fw_info[0].fwstart;
- mcp->out_mb = MBX_1|MBX_0;
- if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
- mcp->mb[2] = 0;
- mcp->out_mb |= MBX_2;
+ mcp->out_mb = MBX_0;
+ mcp->in_mb = MBX_0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[1] = MSW(risc_addr);
+ mcp->mb[2] = LSW(risc_addr);
+ mcp->mb[3] = 0;
+ mcp->out_mb |= MBX_3|MBX_2|MBX_1;
+ mcp->in_mb |= MBX_1;
+ } else {
+ mcp->mb[1] = LSW(risc_addr);
+ mcp->out_mb |= MBX_1;
+ if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
+ mcp->mb[2] = 0;
+ mcp->out_mb |= MBX_2;
+ }
}
- mcp->in_mb = MBX_0;
mcp->tov = 30;
mcp->flags = 0;
rval = qla2x00_mailbox_command(ha, mcp);
- DEBUG11(printk("qla2x00_execute_fw(%ld): done.\n", ha->host_no);)
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
+ ha->host_no, rval, mcp->mb[0]));
+ } else {
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
+ __func__, ha->host_no, mcp->mb[1]);)
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__,
+ ha->host_no);)
+ }
+ }
return rval;
}
@@ -612,6 +625,7 @@ qla2x00_get_fw_options(scsi_qla_host_t *
DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
ha->host_no, rval));
} else {
+ fwopts[0] = mcp->mb[0];
fwopts[1] = mcp->mb[1];
fwopts[2] = mcp->mb[2];
fwopts[3] = mcp->mb[3];
@@ -650,19 +664,26 @@ qla2x00_set_fw_options(scsi_qla_host_t *
mcp->mb[1] = fwopts[1];
mcp->mb[2] = fwopts[2];
mcp->mb[3] = fwopts[3];
- mcp->mb[10] = fwopts[10];
- mcp->mb[11] = fwopts[11];
- mcp->mb[12] = 0; /* Undocumented, but used */
- mcp->out_mb = MBX_12|MBX_11|MBX_10|MBX_3|MBX_2|MBX_1|MBX_0;
+ mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
mcp->in_mb = MBX_0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->in_mb |= MBX_1;
+ } else {
+ mcp->mb[10] = fwopts[10];
+ mcp->mb[11] = fwopts[11];
+ mcp->mb[12] = 0; /* Undocumented, but used */
+ mcp->out_mb |= MBX_12|MBX_11|MBX_10;
+ }
mcp->tov = 30;
mcp->flags = 0;
rval = qla2x00_mailbox_command(ha, mcp);
+ fwopts[0] = mcp->mb[0];
+
if (rval != QLA_SUCCESS) {
/*EMPTY*/
- DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
- ha->host_no, rval));
+ DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
+ ha->host_no, rval, mcp->mb[0], mcp->mb[1]));
} else {
/*EMPTY*/
DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
@@ -747,31 +768,38 @@ qla2x00_mbx_reg_test(scsi_qla_host_t *ha
* Kernel context.
*/
int
-qla2x00_verify_checksum(scsi_qla_host_t *ha)
+qla2x00_verify_checksum(scsi_qla_host_t *ha, uint32_t risc_addr)
{
int rval;
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
- DEBUG11(printk("qla2x00_verify_checksum(%ld): entered.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
mcp->mb[0] = MBC_VERIFY_CHECKSUM;
- mcp->mb[1] = *ha->brd_info->fw_info[0].fwstart;
- mcp->out_mb = MBX_1|MBX_0;
- mcp->in_mb = MBX_2|MBX_0;
+ mcp->out_mb = MBX_0;
+ mcp->in_mb = MBX_0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[1] = MSW(risc_addr);
+ mcp->mb[2] = LSW(risc_addr);
+ mcp->out_mb |= MBX_2|MBX_1;
+ mcp->in_mb |= MBX_2|MBX_1;
+ } else {
+ mcp->mb[1] = LSW(risc_addr);
+ mcp->out_mb |= MBX_1;
+ mcp->in_mb |= MBX_1;
+ }
+
mcp->tov = 30;
mcp->flags = 0;
rval = qla2x00_mailbox_command(ha, mcp);
if (rval != QLA_SUCCESS) {
- /*EMPTY*/
- DEBUG2_3_11(printk("qla2x00_verify_checksum(%ld): failed=%x.\n",
- ha->host_no, rval);)
+ DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
+ ha->host_no, rval, (IS_QLA24XX(ha) || IS_QLA25XX(ha) ?
+ (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));)
} else {
- /*EMPTY*/
- DEBUG11(printk("qla2x00_verify_checksum(%ld): done.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
}
return rval;
@@ -817,12 +845,18 @@ qla2x00_issue_iocb(scsi_qla_host_t *ha,
if (rval != QLA_SUCCESS) {
/*EMPTY*/
- DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x",
+ DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
ha->host_no,rval);)
- DEBUG2(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x",
+ DEBUG2(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
ha->host_no,rval);)
} else {
- /*EMPTY*/
+ sts_entry_t *sts_entry = (sts_entry_t *) buffer;
+
+ /* Mask reserved bits. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ sts_entry->entry_status &= RF_MASK_24XX;
+ else
+ sts_entry->entry_status &= RF_MASK;
}
return rval;
@@ -852,6 +886,9 @@ qla2x00_abort_command(scsi_qla_host_t *h
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_abort_command(ha, sp);
+
DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", ha->host_no);)
fcport = sp->fcport;
@@ -918,41 +955,44 @@ qla2x00_abort_target(fc_port_t *fcport)
int rval;
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
+ scsi_qla_host_t *ha;
- DEBUG11(printk("qla2x00_abort_target(%ld): entered.\n",
- fcport->ha->host_no);)
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->ha->host_no);)
if (fcport == NULL) {
/* no target to abort */
return 0;
}
+ ha = fcport->ha;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_abort_target(ha, fcport);
mcp->mb[0] = MBC_ABORT_TARGET;
mcp->out_mb = MBX_2|MBX_1|MBX_0;
- if (HAS_EXTENDED_IDS(fcport->ha)) {
+ if (HAS_EXTENDED_IDS(ha)) {
mcp->mb[1] = fcport->loop_id;
mcp->mb[10] = 0;
mcp->out_mb |= MBX_10;
} else {
mcp->mb[1] = fcport->loop_id << 8;
}
- mcp->mb[2] = fcport->ha->loop_reset_delay;
+ mcp->mb[2] = ha->loop_reset_delay;
mcp->in_mb = MBX_0;
mcp->tov = 30;
mcp->flags = 0;
- rval = qla2x00_mailbox_command(fcport->ha, mcp);
+ rval = qla2x00_mailbox_command(ha, mcp);
/* Issue marker command. */
- fcport->ha->marker_needed = 1;
+ ha->marker_needed = 1;
if (rval != QLA_SUCCESS) {
DEBUG2_3_11(printk("qla2x00_abort_target(%ld): failed=%x.\n",
- fcport->ha->host_no, rval);)
+ ha->host_no, rval);)
} else {
/*EMPTY*/
DEBUG11(printk("qla2x00_abort_target(%ld): done.\n",
- fcport->ha->host_no);)
+ ha->host_no);)
}
return rval;
@@ -1202,82 +1242,117 @@ qla2x00_get_port_database(scsi_qla_host_
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
port_database_t *pd;
+ struct port_database_24xx *pd24;
dma_addr_t pd_dma;
- DEBUG11(printk("qla2x00_get_port_database(%ld): entered.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
- pd = dma_pool_alloc(ha->s_dma_pool, GFP_ATOMIC, &pd_dma);
+ pd24 = NULL;
+ pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
if (pd == NULL) {
- DEBUG2_3_11(printk("qla2x00_get_port_database(%ld): **** "
- "Mem Alloc Failed ****", ha->host_no);)
+ DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
+ "structure.\n", __func__, ha->host_no));
return QLA_MEMORY_ALLOC_FAILED;
}
- memset(pd, 0, PORT_DATABASE_SIZE);
+ memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
- if (opt != 0)
+ mcp->mb[0] = MBC_GET_PORT_DATABASE;
+ if (opt != 0 && !IS_QLA24XX(ha) && !IS_QLA25XX(ha))
mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
- else
- mcp->mb[0] = MBC_GET_PORT_DATABASE;
- mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
- if (HAS_EXTENDED_IDS(ha)) {
- mcp->mb[1] = fcport->loop_id;
- mcp->mb[10] = opt;
- mcp->out_mb |= MBX_10;
- } else {
- mcp->mb[1] = fcport->loop_id << 8 | opt;
- }
mcp->mb[2] = MSW(pd_dma);
mcp->mb[3] = LSW(pd_dma);
mcp->mb[6] = MSW(MSD(pd_dma));
mcp->mb[7] = LSW(MSD(pd_dma));
-
+ mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
mcp->in_mb = MBX_0;
- mcp->buf_size = PORT_DATABASE_SIZE;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[1] = fcport->loop_id;
+ mcp->mb[10] = opt;
+ mcp->out_mb |= MBX_10|MBX_1;
+ mcp->in_mb |= MBX_1;
+ } else if (HAS_EXTENDED_IDS(ha)) {
+ mcp->mb[1] = fcport->loop_id;
+ mcp->mb[10] = opt;
+ mcp->out_mb |= MBX_10|MBX_1;
+ } else {
+ mcp->mb[1] = fcport->loop_id << 8 | opt;
+ mcp->out_mb |= MBX_1;
+ }
+ mcp->buf_size = (IS_QLA24XX(ha) || IS_QLA25XX(ha) ?
+ PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE);
mcp->flags = MBX_DMA_IN;
mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
rval = qla2x00_mailbox_command(ha, mcp);
if (rval != QLA_SUCCESS)
goto gpd_error_out;
- /* Check for logged in state. */
- if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
- pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
- rval = QLA_FUNCTION_FAILED;
- goto gpd_error_out;
- }
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ pd24 = (struct port_database_24xx *) pd;
- /* Names are little-endian. */
- memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
- memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
-
- /* Get port_id of device. */
- fcport->d_id.b.al_pa = pd->port_id[2];
- fcport->d_id.b.area = pd->port_id[3];
- fcport->d_id.b.domain = pd->port_id[0];
- fcport->d_id.b.rsvd_1 = 0;
-
- /* Check for device require authentication. */
- pd->common_features & BIT_5 ? (fcport->flags |= FCF_AUTH_REQ) :
- (fcport->flags &= ~FCF_AUTH_REQ);
-
- /* If not target must be initiator or unknown type. */
- if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
- fcport->port_type = FCT_INITIATOR;
- else
- fcport->port_type = FCT_TARGET;
+ /* Check for logged in state. */
+ if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
+ pd24->last_login_state != PDS_PRLI_COMPLETE) {
+ DEBUG2(printk("%s(%ld): Unable to verify "
+ "login-state (%x/%x) for loop_id %x\n",
+ __func__, ha->host_no,
+ pd24->current_login_state,
+ pd24->last_login_state, fcport->loop_id));
+ rval = QLA_FUNCTION_FAILED;
+ goto gpd_error_out;
+ }
+
+ /* Names are little-endian. */
+ memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
+ memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
+
+ /* Get port_id of device. */
+ fcport->d_id.b.domain = pd24->port_id[0];
+ fcport->d_id.b.area = pd24->port_id[1];
+ fcport->d_id.b.al_pa = pd24->port_id[2];
+ fcport->d_id.b.rsvd_1 = 0;
+
+ /* If not target must be initiator or unknown type. */
+ if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
+ fcport->port_type = FCT_INITIATOR;
+ else
+ fcport->port_type = FCT_TARGET;
+ } else {
+ /* Check for logged in state. */
+ if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
+ pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
+ rval = QLA_FUNCTION_FAILED;
+ goto gpd_error_out;
+ }
+
+ /* Names are little-endian. */
+ memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
+ memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
+
+ /* Get port_id of device. */
+ fcport->d_id.b.domain = pd->port_id[0];
+ fcport->d_id.b.area = pd->port_id[3];
+ fcport->d_id.b.al_pa = pd->port_id[2];
+ fcport->d_id.b.rsvd_1 = 0;
+
+ /* Check for device require authentication. */
+ pd->common_features & BIT_5 ? (fcport->flags |= FCF_AUTH_REQ) :
+ (fcport->flags &= ~FCF_AUTH_REQ);
+
+ /* If not target must be initiator or unknown type. */
+ if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
+ fcport->port_type = FCT_INITIATOR;
+ else
+ fcport->port_type = FCT_TARGET;
+ }
gpd_error_out:
dma_pool_free(ha->s_dma_pool, pd, pd_dma);
if (rval != QLA_SUCCESS) {
- /*EMPTY*/
- DEBUG2_3_11(printk("qla2x00_get_port_database(%ld): "
- "failed=%x.\n", ha->host_no, rval);)
+ DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
+ __func__, ha->host_no, rval, mcp->mb[0], mcp->mb[1]));
} else {
- /*EMPTY*/
- DEBUG11(printk("qla2x00_get_port_database(%ld): done.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
}
return rval;
@@ -1422,21 +1497,27 @@ qla2x00_lip_reset(scsi_qla_host_t *ha)
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
- DEBUG11(printk("qla2x00_lip_reset(%ld): entered.\n",
- ha->host_no);)
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
- mcp->mb[0] = MBC_LIP_RESET;
- mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
- if (HAS_EXTENDED_IDS(ha)) {
- mcp->mb[1] = 0x00ff;
- mcp->mb[10] = 0;
- mcp->out_mb |= MBX_10;
- } else {
- mcp->mb[1] = 0xff00;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[0] = MBC_LIP_FULL_LOGIN;
+ mcp->mb[1] = BIT_0;
+ mcp->mb[2] = 0xff;
+ mcp->mb[3] = 0;
+ mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
+ } else {
+ mcp->mb[0] = MBC_LIP_RESET;
+ mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
+ if (HAS_EXTENDED_IDS(ha)) {
+ mcp->mb[1] = 0x00ff;
+ mcp->mb[10] = 0;
+ mcp->out_mb |= MBX_10;
+ } else {
+ mcp->mb[1] = 0xff00;
+ }
+ mcp->mb[2] = ha->loop_reset_delay;
+ mcp->mb[3] = 0;
}
- mcp->mb[2] = ha->loop_reset_delay;
- mcp->mb[3] = 0;
-
mcp->in_mb = MBX_0;
mcp->tov = 30;
mcp->flags = 0;
@@ -1444,11 +1525,11 @@ qla2x00_lip_reset(scsi_qla_host_t *ha)
if (rval != QLA_SUCCESS) {
/*EMPTY*/
- DEBUG2_3_11(printk("qla2x00_lip_reset(%ld): failed=%x.\n",
- ha->host_no, rval);)
+ DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
+ __func__, ha->host_no, rval);)
} else {
/*EMPTY*/
- DEBUG11(printk("qla2x00_lip_reset(%ld): done.\n", ha->host_no);)
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
}
return rval;
@@ -1513,6 +1594,97 @@ qla2x00_send_sns(scsi_qla_host_t *ha, dm
return rval;
}
+int
+qla24xx_login_fabric(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain,
+ uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
+{
+ int rval;
+
+ struct logio_entry_24xx *lg;
+ dma_addr_t lg_dma;
+ uint32_t iop[2];
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
+
+ lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
+ if (lg == NULL) {
+ DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
+ __func__, ha->host_no));
+ return QLA_MEMORY_ALLOC_FAILED;
+ }
+ memset(lg, 0, sizeof(struct logio_entry_24xx));
+
+ lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
+ lg->entry_count = 1;
+ lg->nport_handle = cpu_to_le16(loop_id);
+ lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
+ if (opt & BIT_0)
+ lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
+ lg->port_id[0] = al_pa;
+ lg->port_id[1] = area;
+ lg->port_id[2] = domain;
+ rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0);
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
+ "(%x).\n", __func__, ha->host_no, rval);)
+ } else if (lg->entry_status != 0) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- error status (%x).\n", __func__, ha->host_no,
+ lg->entry_status));
+ rval = QLA_FUNCTION_FAILED;
+ } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
+ iop[0] = le32_to_cpu(lg->io_parameter[0]);
+ iop[1] = le32_to_cpu(lg->io_parameter[1]);
+
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- completion status (%x) ioparam=%x/%x.\n", __func__,
+ ha->host_no, le16_to_cpu(lg->comp_status), iop[0],
+ iop[1]));
+
+ switch (iop[0]) {
+ case LSC_SCODE_PORTID_USED:
+ mb[0] = MBS_PORT_ID_USED;
+ mb[1] = LSW(iop[1]);
+ break;
+ case LSC_SCODE_NPORT_USED:
+ mb[0] = MBS_LOOP_ID_USED;
+ break;
+ case LSC_SCODE_NOLINK:
+ case LSC_SCODE_NOIOCB:
+ case LSC_SCODE_NOXCB:
+ case LSC_SCODE_CMD_FAILED:
+ case LSC_SCODE_NOFABRIC:
+ case LSC_SCODE_FW_NOT_READY:
+ case LSC_SCODE_NOT_LOGGED_IN:
+ case LSC_SCODE_NOPCB:
+ case LSC_SCODE_ELS_REJECT:
+ case LSC_SCODE_CMD_PARAM_ERR:
+ case LSC_SCODE_NONPORT:
+ case LSC_SCODE_LOGGED_IN:
+ case LSC_SCODE_NOFLOGI_ACC:
+ default:
+ mb[0] = MBS_COMMAND_ERROR;
+ break;
+ }
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
+
+ iop[0] = le32_to_cpu(lg->io_parameter[0]);
+
+ mb[0] = MBS_COMMAND_COMPLETE;
+ mb[1] = 0;
+ if (iop[0] & BIT_4) {
+ if (iop[0] & BIT_8)
+ mb[1] |= BIT_1;
+ } else
+ mb[1] = BIT_0;
+ }
+
+ dma_pool_free(ha->s_dma_pool, lg, lg_dma);
+
+ return rval;
+}
+
/*
* qla2x00_login_fabric
* Issue login fabric port mailbox command.
@@ -1542,6 +1714,10 @@ qla2x00_login_fabric(scsi_qla_host_t *ha
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_login_fabric(ha, loop_id, domain, area, al_pa,
+ mb, opt);
+
DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", ha->host_no);)
mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
@@ -1665,6 +1841,57 @@ qla2x00_login_local_device(scsi_qla_host
return (rval);
}
+int
+qla24xx_fabric_logout(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain,
+ uint8_t area, uint8_t al_pa)
+{
+ int rval;
+ struct logio_entry_24xx *lg;
+ dma_addr_t lg_dma;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
+
+ lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
+ if (lg == NULL) {
+ DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
+ __func__, ha->host_no));
+ return QLA_MEMORY_ALLOC_FAILED;
+ }
+ memset(lg, 0, sizeof(struct logio_entry_24xx));
+
+ lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
+ lg->entry_count = 1;
+ lg->nport_handle = cpu_to_le16(loop_id);
+ lg->control_flags =
+ __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_EXPL_LOGO);
+ lg->port_id[0] = al_pa;
+ lg->port_id[1] = area;
+ lg->port_id[2] = domain;
+ rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0);
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
+ "(%x).\n", __func__, ha->host_no, rval);)
+ } else if (lg->entry_status != 0) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- error status (%x).\n", __func__, ha->host_no,
+ lg->entry_status));
+ rval = QLA_FUNCTION_FAILED;
+ } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- completion status (%x) ioparam=%x/%x.\n", __func__,
+ ha->host_no, le16_to_cpu(lg->comp_status),
+ le32_to_cpu(lg->io_parameter[0]),
+ le32_to_cpu(lg->io_parameter[1]));)
+ } else {
+ /*EMPTY*/
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
+ }
+
+ dma_pool_free(ha->s_dma_pool, lg, lg_dma);
+
+ return rval;
+}
+
/*
* qla2x00_fabric_logout
* Issue logout fabric port mailbox command.
@@ -1682,12 +1909,16 @@ qla2x00_login_local_device(scsi_qla_host
* Kernel context.
*/
int
-qla2x00_fabric_logout(scsi_qla_host_t *ha, uint16_t loop_id)
+qla2x00_fabric_logout(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain,
+ uint8_t area, uint8_t al_pa)
{
int rval;
mbx_cmd_t mc;
mbx_cmd_t *mcp = &mc;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_fabric_logout(ha, loop_id, domain, area, al_pa);
+
DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
ha->host_no);)
@@ -1746,7 +1977,7 @@ qla2x00_full_login_lip(scsi_qla_host_t *
mcp->mb[0] = MBC_LIP_FULL_LOGIN;
mcp->mb[1] = 0;
- mcp->mb[2] = 0;
+ mcp->mb[2] = 0xff;
mcp->mb[3] = 0;
mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
mcp->in_mb = MBX_0;
@@ -1757,7 +1988,7 @@ qla2x00_full_login_lip(scsi_qla_host_t *
if (rval != QLA_SUCCESS) {
/*EMPTY*/
DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
- ha->instance, rval);)
+ ha->host_no, rval);)
} else {
/*EMPTY*/
DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
@@ -1794,11 +2025,20 @@ qla2x00_get_id_list(scsi_qla_host_t *ha,
return QLA_FUNCTION_FAILED;
mcp->mb[0] = MBC_GET_ID_LIST;
- mcp->mb[1] = MSW(id_list_dma);
- mcp->mb[2] = LSW(id_list_dma);
- mcp->mb[3] = MSW(MSD(id_list_dma));
- mcp->mb[6] = LSW(MSD(id_list_dma));
- mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
+ mcp->out_mb = MBX_0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mcp->mb[2] = MSW(id_list_dma);
+ mcp->mb[3] = LSW(id_list_dma);
+ mcp->mb[6] = MSW(MSD(id_list_dma));
+ mcp->mb[7] = LSW(MSD(id_list_dma));
+ mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2;
+ } else {
+ mcp->mb[1] = MSW(id_list_dma);
+ mcp->mb[2] = LSW(id_list_dma);
+ mcp->mb[3] = MSW(MSD(id_list_dma));
+ mcp->mb[6] = LSW(MSD(id_list_dma));
+ mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
+ }
mcp->in_mb = MBX_1|MBX_0;
mcp->tov = 30;
mcp->flags = 0;
@@ -1934,4 +2174,334 @@ qla2x00_get_fcal_position_map(scsi_qla_h
return rval;
}
+
+uint8_t
+qla24xx_get_isp_stats(scsi_qla_host_t *ha, uint32_t *dwbuf, uint32_t dwords,
+ uint16_t *status)
+{
+ int rval;
+ mbx_cmd_t mc;
+ mbx_cmd_t *mcp = &mc;
+ uint32_t *sbuf, *siter;
+ dma_addr_t sbuf_dma;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
+
+ if (dwords > (DMA_POOL_SIZE / 4)) {
+ DEBUG2_3_11(printk("%s(%ld): Unabled to retrieve %d DWORDs "
+ "(max %d).\n", __func__, ha->host_no, dwords,
+ DMA_POOL_SIZE / 4));
+ return BIT_0;
+ }
+ sbuf = dma_pool_alloc(ha->s_dma_pool, GFP_ATOMIC, &sbuf_dma);
+ if (sbuf == NULL) {
+ DEBUG2_3_11(printk("%s(%ld): Failed to allocate memory.\n",
+ __func__, ha->host_no));
+ return BIT_0;
+ }
+ memset(sbuf, 0, DMA_POOL_SIZE);
+
+ mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
+ mcp->mb[2] = MSW(sbuf_dma);
+ mcp->mb[3] = LSW(sbuf_dma);
+ mcp->mb[6] = MSW(MSD(sbuf_dma));
+ mcp->mb[7] = LSW(MSD(sbuf_dma));
+ mcp->mb[8] = dwords;
+ mcp->mb[10] = 0;
+ mcp->out_mb = MBX_10|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
+ mcp->in_mb = MBX_2|MBX_1|MBX_0;
+ mcp->tov = 30;
+ mcp->flags = IOCTL_CMD;
+ rval = qla2x00_mailbox_command(ha, mcp);
+
+ if (rval == QLA_SUCCESS) {
+ if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
+ DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
+ __func__, ha->host_no, mcp->mb[0]));
+ status[0] = mcp->mb[0];
+ rval = BIT_1;
+ } else {
+ /* Copy over data -- firmware data is LE. */
+ siter = sbuf;
+ while (dwords--)
+ *dwbuf++ = le32_to_cpu(*siter++);
+ }
+ } else {
+ /* Failed. */
+ DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
+ ha->host_no, rval));
+ rval = BIT_1;
+ }
+
+ dma_pool_free(ha->s_dma_pool, sbuf, sbuf_dma);
+
+ return rval;
+}
#endif
+
+// Issue MAILBOX command 0x02 (Execute FW) -- ISP agnostic
+//
+
+// Alternative to MAILBOX command 0x15 (Abort IOCB Command)
+//
+
+int
+qla24xx_abort_command(scsi_qla_host_t *ha, srb_t *sp)
+{
+ int rval;
+ fc_port_t *fcport;
+ unsigned long flags = 0;
+
+ struct abort_entry_24xx *abt;
+ dma_addr_t abt_dma;
+ uint32_t handle;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
+
+ fcport = sp->fcport;
+ if (atomic_read(&ha->loop_state) == LOOP_DOWN ||
+ atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
+ return QLA_FUNCTION_FAILED;
+ }
+
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
+ if (ha->outstanding_cmds[handle] == sp)
+ break;
+ }
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+ if (handle == MAX_OUTSTANDING_COMMANDS) {
+ /* Command not found. */
+ return QLA_FUNCTION_FAILED;
+ }
+
+ abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
+ if (abt == NULL) {
+ DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
+ __func__, ha->host_no));
+ return QLA_MEMORY_ALLOC_FAILED;
+ }
+ memset(abt, 0, sizeof(struct abort_entry_24xx));
+
+ abt->entry_type = ABORT_IOCB_TYPE;
+ abt->entry_count = 1;
+ abt->nport_handle = cpu_to_le16(fcport->loop_id);
+ abt->handle_to_abort = handle;
+ abt->port_id[0] = fcport->d_id.b.al_pa;
+ abt->port_id[1] = fcport->d_id.b.area;
+ abt->port_id[2] = fcport->d_id.b.domain;
+ rval = qla2x00_issue_iocb(ha, abt, abt_dma, 0);
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
+ __func__, ha->host_no, rval);)
+ } else if (abt->entry_status != 0) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- error status (%x).\n", __func__, ha->host_no,
+ abt->entry_status));
+ rval = QLA_FUNCTION_FAILED;
+ } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- completion status (%x).\n", __func__, ha->host_no,
+ le16_to_cpu(abt->nport_handle));)
+ rval = QLA_FUNCTION_FAILED;
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
+ sp->flags |= SRB_ABORT_PENDING;
+ }
+
+ dma_pool_free(ha->s_dma_pool, abt, abt_dma);
+
+ return rval;
+}
+
+// NOTE: The driver does not issue an ABORT DEVICE mailbox command
+
+struct tsk_mgmt_cmd {
+ union {
+ struct tsk_mgmt_entry tsk;
+ struct sts_entry_24xx sts;
+ } p;
+};
+
+// NOTE: The following function handles mailbox command 0x17 and 0x66
+int
+qla24xx_abort_target(scsi_qla_host_t *ha, fc_port_t *fcport)
+{
+ int rval;
+
+ struct tsk_mgmt_cmd *tsk;
+ dma_addr_t tsk_dma;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no);)
+
+ tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
+ if (tsk == NULL) {
+ DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
+ "IOCB.\n", __func__, ha->host_no));
+ return QLA_MEMORY_ALLOC_FAILED;
+ }
+ memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
+
+ tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
+ tsk->p.tsk.entry_count = 1;
+ tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
+ tsk->p.tsk.timeout = __constant_cpu_to_le16(25);
+ tsk->p.tsk.control_flags = __constant_cpu_to_le32(TCF_TARGET_RESET);
+ tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
+ tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
+ tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
+ rval = qla2x00_issue_iocb(ha, tsk, tsk_dma, 0);
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed to issue Target Reset IOCB "
+ "(%x).\n", __func__, ha->host_no, rval);)
+ goto atarget_done;
+ } else if (tsk->p.sts.entry_status != 0) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- error status (%x).\n", __func__, ha->host_no,
+ tsk->p.sts.entry_status));
+ rval = QLA_FUNCTION_FAILED;
+ goto atarget_done;
+ } else if (tsk->p.sts.comp_status !=
+ __constant_cpu_to_le16(CS_COMPLETE)) {
+ DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
+ "-- completion status (%x).\n", __func__,
+ ha->host_no, le16_to_cpu(tsk->p.sts.comp_status));)
+ rval = QLA_FUNCTION_FAILED;
+ goto atarget_done;
+ }
+
+ /* Issue marker IOCB. */
+ rval = qla2x00_marker(ha, fcport->loop_id, 0, MK_SYNC_ID);
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
+ "(%x).\n", __func__, ha->host_no, rval);)
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no);)
+ }
+
+atarget_done:
+ dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
+
+ return rval;
+}
+
+int
+qla2x00_system_error(scsi_qla_host_t *ha)
+{
+ int rval;
+ mbx_cmd_t mc;
+ mbx_cmd_t *mcp = &mc;
+
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha))
+ return QLA_FUNCTION_FAILED;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
+
+ mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
+ mcp->out_mb = MBX_0;
+ mcp->in_mb = MBX_0;
+ mcp->tov = 5;
+ mcp->flags = 0;
+ rval = qla2x00_mailbox_command(ha, mcp);
+
+ if (rval != QLA_SUCCESS) {
+ DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
+ ha->host_no, rval));
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
+ }
+
+ return rval;
+}
+
+//UNKNOWNs
+
+// MAILBOX command 0x22 (Get Retry Counts)
+// Mailbox 1 no longer populated with 'Retry Count'
+//
+// MAILBOX command 0x69 (Get Firmware State)
+// Firmware state 1 (Waiting for Link) previously wait for AL_PA
+// Firmware state 5 (Error) is missing
+// Firmware state 6 (ReInit) is missing
+//
+
+/**
+ * qla2x00_get_serdes_params() -
+ * @ha: HA context
+ *
+ * Returns
+ */
+int
+qla2x00_get_serdes_params(scsi_qla_host_t *ha, uint16_t *sw_em_1g,
+ uint16_t *sw_em_2g, uint16_t *sw_em_4g)
+{
+ int rval;
+ mbx_cmd_t mc;
+ mbx_cmd_t *mcp = &mc;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
+
+ mcp->mb[0] = MBC_SERDES_PARAMS;
+ mcp->mb[1] = 0;
+ mcp->out_mb = MBX_1|MBX_0;
+ mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_0;
+ mcp->tov = 30;
+ mcp->flags = 0;
+ rval = qla2x00_mailbox_command(ha, mcp);
+
+ if (rval != QLA_SUCCESS) {
+ /*EMPTY*/
+ DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
+ ha->host_no, rval, mcp->mb[0]));
+ } else {
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
+
+ if (sw_em_1g)
+ *sw_em_1g = mcp->mb[2];
+ if (sw_em_2g)
+ *sw_em_2g = mcp->mb[3];
+ if (sw_em_4g)
+ *sw_em_4g = mcp->mb[4];
+ }
+
+ return rval;
+}
+
+/**
+ * qla2x00_set_serdes_params() -
+ * @ha: HA context
+ *
+ * Returns
+ */
+int
+qla2x00_set_serdes_params(scsi_qla_host_t *ha, uint16_t sw_em_1g,
+ uint16_t sw_em_2g, uint16_t sw_em_4g)
+{
+ int rval;
+ mbx_cmd_t mc;
+ mbx_cmd_t *mcp = &mc;
+
+ DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no));
+
+ mcp->mb[0] = MBC_SERDES_PARAMS;
+ mcp->mb[1] = BIT_0;
+ mcp->mb[2] = sw_em_1g;
+ mcp->mb[3] = sw_em_2g;
+ mcp->mb[4] = sw_em_4g;
+ mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
+ mcp->in_mb = MBX_0;
+ mcp->tov = 30;
+ mcp->flags = 0;
+ rval = qla2x00_mailbox_command(ha, mcp);
+
+ if (rval != QLA_SUCCESS) {
+ /*EMPTY*/
+ DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
+ ha->host_no, rval, mcp->mb[0]));
+ } else {
+ /*EMPTY*/
+ DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no));
+ }
+
+ return rval;
+}
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 5/11] qla2xxx: Add ISP24xx flash-manipulation routines.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (3 preceding siblings ...)
2005-06-14 5:31 ` [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 5:32 ` [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines Andrew Vasquez
` (5 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Add ISP24xx flash-manipulation routines.
Add read/write flash manipulation routines for the ISP24xx.
Update sysfs NVRAM objects to use generalized accessor
functions.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_attr.c | 59 ++--
drivers/scsi/qla2xxx/qla_gbl.h | 7 +
drivers/scsi/qla2xxx/qla_sup.c | 534 +++++++++++++++++++++++++++++++++++----
3 files changed, 519 insertions(+), 81 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -121,23 +121,15 @@ qla2x00_sysfs_read_nvram(struct kobject
{
struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,
struct device, kobj)));
- uint16_t *witer;
unsigned long flags;
- uint16_t cnt;
- if (!capable(CAP_SYS_ADMIN) || off != 0 || count != sizeof(nvram_t))
+ if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size)
return 0;
/* Read NVRAM. */
spin_lock_irqsave(&ha->hardware_lock, flags);
- qla2x00_lock_nvram_access(ha);
- witer = (uint16_t *)buf;
- for (cnt = 0; cnt < count / 2; cnt++) {
- *witer = cpu_to_le16(qla2x00_get_nvram_word(ha,
- cnt+ha->nvram_base));
- witer++;
- }
- qla2x00_unlock_nvram_access(ha);
+ qla2x00_read_nvram_data(ha, (uint8_t *)buf, ha->nvram_base,
+ ha->nvram_size);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
return (count);
@@ -149,34 +141,38 @@ qla2x00_sysfs_write_nvram(struct kobject
{
struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,
struct device, kobj)));
- uint8_t *iter;
- uint16_t *witer;
unsigned long flags;
uint16_t cnt;
- uint8_t chksum;
- if (!capable(CAP_SYS_ADMIN) || off != 0 || count != sizeof(nvram_t))
+ if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size)
return 0;
/* Checksum NVRAM. */
- iter = (uint8_t *)buf;
- chksum = 0;
- for (cnt = 0; cnt < count - 1; cnt++)
- chksum += *iter++;
- chksum = ~chksum + 1;
- *iter = chksum;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ uint32_t *iter;
+ uint32_t chksum;
+
+ iter = (uint32_t *)buf;
+ chksum = 0;
+ for (cnt = 0; cnt < ((count >> 2) - 1); cnt++)
+ chksum += le32_to_cpu(*iter++);
+ chksum = ~chksum + 1;
+ *iter = cpu_to_le32(chksum);
+ } else {
+ uint8_t *iter;
+ uint8_t chksum;
+
+ iter = (uint8_t *)buf;
+ chksum = 0;
+ for (cnt = 0; cnt < count - 1; cnt++)
+ chksum += *iter++;
+ chksum = ~chksum + 1;
+ *iter = chksum;
+ }
/* Write NVRAM. */
spin_lock_irqsave(&ha->hardware_lock, flags);
- qla2x00_lock_nvram_access(ha);
- qla2x00_release_nvram_protection(ha);
- witer = (uint16_t *)buf;
- for (cnt = 0; cnt < count / 2; cnt++) {
- qla2x00_write_nvram_word(ha, cnt+ha->nvram_base,
- cpu_to_le16(*witer));
- witer++;
- }
- qla2x00_unlock_nvram_access(ha);
+ qla2x00_write_nvram_data(ha, (uint8_t *)buf, ha->nvram_base, count);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
return (count);
@@ -188,7 +184,7 @@ static struct bin_attribute sysfs_nvram_
.mode = S_IRUSR | S_IWUSR,
.owner = THIS_MODULE,
},
- .size = sizeof(nvram_t),
+ .size = 0;
.read = qla2x00_sysfs_read_nvram,
.write = qla2x00_sysfs_write_nvram,
};
@@ -199,6 +195,7 @@ qla2x00_alloc_sysfs_attr(scsi_qla_host_t
struct Scsi_Host *host = ha->host;
sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_fw_dump_attr);
+ sysfs_nvram_attr.size = ha->nvram_size;
sysfs_create_bin_file(&host->shost_gendev.kobj, &sysfs_nvram_attr);
}
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -202,6 +202,13 @@ extern void qla2x00_unlock_nvram_access(
extern void qla2x00_release_nvram_protection(scsi_qla_host_t *);
extern uint16_t qla2x00_get_nvram_word(scsi_qla_host_t *, uint32_t);
extern void qla2x00_write_nvram_word(scsi_qla_host_t *, uint32_t, uint16_t);
+extern uint8_t *qla2x00_read_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t,
+ uint32_t);
+extern int qla2x00_write_nvram_data(scsi_qla_host_t *, uint8_t *, uint32_t,
+ uint32_t);
+extern uint32_t *qla24xx_read_flash_data(scsi_qla_host_t *, uint32_t *,
+ uint32_t, uint32_t);
+
/*
* Global Function Prototypes in qla_dbg.c source file.
*/
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -79,56 +79,6 @@ qla2x00_unlock_nvram_access(scsi_qla_hos
}
/**
- * qla2x00_release_nvram_protection() -
- * @ha: HA context
- */
-void
-qla2x00_release_nvram_protection(scsi_qla_host_t *ha)
-{
- device_reg_t __iomem *reg;
- uint32_t word;
-
- reg = ha->iobase;
-
- /* Release NVRAM write protection. */
- if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
- /* Write enable. */
- qla2x00_nv_write(ha, NVR_DATA_OUT);
- qla2x00_nv_write(ha, 0);
- qla2x00_nv_write(ha, 0);
- for (word = 0; word < 8; word++)
- qla2x00_nv_write(ha, NVR_DATA_OUT);
-
- qla2x00_nv_deselect(ha);
-
- /* Enable protection register. */
- qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
- qla2x00_nv_write(ha, NVR_PR_ENABLE);
- qla2x00_nv_write(ha, NVR_PR_ENABLE);
- for (word = 0; word < 8; word++)
- qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
-
- qla2x00_nv_deselect(ha);
-
- /* Clear protection register (ffff is cleared). */
- qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
- qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
- qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
- for (word = 0; word < 8; word++)
- qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
-
- qla2x00_nv_deselect(ha);
-
- /* Wait for NVRAM to become ready. */
- WRT_REG_WORD(®->nvram, NVR_SELECT);
- do {
- NVRAM_DELAY();
- word = RD_REG_WORD(®->nvram);
- } while ((word & NVR_DATA_IN) == 0);
- }
-}
-
-/**
* qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the
* request routine to get the word from NVRAM.
* @ha: HA context
@@ -204,6 +154,64 @@ qla2x00_write_nvram_word(scsi_qla_host_t
qla2x00_nv_deselect(ha);
}
+static int
+qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data,
+ uint32_t tmo)
+{
+ int ret, count;
+ uint16_t word;
+ uint32_t nv_cmd;
+ device_reg_t __iomem *reg = ha->iobase;
+
+ ret = QLA_SUCCESS;
+
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ qla2x00_nv_write(ha, 0);
+ qla2x00_nv_write(ha, 0);
+
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Write data */
+ nv_cmd = (addr << 16) | NV_WRITE_OP;
+ nv_cmd |= data;
+ nv_cmd <<= 5;
+ for (count = 0; count < 27; count++) {
+ if (nv_cmd & BIT_31)
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ else
+ qla2x00_nv_write(ha, 0);
+
+ nv_cmd <<= 1;
+ }
+
+ qla2x00_nv_deselect(ha);
+
+ /* Wait for NVRAM to become ready */
+ WRT_REG_WORD(®->nvram, NVR_SELECT);
+ do {
+ NVRAM_DELAY();
+ word = RD_REG_WORD(®->nvram);
+ if (!--tmo) {
+ ret = QLA_FUNCTION_FAILED;
+ break;
+ }
+ } while ((word & NVR_DATA_IN) == 0);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Disable writes */
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ for (count = 0; count < 10; count++)
+ qla2x00_nv_write(ha, 0);
+
+ qla2x00_nv_deselect(ha);
+
+ return ret;
+}
+
/**
* qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
* NVRAM.
@@ -294,3 +302,429 @@ qla2x00_nv_write(scsi_qla_host_t *ha, ui
NVRAM_DELAY();
}
+/**
+ * qla2x00_clear_nvram_protection() -
+ * @ha: HA context
+ */
+static int
+qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
+{
+ int ret, stat;
+ device_reg_t *reg;
+ uint32_t word;
+ uint16_t wprot, wprot_old;
+
+ reg = ha->iobase;
+
+ /* Clear NVRAM write protection. */
+ ret = QLA_FUNCTION_FAILED;
+ wprot_old = cpu_to_le16(qla2x00_get_nvram_word(ha, 0));
+ stat = qla2x00_write_nvram_word_tmo(ha, 0,
+ __constant_cpu_to_le16(0x1234), 100000);
+ wprot = cpu_to_le16(qla2x00_get_nvram_word(ha, 0));
+ if (stat != QLA_SUCCESS || wprot != __constant_cpu_to_le16(0x1234)) {
+ /* Write enable. */
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ qla2x00_nv_write(ha, 0);
+ qla2x00_nv_write(ha, 0);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Enable protection register. */
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Clear protection register (ffff is cleared). */
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Wait for NVRAM to become ready. */
+ WRT_REG_WORD(®->nvram, NVR_SELECT);
+ do {
+ NVRAM_DELAY();
+ word = RD_REG_WORD(®->nvram);
+ } while ((word & NVR_DATA_IN) == 0);
+
+ ret = QLA_SUCCESS;
+ } else
+ qla2x00_write_nvram_word(ha, 0, wprot_old);
+
+ return ret;
+}
+
+static void
+qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat)
+{
+ device_reg_t *reg;
+ uint32_t word;
+ reg = ha->iobase;
+
+ if (stat != QLA_SUCCESS)
+ return;
+
+ /* Set NVRAM write protection. */
+ /* Write enable. */
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+ qla2x00_nv_write(ha, 0);
+ qla2x00_nv_write(ha, 0);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Enable protection register. */
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Enable protection register. */
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+ qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
+ for (word = 0; word < 8; word++)
+ qla2x00_nv_write(ha, NVR_PR_ENABLE);
+
+ qla2x00_nv_deselect(ha);
+
+ /* Wait for NVRAM to become ready. */
+ WRT_REG_WORD(®->nvram, NVR_SELECT);
+ do {
+ NVRAM_DELAY();
+ word = RD_REG_WORD(®->nvram);
+ } while ((word & NVR_DATA_IN) == 0);
+}
+
+
+/*****************************************************************************/
+/* Flash Manipulation Routines */
+/*****************************************************************************/
+
+static inline uint32_t
+flash_conf_to_access_addr(uint32_t faddr)
+{
+ return FARX_ACCESS_FLASH_CONF | faddr;
+}
+
+static inline uint32_t
+flash_data_to_access_addr(uint32_t faddr)
+{
+ return FARX_ACCESS_FLASH_DATA | faddr;
+}
+
+static inline uint32_t
+nvram_conf_to_access_addr(uint32_t naddr)
+{
+ return FARX_ACCESS_NVRAM_CONF | naddr;
+}
+
+static inline uint32_t
+nvram_data_to_access_addr(uint32_t naddr)
+{
+ return FARX_ACCESS_NVRAM_DATA | naddr;
+}
+
+uint32_t
+qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr)
+{
+ int rval;
+ uint32_t cnt, data;
+ struct device_reg_24xx *reg;
+
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ WRT_REG_DWORD(®->flash_addr, addr & ~FARX_DATA_FLAG);
+ /* Wait for READ cycle to complete. */
+ rval = QLA_SUCCESS;
+ for (cnt = 3000;
+ (RD_REG_DWORD(®->flash_addr) & FARX_DATA_FLAG) == 0 &&
+ rval == QLA_SUCCESS; cnt--) {
+ if (cnt)
+ udelay(10);
+ else
+ rval = QLA_FUNCTION_TIMEOUT;
+ }
+
+ /* TODO: What happens if we time out? */
+ data = 0xDEADDEAD;
+ if (rval == QLA_SUCCESS)
+ data = RD_REG_DWORD(®->flash_data);
+
+ return data;
+}
+
+uint32_t *
+qla24xx_read_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
+ uint32_t dwords)
+{
+ uint32_t i;
+ struct device_reg_24xx *reg =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+
+ /* Pause RISC. */
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ /* Dword reads to flash. */
+ for (i = 0; i < dwords; i++, faddr++)
+ dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
+ flash_data_to_access_addr(faddr)));
+
+ /* Release RISC pause. */
+ WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ return dwptr;
+}
+
+uint8_t *
+qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+ uint32_t bytes)
+{
+ uint32_t i;
+ uint16_t *wptr;
+ uint32_t *dwptr;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx *reg =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+
+ /* Pause RISC. */
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ /* Dword reads to flash. */
+ dwptr = (uint32_t *)buf;
+ for (i = 0; i < bytes >> 2; i++, naddr++)
+ dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha,
+ nvram_data_to_access_addr(naddr)));
+
+ /* Release RISC pause. */
+ WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+ } else {
+ /* Word reads to NVRAM via registers. */
+ wptr = (uint16_t *)buf;
+ qla2x00_lock_nvram_access(ha);
+ for (i = 0; i < bytes >> 1; i++, naddr++)
+ wptr[i] = cpu_to_le16(qla2x00_get_nvram_word(ha,
+ naddr));
+ qla2x00_unlock_nvram_access(ha);
+ }
+ return buf;
+}
+
+int
+qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data)
+{
+ int rval;
+ uint32_t cnt;
+ struct device_reg_24xx *reg =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+
+ WRT_REG_DWORD(®->flash_data, data);
+ RD_REG_DWORD(®->flash_data); /* PCI Posting. */
+ WRT_REG_DWORD(®->flash_addr, addr | FARX_DATA_FLAG);
+ /* Wait for Write cycle to complete. */
+ rval = QLA_SUCCESS;
+ for (cnt = 500000; (RD_REG_DWORD(®->flash_addr) & FARX_DATA_FLAG) &&
+ rval == QLA_SUCCESS; cnt--) {
+ if (cnt)
+ udelay(10);
+ else
+ rval = QLA_FUNCTION_TIMEOUT;
+ }
+ return rval;
+}
+
+void
+qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
+ uint8_t *flash_id)
+{
+ uint32_t ids;
+
+ ids = qla24xx_read_flash_dword(ha, flash_data_to_access_addr(0xd03ab));
+ *man_id = LSB(ids);
+ *flash_id = MSB(ids);
+}
+
+int
+qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
+ uint32_t dwords)
+{
+ int ret;
+ uint32_t liter;
+ uint32_t sec_mask, rest_addr, conf_addr;
+ uint32_t fdata;
+ uint8_t man_id, flash_id;
+ struct device_reg_24xx *reg =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+
+ ret = QLA_SUCCESS;
+
+ /* Pause RISC. */
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ qla24xx_get_flash_manufacturer(ha, &man_id, &flash_id);
+ DEBUG9(printk("%s(%ld): Flash man_id=%d flash_id=%d\n", __func__,
+ ha->host_no, man_id, flash_id));
+
+ conf_addr = flash_conf_to_access_addr(0x03d8);
+ switch (man_id) {
+ case 0xbf: // STT flash
+ rest_addr = 0x1fff;
+ sec_mask = 0x3e000;
+ if (flash_id == 0x80)
+ conf_addr = flash_conf_to_access_addr(0x0352);
+ break;
+ case 0x13: // ST M25P80
+ rest_addr = 0x3fff;
+ sec_mask = 0x3c000;
+ break;
+ default:
+ // Default to 64 kb sector size
+ rest_addr = 0x3fff;
+ sec_mask = 0x3c000;
+ break;
+ }
+
+ /* Enable flash write. */
+ WRT_REG_DWORD(®->ctrl_status,
+ RD_REG_DWORD(®->ctrl_status) | CSRX_FLASH_ENABLE);
+ RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */
+
+ /* Disable flash write-protection. */
+ qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0);
+
+ do { /* Loop once to provide quick error exit. */
+ for (liter = 0; liter < dwords; liter++, faddr++, dwptr++) {
+ /* Are we at the beginning of a sector? */
+ if ((faddr & rest_addr) == 0) {
+ fdata = (faddr & sec_mask) << 2;
+ ret = qla24xx_write_flash_dword(ha, conf_addr,
+ (fdata & 0xff00) |((fdata << 16) &
+ 0xff0000) | ((fdata >> 16) & 0xff));
+ if (ret != QLA_SUCCESS) {
+ DEBUG9(printk("%s(%ld) Unable to flash "
+ "sector: address=%x.\n", __func__,
+ ha->host_no, faddr));
+ break;
+ }
+ }
+ ret = qla24xx_write_flash_dword(ha,
+ flash_data_to_access_addr(faddr),
+ cpu_to_le32(*dwptr));
+ if (ret != QLA_SUCCESS) {
+ DEBUG9(printk("%s(%ld) Unable to program flash "
+ "address=%x data=%x.\n", __func__,
+ ha->host_no, faddr, *dwptr));
+ break;
+ }
+ }
+ } while (0);
+
+ /* Disable flash write. */
+ WRT_REG_DWORD(®->ctrl_status,
+ RD_REG_DWORD(®->ctrl_status) & ~CSRX_FLASH_ENABLE);
+ RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */
+
+ /* Release RISC pause. */
+ WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ return ret;
+}
+
+int
+qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
+ uint32_t bytes)
+{
+ int ret;
+ uint32_t i;
+ uint16_t *wptr;
+ uint32_t *dwptr;
+ struct device_reg_24xx *reg =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+
+ ret = QLA_SUCCESS;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ /* Pause RISC. */
+ WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+
+ /* Enable flash write. */
+ WRT_REG_DWORD(®->ctrl_status,
+ RD_REG_DWORD(®->ctrl_status) | CSRX_FLASH_ENABLE);
+ RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */
+
+ /* Disable NVRAM write-protection. */
+ qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101),
+ 0);
+ qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101),
+ 0);
+
+ /* Dword writes to flash. */
+ dwptr = (uint32_t *)buf;
+ for (i = 0; i < bytes >> 2; i++, naddr++, dwptr++) {
+ ret = qla24xx_write_flash_dword(ha,
+ nvram_data_to_access_addr(naddr),
+ cpu_to_le32(*dwptr));
+ if (ret != QLA_SUCCESS) {
+ DEBUG9(printk("%s(%ld) Unable to program "
+ "nvram address=%x data=%x.\n", __func__,
+ ha->host_no, naddr, *dwptr));
+ break;
+ }
+ }
+
+ /* Enable NVRAM write-protection. */
+ qla24xx_write_flash_dword(ha, nvram_conf_to_access_addr(0x101),
+ 0x8c);
+
+ /* Disable flash write. */
+ WRT_REG_DWORD(®->ctrl_status,
+ RD_REG_DWORD(®->ctrl_status) & ~CSRX_FLASH_ENABLE);
+ RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */
+
+ /* Release RISC pause. */
+ WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®->hccr); /* PCI Posting. */
+ } else {
+ int stat;
+
+ qla2x00_lock_nvram_access(ha);
+
+ /* Disable NVRAM write-protection. */
+ stat = qla2x00_clear_nvram_protection(ha);
+
+ wptr = (uint16_t *)buf;
+ for (i = 0; i < bytes >> 1; i++, naddr++) {
+ qla2x00_write_nvram_word(ha, naddr,
+ cpu_to_le16(*wptr));
+ wptr++;
+ }
+
+ /* Enable NVRAM write-protection. */
+ qla2x00_set_nvram_protection(ha, stat);
+
+ qla2x00_unlock_nvram_access(ha);
+ }
+
+ return ret;
+}
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (4 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 5/11] qla2xxx: Add ISP24xx flash-manipulation routines Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 7/11] qla2xxx: ISP24xx ISR routines Andrew Vasquez
` (4 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Add ISP24xx IOCB manipulation routines.
Add appropriate glue-code for ISP24xx support while
manipulting IOCB packets. Add an ISP24xx specific
'start_scsi' routine due to command-type-7 layout
changes.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_gbl.h | 1
drivers/scsi/qla2xxx/qla_iocb.c | 346 +++++++++++++++++++++++++++++++++++++--
2 files changed, 333 insertions(+), 14 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -85,6 +85,7 @@ extern uint16_t qla2x00_calc_iocbs_64(ui
extern void qla2x00_build_scsi_iocbs_32(srb_t *, cmd_entry_t *, uint16_t);
extern void qla2x00_build_scsi_iocbs_64(srb_t *, cmd_entry_t *, uint16_t);
extern int qla2x00_start_scsi(srb_t *sp);
+extern int qla24xx_start_scsi(srb_t *sp);
int qla2x00_marker(scsi_qla_host_t *, uint16_t, uint16_t, uint8_t);
int __qla2x00_marker(scsi_qla_host_t *, uint16_t, uint16_t, uint8_t);
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c
--- a/drivers/scsi/qla2xxx/qla_iocb.c
+++ b/drivers/scsi/qla2xxx/qla_iocb.c
@@ -468,29 +468,37 @@ queuing_error:
*
* Returns non-zero if a failure occured, else zero.
*/
-int
+int
__qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
uint8_t type)
{
- mrk_entry_t *pkt;
+ mrk_entry_t *mrk;
+ struct mrk_entry_24xx *mrk24;
- pkt = (mrk_entry_t *)qla2x00_req_pkt(ha);
- if (pkt == NULL) {
- DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
+ mrk24 = NULL;
+ mrk = (mrk_entry_t *)qla2x00_req_pkt(ha);
+ if (mrk == NULL) {
+ DEBUG2_3(printk("%s(%ld): failed to allocate Marker IOCB.\n",
+ __func__, ha->host_no));
return (QLA_FUNCTION_FAILED);
}
- pkt->entry_type = MARKER_TYPE;
- pkt->modifier = type;
-
+ mrk->entry_type = MARKER_TYPE;
+ mrk->modifier = type;
if (type != MK_SYNC_ALL) {
- pkt->lun = cpu_to_le16(lun);
- SET_TARGET_ID(ha, pkt->target, loop_id);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ mrk24 = (struct mrk_entry_24xx *) mrk;
+ mrk24->nport_handle = cpu_to_le16(loop_id);
+ mrk24->lun[1] = LSB(lun);
+ mrk24->lun[2] = MSB(lun);
+ } else {
+ SET_TARGET_ID(ha, mrk->target, loop_id);
+ mrk->lun = cpu_to_le16(lun);
+ }
}
wmb();
- /* Issue command to ISP */
qla2x00_isp_cmd(ha);
return (QLA_SUCCESS);
@@ -522,6 +530,8 @@ static request_t *
qla2x00_req_pkt(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *) ha->iobase;
request_t *pkt = NULL;
uint16_t cnt;
uint32_t *dword_ptr;
@@ -532,7 +542,11 @@ qla2x00_req_pkt(scsi_qla_host_t *ha)
for (timer = HZ; timer; timer--) {
if ((req_cnt + 2) >= ha->req_q_cnt) {
/* Calculate number of free request entries. */
- cnt = qla2x00_debounce_register(ISP_REQ_Q_OUT(ha, reg));
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ cnt = (uint16_t)RD_REG_DWORD(®24->req_q_out);
+ else
+ cnt = qla2x00_debounce_register(
+ ISP_REQ_Q_OUT(ha, reg));
if (ha->req_ring_index < cnt)
ha->req_q_cnt = cnt - ha->req_ring_index;
else
@@ -601,6 +615,310 @@ qla2x00_isp_cmd(scsi_qla_host_t *ha)
ha->request_ring_ptr++;
/* Set chip new ring index. */
- WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), ha->req_ring_index);
- RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *) ha->iobase;
+ WRT_REG_DWORD(®24->req_q_in, ha->req_ring_index);
+ RD_REG_DWORD_RELAXED(®24->req_q_in); /* PCI Posting. */
+ } else {
+ WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), ha->req_ring_index);
+ RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
+ }
+
+}
+
+//
+// ISP24xx
+//
+
+/*****************************************************************************/
+/* qla_iocb.c additions */
+/*****************************************************************************/
+
+/**
+ * qla24xx_calc_iocbs() - Determine number of Command Type 3 and
+ * Continuation Type 1 IOCBs to allocate.
+ *
+ * @dsds: number of data segment decriptors needed
+ *
+ * Returns the number of IOCB entries needed to store @dsds.
+ */
+static inline uint16_t
+qla24xx_calc_iocbs(uint16_t dsds)
+{
+ uint16_t iocbs;
+
+ iocbs = 1;
+ if (dsds > 1) {
+ iocbs += (dsds - 1) / 5;
+ if ((dsds - 1) % 5)
+ iocbs++;
+ }
+ return iocbs;
+}
+
+/**
+ * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
+ * IOCB types.
+ *
+ * @sp: SRB command to process
+ * @cmd_pkt: Command type 3 IOCB
+ * @tot_dsds: Total number of segments to transfer
+ */
+static inline void
+qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
+ uint16_t tot_dsds)
+{
+ uint16_t avail_dsds;
+ uint32_t *cur_dsd;
+ scsi_qla_host_t *ha;
+ struct scsi_cmnd *cmd;
+
+ cmd = sp->cmd;
+
+ /* Update entry type to indicate Command Type 3 IOCB */
+ *((uint32_t *)(&cmd_pkt->entry_type)) =
+ __constant_cpu_to_le32(COMMAND_TYPE_7);
+
+ /* No data transfer */
+ if (cmd->request_bufflen == 0 || cmd->sc_data_direction == DMA_NONE) {
+ cmd_pkt->byte_count = __constant_cpu_to_le32(0);
+ return;
+ }
+
+ ha = sp->ha;
+
+ /* Set transfer direction */
+ if (cmd->sc_data_direction == DMA_TO_DEVICE)
+ cmd_pkt->task_mgmt_flags =
+ __constant_cpu_to_le16(TMF_WRITE_DATA);
+ else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
+ cmd_pkt->task_mgmt_flags =
+ __constant_cpu_to_le16(TMF_READ_DATA);
+
+ /* One DSD is available in the Command Type 3 IOCB */
+ avail_dsds = 1;
+ cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
+
+ /* Load data segments */
+ if (cmd->use_sg != 0) {
+ struct scatterlist *cur_seg;
+ struct scatterlist *end_seg;
+
+ cur_seg = (struct scatterlist *)cmd->request_buffer;
+ end_seg = cur_seg + tot_dsds;
+ while (cur_seg < end_seg) {
+ dma_addr_t sle_dma;
+ cont_a64_entry_t *cont_pkt;
+
+ /* Allocate additional continuation packets? */
+ if (avail_dsds == 0) {
+ /*
+ * Five DSDs are available in the Continuation
+ * Type 1 IOCB.
+ */
+ cont_pkt = qla2x00_prep_cont_type1_iocb(ha);
+ cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
+ avail_dsds = 5;
+ }
+
+ sle_dma = sg_dma_address(cur_seg);
+ *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
+ *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
+ *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
+ avail_dsds--;
+
+ cur_seg++;
+ }
+ } else {
+ *cur_dsd++ = cpu_to_le32(LSD(sp->dma_handle));
+ *cur_dsd++ = cpu_to_le32(MSD(sp->dma_handle));
+ *cur_dsd++ = cpu_to_le32(cmd->request_bufflen);
+ }
+}
+
+
+/**
+ * qla24xx_start_scsi() - Send a SCSI command to the ISP
+ * @sp: command to send to the ISP
+ *
+ * Returns non-zero if a failure occured, else zero.
+ */
+int
+qla24xx_start_scsi(srb_t *sp)
+{
+ int ret;
+ unsigned long flags;
+ scsi_qla_host_t *ha;
+ struct scsi_cmnd *cmd;
+ uint32_t *clr_ptr;
+ uint32_t index;
+ uint32_t handle;
+ struct cmd_type_7 *cmd_pkt;
+ uint32_t timeout;
+ struct scatterlist *sg;
+ uint16_t cnt;
+ uint16_t req_cnt;
+ uint16_t tot_dsds;
+ struct device_reg_24xx __iomem *reg;
+ char tag[2];
+
+ /* Setup device pointers. */
+ ret = 0;
+ ha = sp->ha;
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ cmd = sp->cmd;
+ /* So we know we haven't pci_map'ed anything yet */
+ tot_dsds = 0;
+
+ /* Send marker if required */
+ if (ha->marker_needed != 0) {
+ if (qla2x00_marker(ha, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
+ return QLA_FUNCTION_FAILED;
+ }
+ ha->marker_needed = 0;
+ }
+
+ /* Acquire ring specific lock */
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+
+ /* Check for room in outstanding command list. */
+ handle = ha->current_outstanding_cmd;
+ for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
+ handle++;
+ if (handle == MAX_OUTSTANDING_COMMANDS)
+ handle = 1;
+ if (ha->outstanding_cmds[handle] == 0)
+ break;
+ }
+ if (index == MAX_OUTSTANDING_COMMANDS)
+ goto queuing_error;
+
+ /* Map the sg table so we have an accurate count of sg entries needed */
+ if (cmd->use_sg) {
+ sg = (struct scatterlist *) cmd->request_buffer;
+ tot_dsds = pci_map_sg(ha->pdev, sg, cmd->use_sg,
+ cmd->sc_data_direction);
+ if (tot_dsds == 0)
+ goto queuing_error;
+ } else if (cmd->request_bufflen) {
+ dma_addr_t req_dma;
+
+ req_dma = pci_map_single(ha->pdev, cmd->request_buffer,
+ cmd->request_bufflen, cmd->sc_data_direction);
+ if (dma_mapping_error(req_dma))
+ goto queuing_error;
+
+ sp->dma_handle = req_dma;
+ tot_dsds = 1;
+ }
+
+ req_cnt = qla24xx_calc_iocbs(tot_dsds);
+ if (ha->req_q_cnt < (req_cnt + 2)) {
+ cnt = (uint16_t)RD_REG_DWORD_RELAXED(®->req_q_out);
+ if (ha->req_ring_index < cnt)
+ ha->req_q_cnt = cnt - ha->req_ring_index;
+ else
+ ha->req_q_cnt = ha->request_q_length -
+ (ha->req_ring_index - cnt);
+ }
+ if (ha->req_q_cnt < (req_cnt + 2)) {
+ if (cmd->use_sg)
+ pci_unmap_sg(ha->pdev, sg, cmd->use_sg,
+ cmd->sc_data_direction);
+ goto queuing_error;
+ }
+
+ /* Build command packet. */
+ ha->current_outstanding_cmd = handle;
+ ha->outstanding_cmds[handle] = sp;
+ sp->ha = ha;
+ sp->cmd->host_scribble = (unsigned char *)(unsigned long)handle;
+ ha->req_q_cnt -= req_cnt;
+
+ cmd_pkt = (struct cmd_type_7 *)ha->request_ring_ptr;
+ cmd_pkt->handle = handle;
+
+ /* Zero out remaining portion of packet. */
+ clr_ptr = (uint32_t *)cmd_pkt + 2;
+ memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
+
+ cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
+ cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
+ cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
+ cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
+
+ /* Update timeout. */
+ timeout = (uint32_t)(cmd->timeout_per_command / HZ);
+ if (timeout > FW_MAX_TIMEOUT)
+ cmd_pkt->timeout =
+ __constant_cpu_to_le16(FW_MAX_TIMEOUT);
+ else if (timeout > 25)
+ cmd_pkt->timeout = cpu_to_le16((uint16_t)timeout -
+ (5 + QLA_CMD_TIMER_DELTA));
+ else
+ cmd_pkt->timeout = cpu_to_le16((uint16_t)timeout);
+
+ cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
+
+ /* Set LUN number*/
+ cmd_pkt->lun[1] = LSB(sp->cmd->device->lun);
+ cmd_pkt->lun[2] = MSB(sp->cmd->device->lun);
+
+ /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
+ if (scsi_populate_tag_msg(cmd, tag)) {
+ switch (tag[0]) {
+ case MSG_HEAD_TAG:
+ cmd_pkt->task = TSK_HEAD_OF_QUEUE;
+ break;
+ case MSG_ORDERED_TAG:
+ cmd_pkt->task = TSK_ORDERED;
+ break;
+ }
+ }
+
+ /* Load SCSI command packet. */
+ memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
+ host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
+
+ cmd_pkt->byte_count = cpu_to_le32((uint32_t)cmd->request_bufflen);
+
+ /* Build IOCB segments */
+ qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
+
+ /* Set total data segment count. */
+ cmd_pkt->entry_count = (uint8_t)req_cnt;
+
+ wmb();
+
+ /* Adjust ring index. */
+ ha->req_ring_index++;
+ if (ha->req_ring_index == ha->request_q_length) {
+ ha->req_ring_index = 0;
+ ha->request_ring_ptr = ha->request_ring;
+ } else
+ ha->request_ring_ptr++;
+
+ sp->flags |= SRB_DMA_VALID;
+ sp->state = SRB_ACTIVE_STATE;
+
+ /* Set chip new ring index. */
+ WRT_REG_DWORD(®->req_q_in, ha->req_ring_index);
+ RD_REG_DWORD_RELAXED(®->req_q_in); /* PCI Posting. */
+
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+ return QLA_SUCCESS;
+
+queuing_error:
+ if (cmd->use_sg && tot_dsds) {
+ sg = (struct scatterlist *) cmd->request_buffer;
+ pci_unmap_sg(ha->pdev, sg, cmd->use_sg,
+ cmd->sc_data_direction);
+ } else if (tot_dsds) {
+ pci_unmap_single(ha->pdev, sp->dma_handle,
+ cmd->request_bufflen, cmd->sc_data_direction);
+ }
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+
+ return QLA_FUNCTION_FAILED;
}
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 7/11] qla2xxx: ISP24xx ISR routines.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (5 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 5:32 ` [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx Andrew Vasquez
` (3 subsequent siblings)
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
ISP24xx ISR routines.
Add appropriate glue-code for ISP24xx support -- this
included generalizing some of the core handling
routines (qla2x00_async_event() [pull-up retrieval of
mailbox values] and qla2x00_status_entry()]. Fixup
2100/2300 ISRs to handle the new conventions.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_gbl.h | 1
drivers/scsi/qla2xxx/qla_inline.h | 29 +-
drivers/scsi/qla2xxx/qla_isr.c | 577 ++++++++++++++++++++++++++-----------
3 files changed, 428 insertions(+), 179 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -193,6 +193,7 @@ qla2x00_set_serdes_params(scsi_qla_host_
*/
extern irqreturn_t qla2100_intr_handler(int, void *, struct pt_regs *);
extern irqreturn_t qla2300_intr_handler(int, void *, struct pt_regs *);
+extern irqreturn_t qla24xx_intr_handler(int, void *, struct pt_regs *);
extern void qla2x00_process_response_queue(struct scsi_qla_host *);
/*
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
--- a/drivers/scsi/qla2xxx/qla_inline.h
+++ b/drivers/scsi/qla2xxx/qla_inline.h
@@ -119,8 +119,10 @@ qla2x00_poll(scsi_qla_host_t *ha)
{
if (IS_QLA2100(ha) || IS_QLA2200(ha))
qla2100_intr_handler(0, ha, NULL);
- else
+ else if (IS_QLA23XX(ha))
qla2300_intr_handler(0, ha, NULL);
+ else
+ qla24xx_intr_handler(0, ha, NULL);
}
@@ -132,12 +134,18 @@ qla2x00_enable_intrs(scsi_qla_host_t *ha
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
+ struct device_reg_24xx __iomem *reg24;
spin_lock_irqsave(&ha->hardware_lock, flags);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ reg24 = (struct device_reg_24xx __iomem *)ha->iobase;
+ WRT_REG_DWORD(®24->ictrl, ICRX_EN_RISC_INT);
+ RD_REG_DWORD(®24->ictrl);
+ } else {
+ WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
+ RD_REG_WORD(®->ictrl);
+ }
ha->interrupts_on = 1;
- /* enable risc and host interrupts */
- WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
- RD_REG_WORD(®->ictrl);
spin_unlock_irqrestore(&ha->hardware_lock, flags);
}
@@ -147,12 +155,19 @@ qla2x00_disable_intrs(scsi_qla_host_t *h
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
+ struct device_reg_24xx __iomem *reg24;
spin_lock_irqsave(&ha->hardware_lock, flags);
ha->interrupts_on = 0;
- /* disable risc and host interrupts */
- WRT_REG_WORD(®->ictrl, 0);
- RD_REG_WORD(®->ictrl);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ reg24 = (struct device_reg_24xx __iomem *)ha->iobase;
+ WRT_REG_DWORD(®24->ictrl, 0);
+ RD_REG_DWORD(®24->ictrl);
+
+ } else {
+ WRT_REG_WORD(®->ictrl, 0);
+ RD_REG_WORD(®->ictrl);
+ }
spin_unlock_irqrestore(&ha->hardware_lock, flags);
}
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -19,14 +19,17 @@
#include "qla_def.h"
static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
-static void qla2x00_async_event(scsi_qla_host_t *, uint32_t);
+static void qla2x00_async_event(scsi_qla_host_t *, uint16_t *);
static void qla2x00_process_completed_request(struct scsi_qla_host *, uint32_t);
void qla2x00_process_response_queue(struct scsi_qla_host *);
-static void qla2x00_status_entry(scsi_qla_host_t *, sts_entry_t *);
+static void qla2x00_status_entry(scsi_qla_host_t *, void *);
static void qla2x00_status_cont_entry(scsi_qla_host_t *, sts_cont_entry_t *);
static void qla2x00_error_entry(scsi_qla_host_t *, sts_entry_t *);
static void qla2x00_ms_entry(scsi_qla_host_t *, ms_iocb_entry_t *);
+void qla24xx_process_response_queue(scsi_qla_host_t *);
+static void qla24xx_ms_entry(scsi_qla_host_t *, struct ct_entry_24xx *);
+
/**
* qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
* @irq:
@@ -45,7 +48,7 @@ qla2100_intr_handler(int irq, void *dev_
int status;
unsigned long flags;
unsigned long iter;
- uint32_t mbx;
+ uint16_t mb[4];
ha = (scsi_qla_host_t *) dev_id;
if (!ha) {
@@ -67,17 +70,20 @@ qla2100_intr_handler(int irq, void *dev_
RD_REG_WORD(®->hccr);
/* Get mailbox data. */
- mbx = RD_MAILBOX_REG(ha, reg, 0);
- if (mbx > 0x3fff && mbx < 0x8000) {
- qla2x00_mbx_completion(ha, (uint16_t)mbx);
+ mb[0] = RD_MAILBOX_REG(ha, reg, 0);
+ if (mb[0] > 0x3fff && mb[0] < 0x8000) {
+ qla2x00_mbx_completion(ha, mb[0]);
status |= MBX_INTERRUPT;
- } else if (mbx > 0x7fff && mbx < 0xc000) {
- qla2x00_async_event(ha, mbx);
+ } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
+ mb[1] = RD_MAILBOX_REG(ha, reg, 1);
+ mb[2] = RD_MAILBOX_REG(ha, reg, 2);
+ mb[3] = RD_MAILBOX_REG(ha, reg, 3);
+ qla2x00_async_event(ha, mb);
} else {
/*EMPTY*/
DEBUG2(printk("scsi(%ld): Unrecognized "
- "interrupt type (%d)\n",
- ha->host_no, mbx));
+ "interrupt type (%d).\n",
+ ha->host_no, mb[0]));
}
/* Release mailbox registers. */
WRT_REG_WORD(®->semaphore, 0);
@@ -123,8 +129,8 @@ qla2300_intr_handler(int irq, void *dev_
unsigned long flags;
unsigned long iter;
uint32_t stat;
- uint32_t mbx;
uint16_t hccr;
+ uint16_t mb[4];
ha = (scsi_qla_host_t *) dev_id;
if (!ha) {
@@ -146,7 +152,7 @@ qla2300_intr_handler(int irq, void *dev_
"Parity error -- HCCR=%x.\n", hccr);
else
qla_printk(KERN_INFO, ha,
- "RISC paused -- HCCR=%x\n", hccr);
+ "RISC paused -- HCCR=%x.\n", hccr);
/*
* Issue a "HARD" reset in order for the RISC
@@ -160,35 +166,41 @@ qla2300_intr_handler(int irq, void *dev_
} else if ((stat & HSR_RISC_INT) == 0)
break;
- mbx = MSW(stat);
switch (stat & 0xff) {
- case 0x13:
- qla2x00_process_response_queue(ha);
- break;
case 0x1:
case 0x2:
case 0x10:
case 0x11:
- qla2x00_mbx_completion(ha, (uint16_t)mbx);
+ qla2x00_mbx_completion(ha, MSW(stat));
status |= MBX_INTERRUPT;
/* Release mailbox registers. */
WRT_REG_WORD(®->semaphore, 0);
break;
case 0x12:
- qla2x00_async_event(ha, mbx);
+ mb[0] = MSW(stat);
+ mb[1] = RD_MAILBOX_REG(ha, reg, 1);
+ mb[2] = RD_MAILBOX_REG(ha, reg, 2);
+ mb[3] = RD_MAILBOX_REG(ha, reg, 3);
+ qla2x00_async_event(ha, mb);
+ break;
+ case 0x13:
+ qla2x00_process_response_queue(ha);
break;
case 0x15:
- mbx = mbx << 16 | MBA_CMPLT_1_16BIT;
- qla2x00_async_event(ha, mbx);
+ mb[0] = MBA_CMPLT_1_16BIT;
+ mb[1] = MSW(stat);
+ qla2x00_async_event(ha, mb);
break;
case 0x16:
- mbx = mbx << 16 | MBA_SCSI_COMPLETION;
- qla2x00_async_event(ha, mbx);
+ mb[0] = MBA_SCSI_COMPLETION;
+ mb[1] = MSW(stat);
+ mb[2] = RD_MAILBOX_REG(ha, reg, 2);
+ qla2x00_async_event(ha, mb);
break;
default:
DEBUG2(printk("scsi(%ld): Unrecognized interrupt type "
- "(%d)\n",
+ "(%d).\n",
ha->host_no, stat & 0xff));
break;
}
@@ -221,16 +233,22 @@ qla2x00_mbx_completion(scsi_qla_host_t *
uint16_t cnt;
uint16_t __iomem *wptr;
device_reg_t __iomem *reg = ha->iobase;
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *)ha->iobase;
/* Load return mailbox registers. */
ha->flags.mbox_int = 1;
ha->mailbox_out[0] = mb0;
- wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ wptr = (uint16_t __iomem *)®24->mailbox1;
+ else
+ wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
for (cnt = 1; cnt < ha->mbx_count; cnt++) {
if (IS_QLA2200(ha) && cnt == 8)
wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
- if (cnt == 4 || cnt == 5)
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha) && (cnt == 4 ||
+ cnt == 5))
ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
else
ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
@@ -250,14 +268,14 @@ qla2x00_mbx_completion(scsi_qla_host_t *
/**
* qla2x00_async_event() - Process aynchronous events.
* @ha: SCSI driver HA context
- * @mb0: Mailbox0 register
+ * @mb: Mailbox registers (0 - 3)
*/
static void
-qla2x00_async_event(scsi_qla_host_t *ha, uint32_t mbx)
+qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb)
{
- static char *link_speeds[5] = { "1", "2", "4", "?", "10" };
+#define LS_UNKNOWN 2
+ static char *link_speeds[5] = { "1", "2", "?", "4", "10" };
char *link_speed;
- uint16_t mb[4];
uint16_t handle_cnt;
uint16_t cnt;
uint32_t handles[5];
@@ -267,61 +285,48 @@ qla2x00_async_event(scsi_qla_host_t *ha,
/* Setup to process RIO completion. */
handle_cnt = 0;
- mb[0] = LSW(mbx);
switch (mb[0]) {
case MBA_SCSI_COMPLETION:
- if (IS_QLA2100(ha) || IS_QLA2200(ha))
- handles[0] = le32_to_cpu(
- ((uint32_t)(RD_MAILBOX_REG(ha, reg, 2) << 16)) |
- RD_MAILBOX_REG(ha, reg, 1));
- else
- handles[0] = le32_to_cpu(
- ((uint32_t)(RD_MAILBOX_REG(ha, reg, 2) << 16)) |
- MSW(mbx));
+ handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
handle_cnt = 1;
break;
case MBA_CMPLT_1_16BIT:
- if (IS_QLA2100(ha) || IS_QLA2200(ha))
- handles[0] = (uint32_t)RD_MAILBOX_REG(ha, reg, 1);
- else
- handles[0] = MSW(mbx);
+ handles[0] = mb[1];
handle_cnt = 1;
mb[0] = MBA_SCSI_COMPLETION;
break;
case MBA_CMPLT_2_16BIT:
- handles[0] = (uint32_t)RD_MAILBOX_REG(ha, reg, 1);
- handles[1] = (uint32_t)RD_MAILBOX_REG(ha, reg, 2);
+ handles[0] = mb[1];
+ handles[1] = mb[2];
handle_cnt = 2;
mb[0] = MBA_SCSI_COMPLETION;
break;
case MBA_CMPLT_3_16BIT:
- handles[0] = (uint32_t)RD_MAILBOX_REG(ha, reg, 1);
- handles[1] = (uint32_t)RD_MAILBOX_REG(ha, reg, 2);
- handles[2] = (uint32_t)RD_MAILBOX_REG(ha, reg, 3);
+ handles[0] = mb[1];
+ handles[1] = mb[2];
+ handles[2] = mb[3];
handle_cnt = 3;
mb[0] = MBA_SCSI_COMPLETION;
break;
case MBA_CMPLT_4_16BIT:
- handles[0] = (uint32_t)RD_MAILBOX_REG(ha, reg, 1);
- handles[1] = (uint32_t)RD_MAILBOX_REG(ha, reg, 2);
- handles[2] = (uint32_t)RD_MAILBOX_REG(ha, reg, 3);
+ handles[0] = mb[1];
+ handles[1] = mb[2];
+ handles[2] = mb[3];
handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
handle_cnt = 4;
mb[0] = MBA_SCSI_COMPLETION;
break;
case MBA_CMPLT_5_16BIT:
- handles[0] = (uint32_t)RD_MAILBOX_REG(ha, reg, 1);
- handles[1] = (uint32_t)RD_MAILBOX_REG(ha, reg, 2);
- handles[2] = (uint32_t)RD_MAILBOX_REG(ha, reg, 3);
+ handles[0] = mb[1];
+ handles[1] = mb[2];
+ handles[2] = mb[3];
handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
handle_cnt = 5;
mb[0] = MBA_SCSI_COMPLETION;
break;
case MBA_CMPLT_2_32BIT:
- handles[0] = le32_to_cpu(
- ((uint32_t)(RD_MAILBOX_REG(ha, reg, 2) << 16)) |
- RD_MAILBOX_REG(ha, reg, 1));
+ handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
handles[1] = le32_to_cpu(
((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
RD_MAILBOX_REG(ha, reg, 6));
@@ -348,21 +353,27 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_SYSTEM_ERR: /* System Error */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
- mb[2] = RD_MAILBOX_REG(ha, reg, 2);
- mb[3] = RD_MAILBOX_REG(ha, reg, 3);
-
qla_printk(KERN_INFO, ha,
"ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n",
mb[1], mb[2], mb[3]);
if (IS_QLA2100(ha) || IS_QLA2200(ha))
qla2100_fw_dump(ha, 1);
- else
+ else if (IS_QLA23XX(ha))
qla2300_fw_dump(ha, 1);
+ else if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ qla24xx_fw_dump(ha, 1);
- if (mb[1] == 0) {
- qla_printk(KERN_INFO, ha,
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ if (mb[1] == 0 && mb[2] == 0) {
+ qla_printk(KERN_ERR, ha,
+ "Unrecoverable Hardware Error: adapter "
+ "marked OFFLINE!\n");
+ ha->flags.online = 0;
+ } else
+ set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
+ } else if (mb[1] == 0) {
+ qla_printk(KERN_ERR, ha,
"Unrecoverable Hardware Error: adapter marked "
"OFFLINE!\n");
ha->flags.online = 0;
@@ -392,8 +403,6 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
-
DEBUG2(printk("scsi(%ld): LIP occured (%x).\n", ha->host_no,
mb[1]));
qla_printk(KERN_INFO, ha, "LIP occured (%x).\n", mb[1]);
@@ -414,13 +423,11 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_LOOP_UP: /* Loop Up Event */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
-
ha->link_data_rate = 0;
if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
link_speed = link_speeds[0];
} else {
- link_speed = link_speeds[3];
+ link_speed = link_speeds[LS_UNKNOWN];
if (mb[1] < 5)
link_speed = link_speeds[mb[1]];
ha->link_data_rate = mb[1];
@@ -438,9 +445,9 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_LOOP_DOWN: /* Loop Down Event */
- DEBUG2(printk("scsi(%ld): Asynchronous LOOP DOWN.\n",
- ha->host_no));
- qla_printk(KERN_INFO, ha, "LOOP DOWN detected.\n");
+ DEBUG2(printk("scsi(%ld): Asynchronous LOOP DOWN (%x).\n",
+ ha->host_no, mb[1]));
+ qla_printk(KERN_INFO, ha, "LOOP DOWN detected (%x).\n", mb[1]);
if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
atomic_set(&ha->loop_state, LOOP_DOWN);
@@ -457,8 +464,6 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_LIP_RESET: /* LIP reset occurred */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
-
DEBUG2(printk("scsi(%ld): Asynchronous LIP RESET (%x).\n",
ha->host_no, mb[1]));
qla_printk(KERN_INFO, ha,
@@ -509,8 +514,6 @@ qla2x00_async_event(scsi_qla_host_t *ha,
if (IS_QLA2100(ha))
break;
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
-
DEBUG2(printk("scsi(%ld): Asynchronous Change In Connection "
"received.\n",
ha->host_no));
@@ -530,16 +533,14 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_PORT_UPDATE: /* Port database update */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
- mb[2] = RD_MAILBOX_REG(ha, reg, 2);
-
/*
* If a single remote port just logged into (or logged out of)
* us, create a new entry in our rscn fcports list and handle
* the event like an RSCN.
*/
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA6312(ha) &&
- !IS_QLA6322(ha) && ha->flags.init_done && mb[1] != 0xffff &&
+ !IS_QLA6322(ha) && !IS_QLA24XX(ha) && !IS_QLA25XX(ha) &&
+ ha->flags.init_done && mb[1] != 0xffff &&
((ha->operating_mode == P2P && mb[1] != 0) ||
(ha->operating_mode != P2P && mb[1] !=
SNS_FIRST_LOOP_ID)) && (mb[2] == 6 || mb[2] == 7)) {
@@ -550,8 +551,9 @@ qla2x00_async_event(scsi_qla_host_t *ha,
rscn_fcport = qla2x00_alloc_rscn_fcport(ha, GFP_ATOMIC);
if (rscn_fcport) {
DEBUG14(printk("scsi(%ld): Port Update -- "
- "creating RSCN fcport %p for %x/%x.\n",
- ha->host_no, rscn_fcport, mb[1], mb[2]));
+ "creating RSCN fcport %p for %x/%x/%x.\n",
+ ha->host_no, rscn_fcport, mb[1], mb[2],
+ mb[3]));
rscn_fcport->loop_id = mb[1];
rscn_fcport->d_id.b24 = INVALID_PORT_ID;
@@ -580,15 +582,16 @@ qla2x00_async_event(scsi_qla_host_t *ha,
if (atomic_read(&ha->loop_state) != LOOP_DOWN &&
atomic_read(&ha->loop_state) != LOOP_DEAD) {
DEBUG2(printk("scsi(%ld): Asynchronous PORT UPDATE "
- "ignored.\n", ha->host_no));
+ "ignored %04x/%04x/%04x.\n", ha->host_no, mb[1],
+ mb[2], mb[3]));
break;
}
DEBUG2(printk("scsi(%ld): Asynchronous PORT UPDATE.\n",
ha->host_no));
DEBUG(printk(KERN_INFO
- "scsi(%ld): Port database changed %04x %04x.\n",
- ha->host_no, mb[1], mb[2]));
+ "scsi(%ld): Port database changed %04x %04x %04x.\n",
+ ha->host_no, mb[1], mb[2], mb[3]));
/*
* Mark all devices as missing so we will login again.
@@ -607,9 +610,6 @@ qla2x00_async_event(scsi_qla_host_t *ha,
break;
case MBA_RSCN_UPDATE: /* State Change Registration */
- mb[1] = RD_MAILBOX_REG(ha, reg, 1);
- mb[2] = RD_MAILBOX_REG(ha, reg, 2);
-
DEBUG2(printk("scsi(%ld): Asynchronous RSCR UPDATE.\n",
ha->host_no));
DEBUG(printk(KERN_INFO
@@ -658,6 +658,11 @@ qla2x00_async_event(scsi_qla_host_t *ha,
qla2x00_process_response_queue(ha);
break;
+
+ case MBA_DISCARD_RND_FRAME:
+ DEBUG2(printk("scsi(%ld): Discard RND Frame -- %04x %04x "
+ "%04x.\n", ha->host_no, mb[1], mb[2], mb[3]));
+ break;
}
}
@@ -804,31 +809,41 @@ qla2x00_process_response_queue(struct sc
* @pkt: Entry pointer
*/
static void
-qla2x00_status_entry(scsi_qla_host_t *ha, sts_entry_t *pkt)
+qla2x00_status_entry(scsi_qla_host_t *ha, void *pkt)
{
- unsigned b, t, l;
srb_t *sp;
fc_port_t *fcport;
struct scsi_cmnd *cp;
+ sts_entry_t *sts;
+ struct sts_entry_24xx *sts24;
uint16_t comp_status;
uint16_t scsi_status;
uint8_t lscsi_status;
int32_t resid;
- uint8_t sense_sz = 0;
- uint16_t rsp_info_len;
+ uint32_t sense_len, rsp_info_len, resid_len;
+ uint8_t *rsp_info, *sense_data;
+
+ sts = (sts_entry_t *) pkt;
+ sts24 = (struct sts_entry_24xx *) pkt;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ comp_status = le16_to_cpu(sts24->comp_status);
+ scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
+ } else {
+ comp_status = le16_to_cpu(sts->comp_status);
+ scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
+ }
/* Fast path completion. */
- if (le16_to_cpu(pkt->comp_status) == CS_COMPLETE &&
- (le16_to_cpu(pkt->scsi_status) & SS_MASK) == 0) {
- qla2x00_process_completed_request(ha, pkt->handle);
+ if (comp_status == CS_COMPLETE && scsi_status == 0) {
+ qla2x00_process_completed_request(ha, sts->handle);
return;
}
/* Validate handle. */
- if (pkt->handle < MAX_OUTSTANDING_COMMANDS) {
- sp = ha->outstanding_cmds[pkt->handle];
- ha->outstanding_cmds[pkt->handle] = NULL;
+ if (sts->handle < MAX_OUTSTANDING_COMMANDS) {
+ sp = ha->outstanding_cmds[sts->handle];
+ ha->outstanding_cmds[sts->handle] = NULL;
} else
sp = NULL;
@@ -847,40 +862,49 @@ qla2x00_status_entry(scsi_qla_host_t *ha
if (cp == NULL) {
DEBUG2(printk("scsi(%ld): Command already returned back to OS "
"pkt->handle=%d sp=%p sp->state:%d\n",
- ha->host_no, pkt->handle, sp, sp->state));
+ ha->host_no, sts->handle, sp, sp->state));
qla_printk(KERN_WARNING, ha,
"Command is NULL: already returned to OS (sp=%p)\n", sp);
return;
}
- comp_status = le16_to_cpu(pkt->comp_status);
- /* Mask of reserved bits 12-15, before we examine the scsi status */
- scsi_status = le16_to_cpu(pkt->scsi_status) & SS_MASK;
- lscsi_status = scsi_status & STATUS_MASK;
-
- CMD_ENTRY_STATUS(cp) = pkt->entry_status;
+ lscsi_status = scsi_status & STATUS_MASK;
+ CMD_ENTRY_STATUS(cp) = sts->entry_status;
CMD_COMPL_STATUS(cp) = comp_status;
CMD_SCSI_STATUS(cp) = scsi_status;
- /* Generate LU queue on cntrl, target, LUN */
- b = cp->device->channel;
- t = cp->device->id;
- l = cp->device->lun,
-
fcport = sp->fcport;
+ sense_len = rsp_info_len = resid_len = 0;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ sense_len = le32_to_cpu(sts24->sense_len);
+ rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
+ resid_len = le32_to_cpu(sts24->rsp_residual_count);
+ rsp_info = sts24->data;
+ sense_data = sts24->data;
+ host_to_fcp_swap(sts24->data, sizeof(sts24->data));
+ } else {
+ sense_len = le16_to_cpu(sts->req_sense_length);
+ rsp_info_len = le16_to_cpu(sts->rsp_info_len);
+ resid_len = le32_to_cpu(sts->residual_length);
+ rsp_info = sts->rsp_info;
+ sense_data = sts->req_sense_data;
+ }
+
/* Check for any FCP transport errors. */
if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
- rsp_info_len = le16_to_cpu(pkt->rsp_info_len);
- if (rsp_info_len > 3 && pkt->rsp_info[3]) {
+ /* Sense data lies beyond any FCP RESPONSE data. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ sense_data += rsp_info_len;
+ if (rsp_info_len > 3 && rsp_info[3]) {
DEBUG2(printk("scsi(%ld:%d:%d:%d) FCP I/O protocol "
"failure (%x/%02x%02x%02x%02x%02x%02x%02x%02x)..."
- "retrying command\n", ha->host_no, b, t, l,
- rsp_info_len, pkt->rsp_info[0], pkt->rsp_info[1],
- pkt->rsp_info[2], pkt->rsp_info[3],
- pkt->rsp_info[4], pkt->rsp_info[5],
- pkt->rsp_info[6], pkt->rsp_info[7]));
+ "retrying command\n", ha->host_no,
+ cp->device->channel, cp->device->id,
+ cp->device->lun, rsp_info_len, rsp_info[0],
+ rsp_info[1], rsp_info[2], rsp_info[3], rsp_info[4],
+ rsp_info[5], rsp_info[6], rsp_info[7]));
cp->result = DID_BUS_BUSY << 16;
qla2x00_sp_compl(ha, sp);
@@ -898,7 +922,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
break;
}
if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
- resid = le32_to_cpu(pkt->residual_length);
+ resid = resid_len;
cp->resid = resid;
CMD_RESID_LEN(cp) = resid;
}
@@ -907,39 +931,34 @@ qla2x00_status_entry(scsi_qla_host_t *ha
if (lscsi_status != SS_CHECK_CONDITION)
break;
- /*
- * Copy Sense Data into sense buffer
- */
+ /* Copy Sense Data into sense buffer. */
memset(cp->sense_buffer, 0, sizeof(cp->sense_buffer));
if (!(scsi_status & SS_SENSE_LEN_VALID))
break;
- if (le16_to_cpu(pkt->req_sense_length) <
- sizeof(cp->sense_buffer))
- sense_sz = le16_to_cpu(pkt->req_sense_length);
- else
- sense_sz = sizeof(cp->sense_buffer);
+ if (sense_len >= sizeof(cp->sense_buffer))
+ sense_len = sizeof(cp->sense_buffer);
- CMD_ACTUAL_SNSLEN(cp) = sense_sz;
- sp->request_sense_length = sense_sz;
+ CMD_ACTUAL_SNSLEN(cp) = sense_len;
+ sp->request_sense_length = sense_len;
sp->request_sense_ptr = cp->sense_buffer;
if (sp->request_sense_length > 32)
- sense_sz = 32;
+ sense_len = 32;
- memcpy(cp->sense_buffer, pkt->req_sense_data, sense_sz);
+ memcpy(cp->sense_buffer, sense_data, sense_len);
- sp->request_sense_ptr += sense_sz;
- sp->request_sense_length -= sense_sz;
+ sp->request_sense_ptr += sense_len;
+ sp->request_sense_length -= sense_len;
if (sp->request_sense_length != 0)
ha->status_srb = sp;
DEBUG5(printk("%s(): Check condition Sense data, "
- "scsi(%ld:%d:%d:%d) cmd=%p pid=%ld\n",
- __func__, ha->host_no, b, t, l, cp,
- cp->serial_number));
- if (sense_sz)
+ "scsi(%ld:%d:%d:%d) cmd=%p pid=%ld\n", __func__,
+ ha->host_no, cp->device->channel, cp->device->id,
+ cp->device->lun, cp, cp->serial_number));
+ if (sense_len)
DEBUG5(qla2x00_dump_buffer(cp->sense_buffer,
CMD_ACTUAL_SNSLEN(cp)));
break;
@@ -947,9 +966,10 @@ qla2x00_status_entry(scsi_qla_host_t *ha
case CS_DATA_UNDERRUN:
DEBUG2(printk(KERN_INFO
"scsi(%ld:%d:%d) UNDERRUN status detected 0x%x-0x%x.\n",
- ha->host_no, t, l, comp_status, scsi_status));
+ ha->host_no, cp->device->id, cp->device->lun, comp_status,
+ scsi_status));
- resid = le32_to_cpu(pkt->residual_length);
+ resid = resid_len;
if (scsi_status & SS_RESIDUAL_UNDER) {
cp->resid = resid;
CMD_RESID_LEN(cp) = resid;
@@ -971,31 +991,30 @@ qla2x00_status_entry(scsi_qla_host_t *ha
if (!(scsi_status & SS_SENSE_LEN_VALID))
break;
- if (le16_to_cpu(pkt->req_sense_length) <
- sizeof(cp->sense_buffer))
- sense_sz = le16_to_cpu(pkt->req_sense_length);
- else
- sense_sz = sizeof(cp->sense_buffer);
+ if (sense_len >= sizeof(cp->sense_buffer))
+ sense_len = sizeof(cp->sense_buffer);
- CMD_ACTUAL_SNSLEN(cp) = sense_sz;
- sp->request_sense_length = sense_sz;
+ CMD_ACTUAL_SNSLEN(cp) = sense_len;
+ sp->request_sense_length = sense_len;
sp->request_sense_ptr = cp->sense_buffer;
if (sp->request_sense_length > 32)
- sense_sz = 32;
+ sense_len = 32;
- memcpy(cp->sense_buffer, pkt->req_sense_data, sense_sz);
+ memcpy(cp->sense_buffer, sense_data, sense_len);
- sp->request_sense_ptr += sense_sz;
- sp->request_sense_length -= sense_sz;
+ sp->request_sense_ptr += sense_len;
+ sp->request_sense_length -= sense_len;
if (sp->request_sense_length != 0)
ha->status_srb = sp;
DEBUG5(printk("%s(): Check condition Sense data, "
"scsi(%ld:%d:%d:%d) cmd=%p pid=%ld\n",
- __func__, ha->host_no, b, t, l, cp,
+ __func__, ha->host_no, cp->device->channel,
+ cp->device->id, cp->device->lun, cp,
cp->serial_number));
- if (sense_sz)
+
+ if (sense_len)
DEBUG5(qla2x00_dump_buffer(cp->sense_buffer,
CMD_ACTUAL_SNSLEN(cp)));
} else {
@@ -1007,8 +1026,9 @@ qla2x00_status_entry(scsi_qla_host_t *ha
if (!(scsi_status & SS_RESIDUAL_UNDER)) {
DEBUG2(printk("scsi(%ld:%d:%d:%d) Dropped "
"frame(s) detected (%x of %x bytes)..."
- "retrying command.\n",
- ha->host_no, b, t, l, resid,
+ "retrying command.\n", ha->host_no,
+ cp->device->channel, cp->device->id,
+ cp->device->lun, resid,
cp->request_bufflen));
cp->result = DID_BUS_BUSY << 16;
@@ -1021,8 +1041,9 @@ qla2x00_status_entry(scsi_qla_host_t *ha
qla_printk(KERN_INFO, ha,
"scsi(%ld:%d:%d:%d): Mid-layer underflow "
"detected (%x of %x bytes)...returning "
- "error status.\n",
- ha->host_no, b, t, l, resid,
+ "error status.\n", ha->host_no,
+ cp->device->channel, cp->device->id,
+ cp->device->lun, resid,
cp->request_bufflen);
cp->result = DID_ERROR << 16;
@@ -1037,7 +1058,8 @@ qla2x00_status_entry(scsi_qla_host_t *ha
case CS_DATA_OVERRUN:
DEBUG2(printk(KERN_INFO
"scsi(%ld:%d:%d): OVERRUN status detected 0x%x-0x%x\n",
- ha->host_no, t, l, comp_status, scsi_status));
+ ha->host_no, cp->device->id, cp->device->lun, comp_status,
+ scsi_status));
DEBUG2(printk(KERN_INFO
"CDB: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
cp->cmnd[0], cp->cmnd[1], cp->cmnd[2], cp->cmnd[3],
@@ -1045,8 +1067,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
DEBUG2(printk(KERN_INFO
"PID=0x%lx req=0x%x xtra=0x%x -- returning DID_ERROR "
"status!\n",
- cp->serial_number, cp->request_bufflen,
- le32_to_cpu(pkt->residual_length)));
+ cp->serial_number, cp->request_bufflen, resid_len));
cp->result = DID_ERROR << 16;
break;
@@ -1063,7 +1084,8 @@ qla2x00_status_entry(scsi_qla_host_t *ha
*/
DEBUG2(printk("scsi(%ld:%d:%d): status_entry: Port Down "
"pid=%ld, compl status=0x%x, port state=0x%x\n",
- ha->host_no, t, l, cp->serial_number, comp_status,
+ ha->host_no, cp->device->id, cp->device->lun,
+ cp->serial_number, comp_status,
atomic_read(&fcport->state)));
cp->result = DID_BUS_BUSY << 16;
@@ -1094,17 +1116,25 @@ qla2x00_status_entry(scsi_qla_host_t *ha
break;
case CS_TIMEOUT:
+ cp->result = DID_BUS_BUSY << 16;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ DEBUG2(printk(KERN_INFO
+ "scsi(%ld:%d:%d:%d): TIMEOUT status detected "
+ "0x%x-0x%x\n", ha->host_no, cp->device->channel,
+ cp->device->id, cp->device->lun, comp_status,
+ scsi_status));
+ break;
+ }
DEBUG2(printk(KERN_INFO
"scsi(%ld:%d:%d:%d): TIMEOUT status detected 0x%x-0x%x "
- "sflags=%x.\n", ha->host_no, b, t, l, comp_status,
- scsi_status, le16_to_cpu(pkt->status_flags)));
+ "sflags=%x.\n", ha->host_no, cp->device->channel,
+ cp->device->id, cp->device->lun, comp_status, scsi_status,
+ le16_to_cpu(sts->status_flags)));
- cp->result = DID_BUS_BUSY << 16;
-
- /* Check to see if logout occurred */
- if ((le16_to_cpu(pkt->status_flags) & SF_LOGOUT_SENT)) {
+ /* Check to see if logout occurred. */
+ if ((le16_to_cpu(sts->status_flags) & SF_LOGOUT_SENT))
qla2x00_mark_device_lost(ha, fcport, 1);
- }
break;
case CS_QUEUE_FULL:
@@ -1120,8 +1150,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
default:
DEBUG3(printk("scsi(%ld): Error detected (unknown status) "
- "0x%x-0x%x.\n",
- ha->host_no, comp_status, scsi_status));
+ "0x%x-0x%x.\n", ha->host_no, comp_status, scsi_status));
qla_printk(KERN_INFO, ha,
"Unknown status detected 0x%x-0x%x.\n",
comp_status, scsi_status);
@@ -1169,6 +1198,8 @@ qla2x00_status_cont_entry(scsi_qla_host_
}
/* Move sense data. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ host_to_fcp_swap(pkt->data, sizeof(pkt->data));
memcpy(sp->request_sense_ptr, pkt->data, sense_sz);
DEBUG5(qla2x00_dump_buffer(sp->request_sense_ptr, sense_sz));
@@ -1189,7 +1220,7 @@ qla2x00_status_cont_entry(scsi_qla_host_
* @pkt: Entry pointer
*/
static void
-qla2x00_error_entry(scsi_qla_host_t *ha, sts_entry_t *pkt)
+qla2x00_error_entry(scsi_qla_host_t *ha, sts_entry_t *pkt)
{
srb_t *sp;
@@ -1231,15 +1262,15 @@ qla2x00_error_entry(scsi_qla_host_t *ha,
}
qla2x00_sp_compl(ha, sp);
- } else if (pkt->entry_type == COMMAND_A64_TYPE ||
- pkt->entry_type == COMMAND_TYPE) {
+ } else if (pkt->entry_type == COMMAND_A64_TYPE || pkt->entry_type ==
+ COMMAND_TYPE || pkt->entry_type == COMMAND_TYPE_7) {
DEBUG2(printk("scsi(%ld): Error entry - invalid handle\n",
ha->host_no));
qla_printk(KERN_WARNING, ha,
"Error entry - invalid handle\n");
set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
- if (ha->dpc_wait && !ha->dpc_active)
+ if (ha->dpc_wait && !ha->dpc_active)
up(ha->dpc_wait);
}
}
@@ -1250,7 +1281,7 @@ qla2x00_error_entry(scsi_qla_host_t *ha,
* @index: Response queue out pointer
*/
static void
-qla2x00_ms_entry(scsi_qla_host_t *ha, ms_iocb_entry_t *pkt)
+qla2x00_ms_entry(scsi_qla_host_t *ha, ms_iocb_entry_t *pkt)
{
srb_t *sp;
@@ -1280,3 +1311,205 @@ qla2x00_ms_entry(scsi_qla_host_t *ha, ms
qla2x00_sp_compl(ha, sp);
}
+
+// ISP24xx
+//
+/*****************************************************************************/
+/* qla_isr.c additions */
+/*****************************************************************************/
+
+/**
+ * qla24xx_process_response_queue() - Process response queue entries.
+ * @ha: SCSI driver HA context
+ */
+void
+qla24xx_process_response_queue(struct scsi_qla_host *ha)
+{
+ struct device_reg_24xx __iomem *reg;
+ struct sts_entry_24xx *pkt;
+
+ if (!ha->flags.online)
+ return;
+
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ while (ha->response_ring_ptr->signature != RESPONSE_PROCESSED) {
+ pkt = (struct sts_entry_24xx *)ha->response_ring_ptr;
+
+ ha->rsp_ring_index++;
+ if (ha->rsp_ring_index == ha->response_q_length) {
+ ha->rsp_ring_index = 0;
+ ha->response_ring_ptr = ha->response_ring;
+ } else {
+ ha->response_ring_ptr++;
+ }
+
+ if (pkt->entry_status != 0) {
+ DEBUG3(printk(KERN_INFO
+ "scsi(%ld): Process error entry.\n", ha->host_no));
+
+ //FIXME
+ qla2x00_error_entry(ha, (sts_entry_t *) pkt);
+ ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
+ wmb();
+ continue;
+ }
+
+ switch (pkt->entry_type) {
+ case STATUS_TYPE:
+ qla2x00_status_entry(ha, pkt);
+ break;
+ case STATUS_CONT_TYPE:
+ qla2x00_status_cont_entry(ha, (sts_cont_entry_t *)pkt);
+ break;
+ case MS_IOCB_TYPE:
+ qla24xx_ms_entry(ha, (struct ct_entry_24xx *)pkt);
+ break;
+ default:
+ /* Type Not Supported. */
+ DEBUG4(printk(KERN_WARNING
+ "scsi(%ld): Received unknown response pkt type %x "
+ "entry status=%x.\n",
+ ha->host_no, pkt->entry_type, pkt->entry_status));
+ break;
+ }
+ ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
+ wmb();
+ }
+
+ /* Adjust ring index */
+ WRT_REG_DWORD(®->rsp_q_out, ha->rsp_ring_index);
+}
+
+/**
+ * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
+ * @irq:
+ * @dev_id: SCSI driver HA context
+ * @regs:
+ *
+ * Called by system whenever the host adapter generates an interrupt.
+ *
+ * Returns handled flag.
+ */
+irqreturn_t
+qla24xx_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+ scsi_qla_host_t *ha;
+ struct device_reg_24xx __iomem *reg;
+ int status;
+ unsigned long flags;
+ unsigned long iter;
+ uint32_t stat;
+ uint32_t hccr;
+ uint16_t mb[4];
+
+ ha = (scsi_qla_host_t *) dev_id;
+ if (!ha) {
+ printk(KERN_INFO
+ "%s(): NULL host pointer\n", __func__);
+ return IRQ_NONE;
+ }
+
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ status = 0;
+
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ for (iter = 50; iter--; ) {
+ stat = RD_REG_DWORD(®->host_status);
+ if (stat & HSRX_RISC_PAUSED) {
+ hccr = RD_REG_DWORD(®->hccr);
+
+ qla_printk(KERN_INFO, ha, "RISC paused -- HCCR=%x, "
+ "Dumping firmware!\n", hccr);
+ qla24xx_fw_dump(ha, 1);
+
+ set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
+ break;
+ } else if ((stat & HSRX_RISC_INT) == 0)
+ break;
+
+ switch (stat & 0xff) {
+ case 0x1:
+ case 0x2:
+ case 0x10:
+ case 0x11:
+ qla2x00_mbx_completion(ha, MSW(stat));
+ status |= MBX_INTERRUPT;
+
+ break;
+ case 0x12:
+ mb[0] = MSW(stat);
+ mb[1] = RD_REG_WORD(®->mailbox1);
+ mb[2] = RD_REG_WORD(®->mailbox2);
+ mb[3] = RD_REG_WORD(®->mailbox3);
+ qla2x00_async_event(ha, mb);
+ break;
+ case 0x13:
+ qla24xx_process_response_queue(ha);
+ break;
+ default:
+ DEBUG2(printk("scsi(%ld): Unrecognized interrupt type "
+ "(%d).\n",
+ ha->host_no, stat & 0xff));
+ break;
+ }
+ WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT);
+ RD_REG_DWORD_RELAXED(®->hccr);
+ }
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+
+ if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
+ (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
+ spin_lock_irqsave(&ha->mbx_reg_lock, flags);
+
+ set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
+ up(&ha->mbx_intr_sem);
+
+ spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
+ }
+
+ return IRQ_HANDLED;
+}
+
+/**
+ * qla24xx_ms_entry() - Process a Management Server entry.
+ * @ha: SCSI driver HA context
+ * @index: Response queue out pointer
+ */
+static void
+qla24xx_ms_entry(scsi_qla_host_t *ha, struct ct_entry_24xx *pkt)
+{
+ srb_t *sp;
+
+ DEBUG3(printk("%s(%ld): pkt=%p pkthandle=%d.\n",
+ __func__, ha->host_no, pkt, pkt->handle));
+
+ DEBUG9(printk("%s: ct pkt dump:\n", __func__);)
+ DEBUG9(qla2x00_dump_buffer((void *)pkt, sizeof(struct ct_entry_24xx));)
+
+ /* Validate handle. */
+ if (pkt->handle < MAX_OUTSTANDING_COMMANDS)
+ sp = ha->outstanding_cmds[pkt->handle];
+ else
+ sp = NULL;
+
+ if (sp == NULL) {
+ DEBUG2(printk("scsi(%ld): MS entry - invalid handle\n",
+ ha->host_no));
+ DEBUG10(printk("scsi(%ld): MS entry - invalid handle\n",
+ ha->host_no));
+ qla_printk(KERN_WARNING, ha, "MS entry - invalid handle %d\n",
+ pkt->handle);
+
+ set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
+ return;
+ }
+
+ CMD_COMPL_STATUS(sp->cmd) = le16_to_cpu(pkt->comp_status);
+ CMD_ENTRY_STATUS(sp->cmd) = pkt->entry_status;
+
+ /* Free outstanding command slot. */
+ ha->outstanding_cmds[pkt->handle] = NULL;
+
+ qla2x00_sp_compl(ha, sp);
+}
+
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (6 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 7/11] qla2xxx: ISP24xx ISR routines Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 9/11] qla2xxx: NVRAM id-list updates Andrew Vasquez
` (2 subsequent siblings)
10 siblings, 1 reply; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Final glue-code for ISP24xx.
Add appropriate glue-code for ISP24xx support within
OS and initialization sections of driver.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/Makefile | 3
drivers/scsi/qla2xxx/qla_attr.c | 32 +
drivers/scsi/qla2xxx/qla_gbl.h | 1
drivers/scsi/qla2xxx/qla_init.c | 1131 ++++++++++++++++++++++++++++++-------
drivers/scsi/qla2xxx/qla_inline.h | 21 +
drivers/scsi/qla2xxx/qla_os.c | 245 ++++++--
6 files changed, 1170 insertions(+), 263 deletions(-)
diff --git a/drivers/scsi/qla2xxx/Makefile b/drivers/scsi/qla2xxx/Makefile
--- a/drivers/scsi/qla2xxx/Makefile
+++ b/drivers/scsi/qla2xxx/Makefile
@@ -1,4 +1,6 @@
EXTRA_CFLAGS += -DUNIQUE_FW_NAME
+CONFIG_SCSI_QLA24XX=m
+EXTRA_CFLAGS += -DCONFIG_SCSI_QLA24XX -DCONFIG_SCSI_QLA24XX_MODULE
qla2xxx-y := qla_os.o qla_init.o qla_mbx.o qla_iocb.o qla_isr.o qla_gs.o \
qla_dbg.o qla_sup.o qla_rscn.o qla_attr.o
@@ -14,3 +16,4 @@ obj-$(CONFIG_SCSI_QLA22XX) += qla2xxx.o
obj-$(CONFIG_SCSI_QLA2300) += qla2xxx.o qla2300.o
obj-$(CONFIG_SCSI_QLA2322) += qla2xxx.o qla2322.o
obj-$(CONFIG_SCSI_QLA6312) += qla2xxx.o qla6312.o
+obj-$(CONFIG_SCSI_QLA24XX) += qla2xxx.o
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -63,23 +63,29 @@ qla2x00_sysfs_write_fw_dump(struct kobje
ha->host_no);
vfree(ha->fw_dump_buffer);
- free_pages((unsigned long)ha->fw_dump,
- ha->fw_dump_order);
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha))
+ free_pages((unsigned long)ha->fw_dump,
+ ha->fw_dump_order);
ha->fw_dump_reading = 0;
ha->fw_dump_buffer = NULL;
ha->fw_dump = NULL;
+ ha->fw_dumped = 0;
}
break;
case 1:
- if (ha->fw_dump != NULL && !ha->fw_dump_reading) {
+ if ((ha->fw_dump || ha->fw_dumped) && !ha->fw_dump_reading) {
ha->fw_dump_reading = 1;
- dump_size = FW_DUMP_SIZE_1M;
- if (ha->fw_memory_size < 0x20000)
- dump_size = FW_DUMP_SIZE_128K;
- else if (ha->fw_memory_size < 0x80000)
- dump_size = FW_DUMP_SIZE_512K;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ dump_size = FW_DUMP_SIZE_24XX;
+ else {
+ dump_size = FW_DUMP_SIZE_1M;
+ if (ha->fw_memory_size < 0x20000)
+ dump_size = FW_DUMP_SIZE_128K;
+ else if (ha->fw_memory_size < 0x80000)
+ dump_size = FW_DUMP_SIZE_512K;
+ }
ha->fw_dump_buffer = (char *)vmalloc(dump_size);
if (ha->fw_dump_buffer == NULL) {
qla_printk(KERN_WARNING, ha,
@@ -94,9 +100,11 @@ qla2x00_sysfs_write_fw_dump(struct kobje
ha->host_no);
memset(ha->fw_dump_buffer, 0, dump_size);
if (IS_QLA2100(ha) || IS_QLA2200(ha))
- qla2100_ascii_fw_dump(ha);
- else
- qla2300_ascii_fw_dump(ha);
+ qla2100_ascii_fw_dump(ha);
+ else if (IS_QLA23XX(ha))
+ qla2300_ascii_fw_dump(ha);
+ else if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ qla24xx_ascii_fw_dump(ha);
ha->fw_dump_buffer_len = strlen(ha->fw_dump_buffer);
}
break;
@@ -184,7 +192,7 @@ static struct bin_attribute sysfs_nvram_
.mode = S_IRUSR | S_IWUSR,
.owner = THIS_MODULE,
},
- .size = 0;
+ .size = 0,
.read = qla2x00_sysfs_read_nvram,
.write = qla2x00_sysfs_write_nvram,
};
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -59,6 +59,7 @@ extern int ql2xplogiabsentdevice;
extern int ql2xenablezio;
extern int ql2xintrdelaytimer;
extern int ql2xloginretrycount;
+extern int ql2xfwloadbin;
extern void qla2x00_sp_compl(scsi_qla_host_t *, srb_t *);
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -19,6 +19,8 @@
#include "qla_def.h"
#include <linux/delay.h>
+#include <linux/vmalloc.h>
+#include <linux/firmware.h>
#include <scsi/scsi_transport_fc.h>
#include "qla_devtbl.h"
@@ -39,6 +41,7 @@ static int qla2x00_isp_firmware(scsi_qla
static void qla2x00_reset_chip(scsi_qla_host_t *);
static int qla2x00_chip_diag(scsi_qla_host_t *);
static void qla2x00_resize_request_q(scsi_qla_host_t *);
+static int qla2x00_load_risc(scsi_qla_host_t *, uint32_t *);
static int qla2x00_setup_chip(scsi_qla_host_t *);
static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
static int qla2x00_init_rings(scsi_qla_host_t *);
@@ -57,6 +60,11 @@ static int qla2x00_fabric_dev_login(scsi
static int qla2x00_restart_isp(scsi_qla_host_t *);
static void qla2x00_reset_adapter(scsi_qla_host_t *);
+static int qla24xx_nvram_config(scsi_qla_host_t *);
+static int qla24xx_load_risc_flash(scsi_qla_host_t *, uint32_t *);
+static int qla24xx_load_risc_hotplug(scsi_qla_host_t *, uint32_t *);
+static void qla24xx_update_fw_options(scsi_qla_host_t *);
+
/****************************************************************************/
/* QLogic ISP2x00 Hardware Support Functions. */
/****************************************************************************/
@@ -102,6 +110,7 @@ qla2x00_initialize_adapter(scsi_qla_host
qla2x00_reset_chip(ha);
qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
+
qla2x00_nvram_config(ha);
qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
@@ -134,6 +143,9 @@ check_fw_ready_again:
if (rval == QLA_SUCCESS) {
clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
+ /* Issue a marker after FW becomes ready. */
+ qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
+
/*
* Wait at most MAX_TARGET RSCNs for a stable
* link.
@@ -177,7 +189,6 @@ check_fw_ready_again:
if (rval == QLA_SUCCESS) {
clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
- ha->marker_needed = 1;
qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
ha->marker_needed = 0;
@@ -225,64 +236,111 @@ qla2x00_pci_config(scsi_qla_host_t *ha)
pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
- /* Get PCI bus information. */
- spin_lock_irqsave(&ha->hardware_lock, flags);
- ha->pci_attr = RD_REG_WORD(&ha->iobase->ctrl_status);
- spin_unlock_irqrestore(&ha->hardware_lock, flags);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ int pcix_cmd_reg, pcie_dctl_reg;
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *)ha->iobase;
- if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) {
- pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
+ /* Get PCI bus information. */
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ ha->pci_attr = RD_REG_DWORD(®24->ctrl_status);
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
- /* PCI Specification Revision 2.3 changes */
- if (IS_QLA2322(ha) || IS_QLA6322(ha))
- /* Command Register - Reset Interrupt Disable. */
- w &= ~PCI_COMMAND_INTX_DISABLE;
+ w &= ~PCI_COMMAND_INTX_DISABLE;
- /*
- * If this is a 2300 card and not 2312, reset the
- * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
- * the 2310 also reports itself as a 2300 so we need to get the
- * fb revision level -- a 6 indicates it really is a 2300 and
- * not a 2310.
- */
- if (IS_QLA2300(ha)) {
- spin_lock_irqsave(&ha->hardware_lock, flags);
+ /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
+ pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
+ if (pcix_cmd_reg) {
+ uint16_t pcix_cmd;
+
+ pcix_cmd_reg += PCI_X_CMD;
+ pci_read_config_word(ha->pdev, pcix_cmd_reg,
+ &pcix_cmd);
+ pcix_cmd &= ~PCI_X_CMD_MAX_READ;
+ pcix_cmd |= 0x0008;
+ pci_write_config_word(ha->pdev, pcix_cmd_reg,
+ pcix_cmd);
+ }
+
+ /* PCIe -- adjust Maximum Read Request Size (2048). */
+ pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
+ if (pcie_dctl_reg) {
+ uint16_t pcie_dctl;
+
+ pcie_dctl_reg += PCI_EXP_DEVCTL;
+ pci_read_config_word(ha->pdev, pcie_dctl_reg,
+ &pcie_dctl);
+ pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
+ pcie_dctl |= 0x4000;
+ pci_write_config_word(ha->pdev, pcie_dctl_reg,
+ pcie_dctl);
+ }
+ } else {
+ /* Get PCI bus information. */
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ ha->pci_attr = (uint32_t)RD_REG_WORD(&ha->iobase->ctrl_status);
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
- /* Pause RISC. */
- WRT_REG_WORD(&ha->iobase->hccr, HCCR_PAUSE_RISC);
- for (cnt = 0; cnt < 30000; cnt++) {
- if ((RD_REG_WORD(&ha->iobase->hccr) &
- HCCR_RISC_PAUSE) != 0)
- break;
-
- udelay(10);
- }
+ if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) {
+ pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER,
+ 0x80);
- /* Select FPM registers. */
- WRT_REG_WORD(&ha->iobase->ctrl_status, 0x20);
- RD_REG_WORD(&ha->iobase->ctrl_status);
+ /* PCI Specification Revision 2.3 changes */
+ if (IS_QLA2322(ha) || IS_QLA6322(ha))
+ /*
+ * Command Register - Reset Interrupt Disable.
+ */
+ w &= ~PCI_COMMAND_INTX_DISABLE;
- /* Get the fb rev level */
- ha->fb_rev = RD_FB_CMD_REG(ha, ha->iobase);
+ /*
+ * If this is a 2300 card and not 2312, reset the
+ * COMMAND_INVALIDATE due to a bug in the 2300.
+ * Unfortunately, the 2310 also reports itself as a
+ * 2300 so we need to get the fb revision level -- a 6
+ * indicates it really is a 2300 and not a 2310.
+ */
+ if (IS_QLA2300(ha)) {
+ spin_lock_irqsave(&ha->hardware_lock, flags);
- if (ha->fb_rev == FPM_2300)
- w &= ~PCI_COMMAND_INVALIDATE;
+ /* Pause RISC. */
+ WRT_REG_WORD(&ha->iobase->hccr,
+ HCCR_PAUSE_RISC);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_WORD(&ha->iobase->hccr) &
+ HCCR_RISC_PAUSE) != 0)
+ break;
- /* Deselect FPM registers. */
- WRT_REG_WORD(&ha->iobase->ctrl_status, 0x0);
- RD_REG_WORD(&ha->iobase->ctrl_status);
+ udelay(10);
+ }
- /* Release RISC module. */
- WRT_REG_WORD(&ha->iobase->hccr, HCCR_RELEASE_RISC);
- for (cnt = 0; cnt < 30000; cnt++) {
- if ((RD_REG_WORD(&ha->iobase->hccr) &
- HCCR_RISC_PAUSE) == 0)
- break;
-
- udelay(10);
- }
+ /* Select FPM registers. */
+ WRT_REG_WORD(&ha->iobase->ctrl_status, 0x20);
+ RD_REG_WORD(&ha->iobase->ctrl_status);
+
+ /* Get the fb rev level */
+ ha->fb_rev = RD_FB_CMD_REG(ha, ha->iobase);
+
+ if (ha->fb_rev == FPM_2300)
+ w &= ~PCI_COMMAND_INVALIDATE;
+
+ /* Deselect FPM registers. */
+ WRT_REG_WORD(&ha->iobase->ctrl_status, 0x0);
+ RD_REG_WORD(&ha->iobase->ctrl_status);
+
+ /* Release RISC module. */
+ WRT_REG_WORD(&ha->iobase->hccr,
+ HCCR_RELEASE_RISC);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_WORD(&ha->iobase->hccr) &
+ HCCR_RISC_PAUSE) == 0)
+ break;
- spin_unlock_irqrestore(&ha->hardware_lock, flags);
+ udelay(10);
+ }
+
+ spin_unlock_irqrestore(&ha->hardware_lock,
+ flags);
+ }
}
}
@@ -316,7 +374,9 @@ qla2x00_isp_firmware(scsi_qla_host_t *ha
qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
/* Verify checksum of loaded RISC code. */
- rval = qla2x00_verify_checksum(ha);
+ rval = qla2x00_verify_checksum(ha,
+ IS_QLA24XX(ha) || IS_QLA25XX(ha) ? RISC_SADDRESS :
+ *ha->brd_info->fw_info[0].fwstart);
}
if (rval) {
@@ -342,6 +402,59 @@ qla2x00_reset_chip(scsi_qla_host_t *ha)
unsigned long mbx_flags = 0;
uint16_t cmd;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+ uint32_t d2;
+
+ /* Disable ISP interrupts. */
+ qla2x00_disable_intrs(ha);
+
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+
+ /* Reset RISC. */
+ WRT_REG_DWORD(®24->ctrl_status,
+ CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_DWORD(®24->ctrl_status) &
+ CSRX_DMA_ACTIVE) == 0)
+ break;
+
+ udelay(10);
+ }
+
+ WRT_REG_DWORD(®24->ctrl_status,
+ CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ udelay(20);
+ d2 = RD_REG_DWORD(®24->ctrl_status);
+ for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
+ udelay(5);
+ d2 = RD_REG_DWORD(®24->ctrl_status);
+ barrier();
+ }
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_SET_RISC_RESET);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_CLR_RISC_RESET);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ d2 = (uint32_t) RD_REG_WORD(®24->mailbox0);
+ for (cnt = 6000000 ; cnt && d2; cnt--) {
+ udelay(5);
+ d2 = (uint32_t) RD_REG_WORD(®24->mailbox0);
+ barrier();
+ }
+
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+
+ return;
+ }
+
/* Disable ISP interrupts. */
qla2x00_disable_intrs(ha);
@@ -497,6 +610,69 @@ qla2x00_chip_diag(scsi_qla_host_t *ha)
uint32_t cnt;
uint16_t mb[5];
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+ uint32_t d2;
+
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+
+ /* Reset RISC. */
+ WRT_REG_DWORD(®24->ctrl_status,
+ CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ for (cnt = 0; cnt < 30000; cnt++) {
+ if ((RD_REG_DWORD(®24->ctrl_status) &
+ CSRX_DMA_ACTIVE) == 0)
+ break;
+
+ udelay(10);
+ }
+
+ WRT_REG_DWORD(®24->ctrl_status,
+ CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
+ udelay(20);
+ d2 = RD_REG_DWORD(®24->ctrl_status);
+ for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
+ udelay(5);
+ d2 = RD_REG_DWORD(®24->ctrl_status);
+ barrier();
+ }
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_SET_RISC_RESET);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ WRT_REG_DWORD(®24->hccr, HCCRX_CLR_RISC_RESET);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+
+ d2 = (uint32_t) RD_REG_WORD(®24->mailbox0);
+ for (cnt = 6000000 ; cnt && d2; cnt--) {
+ udelay(5);
+ d2 = (uint32_t) RD_REG_WORD(®24->mailbox0);
+ barrier();
+ }
+
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+
+ ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
+
+ rval = qla2x00_mbx_reg_test(ha);
+ if (rval) {
+ DEBUG(printk("scsi(%ld): Failed mailbox send register "
+ "test\n", ha->host_no));
+ qla_printk(KERN_WARNING, ha,
+ "Failed mailbox send register test\n");
+ }
+ else {
+ /* Flag a successful rval */
+ rval = QLA_SUCCESS;
+ }
+
+ return rval;
+ }
+
/* Assume a failed state */
rval = QLA_FUNCTION_FAILED;
@@ -606,6 +782,24 @@ chip_diag_failed:
return (rval);
}
+static void
+qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
+{
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha))
+ return;
+
+ ha->fw_dumped = 0;
+ ha->fw_dump24_len = sizeof(struct qla24xx_fw_dump);
+ ha->fw_dump24_len += (ha->fw_memory_size - 0x100000) * sizeof(uint32_t);
+ ha->fw_dump24 = vmalloc(ha->fw_dump24_len);
+ if (ha->fw_dump24)
+ qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware "
+ "dump...\n", ha->fw_dump24_len / 1024);
+ else
+ qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
+ "firmware dump!!!\n", ha->fw_dump24_len / 1024);
+}
+
/**
* qla2x00_resize_request_q() - Resize request queue given available ISP memory.
* @ha: HA context
@@ -621,6 +815,9 @@ qla2x00_resize_request_q(scsi_qla_host_t
dma_addr_t request_dma;
request_t *request_ring;
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ qla2x00_alloc_fw_dump(ha);
+
/* Valid only on recent ISPs. */
if (IS_QLA2100(ha) || IS_QLA2200(ha))
return;
@@ -668,87 +865,22 @@ qla2x00_resize_request_q(scsi_qla_host_t
static int
qla2x00_setup_chip(scsi_qla_host_t *ha)
{
- int rval;
- uint16_t cnt;
- uint16_t *risc_code;
- unsigned long risc_address;
- unsigned long risc_code_size;
- int num;
- int i;
- uint16_t *req_ring;
- struct qla_fw_info *fw_iter;
-
- rval = QLA_SUCCESS;
+ int rval;
+ uint32_t srisc_address = 0;
/* Load firmware sequences */
- fw_iter = ha->brd_info->fw_info;
- while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
- risc_code = fw_iter->fwcode;
- risc_code_size = *fw_iter->fwlen;
-
- if (fw_iter->addressing == FW_INFO_ADDR_NORMAL) {
- risc_address = *fw_iter->fwstart;
- } else {
- /* Extended address */
- risc_address = *fw_iter->lfwstart;
- }
-
- num = 0;
- rval = 0;
- while (risc_code_size > 0 && !rval) {
- cnt = (uint16_t)(ha->fw_transfer_size >> 1);
- if (cnt > risc_code_size)
- cnt = risc_code_size;
-
- DEBUG7(printk("scsi(%ld): Loading risc segment@ "
- "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
- ha->host_no, risc_code, cnt, risc_address));
-
- req_ring = (uint16_t *)ha->request_ring;
- for (i = 0; i < cnt; i++)
- req_ring[i] = cpu_to_le16(risc_code[i]);
-
- if (fw_iter->addressing == FW_INFO_ADDR_NORMAL) {
- rval = qla2x00_load_ram(ha,
- ha->request_dma, risc_address, cnt);
- } else {
- rval = qla2x00_load_ram_ext(ha,
- ha->request_dma, risc_address, cnt);
- }
- if (rval) {
- DEBUG(printk("scsi(%ld): [ERROR] Failed to "
- "load segment %d of firmware\n",
- ha->host_no, num));
- qla_printk(KERN_WARNING, ha,
- "[ERROR] Failed to load "
- "segment %d of firmware\n", num);
-
- qla2x00_dump_regs(ha);
- break;
- }
-
- risc_code += cnt;
- risc_address += cnt;
- risc_code_size -= cnt;
- num++;
- }
-
- /* Next firmware sequence */
- fw_iter++;
- }
-
- /* Verify checksum of loaded RISC code. */
- if (!rval) {
+ rval = qla2x00_load_risc(ha, &srisc_address);
+ if (rval == QLA_SUCCESS) {
DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
"code.\n", ha->host_no));
- rval = qla2x00_verify_checksum(ha);
+ rval = qla2x00_verify_checksum(ha, srisc_address);
if (rval == QLA_SUCCESS) {
/* Start firmware execution. */
DEBUG(printk("scsi(%ld): Checksum OK, start "
"firmware.\n", ha->host_no));
- rval = qla2x00_execute_fw(ha);
+ rval = qla2x00_execute_fw(ha, srisc_address);
/* Retrieve firmware information. */
if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
qla2x00_get_fw_version(ha,
@@ -812,6 +944,8 @@ qla2x00_update_fw_options(scsi_qla_host_
if (IS_QLA2100(ha) || IS_QLA2200(ha))
return;
+ else if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_update_fw_options(ha);
/* Serial Link options. */
DEBUG3(printk("scsi(%ld): Serial link options:\n",
@@ -909,23 +1043,53 @@ qla2x00_init_rings(scsi_qla_host_t *ha)
ha->rsp_ring_index = 0;
/* Setup ring parameters in initialization control block. */
- ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
- ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
- ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
- ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
- ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
- ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
- ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
- ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct init_cb_24xx *icb24;
+
+ icb24 = (struct init_cb_24xx *)ha->init_cb;
+ icb24->request_q_outpointer = __constant_cpu_to_le16(0);
+ icb24->response_q_inpointer = __constant_cpu_to_le16(0);
+ icb24->request_q_length = cpu_to_le16(ha->request_q_length);
+ icb24->response_q_length = cpu_to_le16(ha->response_q_length);
+ icb24->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
+ icb24->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
+ icb24->response_q_address[0] =
+ cpu_to_le32(LSD(ha->response_dma));
+ icb24->response_q_address[1] =
+ cpu_to_le32(MSD(ha->response_dma));
+ } else {
+ init_cb_t *icb;
+
+ icb = ha->init_cb;
+ icb->request_q_outpointer = __constant_cpu_to_le16(0);
+ icb->response_q_inpointer = __constant_cpu_to_le16(0);
+ icb->request_q_length = cpu_to_le16(ha->request_q_length);
+ icb->response_q_length = cpu_to_le16(ha->response_q_length);
+ icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
+ icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
+ icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
+ icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
+ }
/* Initialize response queue entries */
qla2x00_init_response_q_entries(ha);
- WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
- WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
- WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
- WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
- RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *) ha->iobase;
+
+ WRT_REG_DWORD(®24->req_q_in, 0);
+ WRT_REG_DWORD(®24->req_q_out, 0);
+ WRT_REG_DWORD(®24->rsp_q_in, 0);
+ WRT_REG_DWORD(®24->rsp_q_out, 0);
+ RD_REG_DWORD(®24->rsp_q_out);
+ } else {
+ WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
+ WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
+ WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
+ WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
+ RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));
+ }
spin_unlock_irqrestore(&ha->hardware_lock, flags);
@@ -933,7 +1097,7 @@ qla2x00_init_rings(scsi_qla_host_t *ha)
qla2x00_update_fw_options(ha);
DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
- rval = qla2x00_init_firmware(ha, sizeof(init_cb_t));
+ rval = qla2x00_init_firmware(ha, ha->init_cb_size);
if (rval) {
DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
ha->host_no));
@@ -1168,38 +1332,36 @@ qla2x00_configure_hba(scsi_qla_host_t *h
static int
qla2x00_nvram_config(scsi_qla_host_t *ha)
{
- int rval;
- uint8_t chksum = 0;
- uint16_t cnt;
- uint8_t *dptr1, *dptr2;
- init_cb_t *icb = ha->init_cb;
- nvram_t *nv = (nvram_t *)ha->request_ring;
- uint16_t *wptr = (uint16_t *)ha->request_ring;
+ int rval;
+ uint8_t chksum = 0;
+ uint16_t cnt;
+ uint8_t *dptr1, *dptr2;
+ init_cb_t *icb = ha->init_cb;
+ nvram_t *nv = (nvram_t *)ha->request_ring;
+ uint8_t *ptr = (uint8_t *)ha->request_ring;
device_reg_t __iomem *reg = ha->iobase;
- uint8_t timer_mode;
+ uint8_t timer_mode;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ return qla24xx_nvram_config(ha);
rval = QLA_SUCCESS;
/* Determine NVRAM starting address. */
+ ha->nvram_size = sizeof(nvram_t);
ha->nvram_base = 0;
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)
ha->nvram_base = 0x80;
/* Get NVRAM data and calculate checksum. */
- qla2x00_lock_nvram_access(ha);
- for (cnt = 0; cnt < sizeof(nvram_t)/2; cnt++) {
- *wptr = cpu_to_le16(qla2x00_get_nvram_word(ha,
- (cnt+ha->nvram_base)));
- chksum += (uint8_t)*wptr;
- chksum += (uint8_t)(*wptr >> 8);
- wptr++;
- }
- qla2x00_unlock_nvram_access(ha);
+ qla2x00_read_nvram_data(ha, ptr, ha->nvram_base, ha->nvram_size);
+ for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
+ chksum += *ptr++;
DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
- sizeof(nvram_t)));
+ ha->nvram_size));
/* Bad NVRAM data, set defaults parameters. */
if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
@@ -1214,7 +1376,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
/*
* Set default initialization control block.
*/
- memset(nv, 0, sizeof(nvram_t));
+ memset(nv, 0, ha->nvram_size);
nv->parameter_block_version = ICB_VERSION;
if (IS_QLA23XX(ha)) {
@@ -1274,7 +1436,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
#endif
/* Reset Initialization control block */
- memset(icb, 0, sizeof(init_cb_t));
+ memset(icb, 0, ha->init_cb_size);
/*
* Setup driver NVRAM options.
@@ -1287,6 +1449,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
if (IS_QLA23XX(ha)) {
nv->firmware_options[0] |= BIT_2;
nv->firmware_options[0] &= ~BIT_3;
+ nv->add_firmware_options[1] |= BIT_5 | BIT_4;
if (IS_QLA2300(ha)) {
if (ha->fb_rev == FPM_2310) {
@@ -1387,7 +1550,8 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
ha->serial0 = icb->port_name[5];
ha->serial1 = icb->port_name[6];
ha->serial2 = icb->port_name[7];
- memcpy(ha->node_name, icb->node_name, WWN_SIZE);
+ ha->node_name = icb->node_name;
+ ha->port_name = icb->port_name;
icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
@@ -1702,12 +1866,16 @@ qla2x00_configure_local_loop(scsi_qla_ho
loop_id = (uint16_t)
((struct gid_list_info *)id_iter)->loop_id_2100;
id_iter += 4;
- } else {
+ } else if (IS_QLA23XX(ha)) {
loop_id = le16_to_cpu(
((struct gid_list_info *)id_iter)->loop_id);
id_iter += 6;
+ } else /* if (IS_QLA24XX(ha)) */ {
+ loop_id = le16_to_cpu(
+ ((struct gid_list_info *)id_iter)->loop_id);
+ id_iter += 8;
}
-
+
/* Bypass reserved domain fields. */
if ((domain & 0xf0) == 0xf0)
continue;
@@ -1917,10 +2085,15 @@ qla2x00_configure_fabric(scsi_qla_host_t
fc_port_t *fcport, *fcptemp;
uint16_t next_loopid;
uint16_t mb[MAILBOX_REGISTER_COUNT];
+ uint16_t loop_id;
LIST_HEAD(new_fcports);
/* If FL port exists, then SNS is present */
- rval = qla2x00_get_port_name(ha, SNS_FL_PORT, NULL, 0);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ loop_id = NPH_F_PORT;
+ else
+ loop_id = SNS_FL_PORT;
+ rval = qla2x00_get_port_name(ha, loop_id, NULL, 0);
if (rval != QLA_SUCCESS) {
DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
"Port\n", ha->host_no));
@@ -1937,12 +2110,16 @@ qla2x00_configure_fabric(scsi_qla_host_t
}
do {
/* Ensure we are logged into the SNS. */
- qla2x00_login_fabric(ha, SIMPLE_NAME_SERVER, 0xff, 0xff, 0xfc,
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
+ loop_id = NPH_SNS;
+ else
+ loop_id = SIMPLE_NAME_SERVER;
+ qla2x00_login_fabric(ha, loop_id, 0xff, 0xff, 0xfc,
mb, BIT_1 | BIT_0);
if (mb[0] != MBS_COMMAND_COMPLETE) {
DEBUG2(qla_printk(KERN_INFO, ha,
"Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
- "mb[2]=%x mb[6]=%x mb[7]=%x\n", SIMPLE_NAME_SERVER,
+ "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
mb[0], mb[1], mb[2], mb[6], mb[7]));
return (QLA_SUCCESS);
}
@@ -1993,7 +2170,10 @@ qla2x00_configure_fabric(scsi_qla_host_t
fcport->port_type != FCT_BROADCAST) {
qla2x00_fabric_logout(ha,
- fcport->loop_id);
+ fcport->loop_id,
+ fcport->d_id.b.domain,
+ fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
fcport->loop_id = FC_NO_LOOP_ID;
}
}
@@ -2023,7 +2203,6 @@ qla2x00_configure_fabric(scsi_qla_host_t
break;
}
}
-
/* Login and update database */
qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
}
@@ -2137,7 +2316,6 @@ qla2x00_find_all_fabric_devs(scsi_qla_ho
/* Starting free loop ID. */
loop_id = ha->min_external_loopid;
-
for (; loop_id <= ha->last_loop_id; loop_id++) {
if (qla2x00_is_reserved_id(ha, loop_id))
continue;
@@ -2238,7 +2416,9 @@ qla2x00_find_all_fabric_devs(scsi_qla_ho
(fcport->flags & FCF_TAPE_PRESENT) == 0 &&
fcport->port_type != FCT_INITIATOR &&
fcport->port_type != FCT_BROADCAST) {
- qla2x00_fabric_logout(ha, fcport->loop_id);
+ qla2x00_fabric_logout(ha, fcport->loop_id,
+ fcport->d_id.b.domain, fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
fcport->loop_id = FC_NO_LOOP_ID;
}
@@ -2421,6 +2601,7 @@ qla2x00_device_resync(scsi_qla_host_t *h
case 0:
if (!IS_QLA2100(ha) && !IS_QLA2200(ha) &&
!IS_QLA6312(ha) && !IS_QLA6322(ha) &&
+ !IS_QLA24XX(ha) && !IS_QLA25XX(ha) &&
ha->flags.init_done) {
/* Handle port RSCN via asyncronous IOCBs */
rval2 = qla2x00_handle_port_rscn(ha, rscn_entry,
@@ -2489,15 +2670,23 @@ qla2x00_fabric_dev_login(scsi_qla_host_t
{
int rval;
int retry;
+ uint8_t opts;
rval = QLA_SUCCESS;
retry = 0;
rval = qla2x00_fabric_login(ha, fcport, next_loopid);
if (rval == QLA_SUCCESS) {
- rval = qla2x00_get_port_database(ha, fcport, 0);
+ /* Send an ADISC to tape devices.*/
+ opts = 0;
+ if (fcport->flags & FCF_TAPE_PRESENT)
+ opts |= BIT_1;
+ rval = qla2x00_get_port_database(ha, fcport, opts);
if (rval != QLA_SUCCESS) {
- qla2x00_fabric_logout(ha, fcport->loop_id);
+ qla2x00_fabric_logout(ha, fcport->loop_id,
+ fcport->d_id.b.domain, fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
+ qla2x00_mark_device_lost(ha, fcport, 1);
} else {
qla2x00_update_fcport(ha, fcport);
}
@@ -2545,10 +2734,10 @@ qla2x00_fabric_login(scsi_qla_host_t *ha
if (mb[0] == MBS_PORT_ID_USED) {
/*
* Device has another loop ID. The firmware team
- * recommends us to perform an implicit login with the
- * specified ID again. The ID we just used is save here
- * so we return with an ID that can be tried by the
- * next login.
+ * recommends the driver perform an implicit login with
+ * the specified ID again. The ID we just used is save
+ * here so we return with an ID that can be tried by
+ * the next login.
*/
retry++;
tmp_loopid = fcport->loop_id;
@@ -2602,7 +2791,9 @@ qla2x00_fabric_login(scsi_qla_host_t *ha
* dead.
*/
*next_loopid = fcport->loop_id;
- qla2x00_fabric_logout(ha, fcport->loop_id);
+ qla2x00_fabric_logout(ha, fcport->loop_id,
+ fcport->d_id.b.domain, fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
qla2x00_mark_device_lost(ha, fcport, 1);
rval = 1;
@@ -2618,7 +2809,9 @@ qla2x00_fabric_login(scsi_qla_host_t *ha
fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
*next_loopid = fcport->loop_id;
- qla2x00_fabric_logout(ha, fcport->loop_id);
+ qla2x00_fabric_logout(ha, fcport->loop_id,
+ fcport->d_id.b.domain, fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
fcport->loop_id = FC_NO_LOOP_ID;
atomic_set(&fcport->state, FCS_DEVICE_DEAD);
@@ -2688,14 +2881,11 @@ qla2x00_loop_resync(scsi_qla_host_t *ha)
/* Wait at most MAX_TARGET RSCNs for a stable link. */
wait_time = 256;
do {
- /* v2.19.05b6 */
atomic_set(&ha->loop_state, LOOP_UPDATE);
- /*
- * Issue marker command only when we are going
- * to start the I/O .
- */
- ha->marker_needed = 1;
+ /* Issue a marker after FW becomes ready. */
+ qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
+ ha->marker_needed = 0;
/* Remap devices on Loop. */
clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
@@ -2828,7 +3018,7 @@ qla2x00_abort_isp(scsi_qla_host_t *ha)
} else { /* schedule another ISP abort */
ha->isp_abort_cnt--;
DEBUG(printk("qla%ld: ISP abort - "
- "retry remainning %d\n",
+ "retry remaining %d\n",
ha->host_no, ha->isp_abort_cnt);)
status = 1;
}
@@ -2887,9 +3077,15 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
spin_lock_irqsave(&ha->hardware_lock, flags);
- /* Disable SRAM, Instruction RAM and GP RAM parity. */
- WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
- RD_REG_WORD(®->hccr); /* PCI Posting. */
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha)) {
+ /*
+ * Disable SRAM, Instruction RAM and GP RAM
+ * parity.
+ */
+ WRT_REG_WORD(®->hccr,
+ (HCCR_ENABLE_PARITY + 0x0));
+ RD_REG_WORD(®->hccr);
+ }
spin_unlock_irqrestore(&ha->hardware_lock, flags);
@@ -2897,16 +3093,21 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
spin_lock_irqsave(&ha->hardware_lock, flags);
- /* Enable proper parity */
- if (IS_QLA2300(ha))
- /* SRAM parity */
- WRT_REG_WORD(®->hccr,
- (HCCR_ENABLE_PARITY + 0x1));
- else
- /* SRAM, Instruction RAM and GP RAM parity */
- WRT_REG_WORD(®->hccr,
- (HCCR_ENABLE_PARITY + 0x7));
- RD_REG_WORD(®->hccr); /* PCI Posting. */
+ if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha)) {
+ /* Enable proper parity */
+ if (IS_QLA2300(ha))
+ /* SRAM parity */
+ WRT_REG_WORD(®->hccr,
+ (HCCR_ENABLE_PARITY + 0x1));
+ else
+ /*
+ * SRAM, Instruction RAM and GP RAM
+ * parity.
+ */
+ WRT_REG_WORD(®->hccr,
+ (HCCR_ENABLE_PARITY + 0x7));
+ RD_REG_WORD(®->hccr);
+ }
spin_unlock_irqrestore(&ha->hardware_lock, flags);
}
@@ -2917,9 +3118,11 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
if (!(status = qla2x00_fw_ready(ha))) {
DEBUG(printk("%s(): Start configure loop, "
- "status = %d\n",
- __func__,
- status);)
+ "status = %d\n", __func__, status);)
+
+ /* Issue a marker after FW becomes ready. */
+ qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
+
ha->flags.online = 1;
/* Wait at most MAX_TARGET RSCNs for a stable link. */
wait_time = 256;
@@ -2960,11 +3163,537 @@ qla2x00_reset_adapter(scsi_qla_host_t *h
ha->flags.online = 0;
qla2x00_disable_intrs(ha);
- /* Reset RISC processor. */
spin_lock_irqsave(&ha->hardware_lock, flags);
- WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
- RD_REG_WORD(®->hccr); /* PCI Posting. */
- WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
- RD_REG_WORD(®->hccr); /* PCI Posting. */
+ /* Reset RISC processor. */
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ struct device_reg_24xx __iomem *reg24 =
+ (struct device_reg_24xx __iomem *)ha->iobase;
+ WRT_REG_DWORD(®24->hccr, HCCRX_SET_RISC_RESET);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+ WRT_REG_DWORD(®24->hccr, HCCRX_REL_RISC_PAUSE);
+ RD_REG_DWORD(®24->hccr); /* PCI Posting. */
+ } else {
+ WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
+ RD_REG_WORD(®->hccr); /* PCI Posting. */
+ WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
+ RD_REG_WORD(®->hccr); /* PCI Posting. */
+ }
spin_unlock_irqrestore(&ha->hardware_lock, flags);
}
+
+static int
+qla24xx_nvram_config(scsi_qla_host_t *ha)
+{
+ int rval;
+ struct init_cb_24xx *icb;
+ struct nvram_24xx *nv;
+ uint32_t *dptr;
+ uint8_t *dptr1, *dptr2;
+ struct device_reg_24xx __iomem *reg;
+ uint32_t chksum;
+ uint16_t cnt;
+
+ rval = QLA_SUCCESS;
+ icb = (struct init_cb_24xx *)ha->init_cb;
+ reg = (struct device_reg_24xx __iomem *)ha->iobase;
+ nv = (struct nvram_24xx *)ha->request_ring;
+
+ /* Determine NVRAM starting address. */
+ ha->nvram_size = sizeof(struct nvram_24xx);
+ ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
+ if (PCI_FUNC(ha->pdev->devfn))
+ ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
+
+ /* Get NVRAM data and calculate checksum. */
+ dptr = (uint32_t *)nv;
+ qla2x00_read_nvram_data(ha, (uint8_t *)dptr, ha->nvram_base,
+ ha->nvram_size);
+ for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
+ chksum += le32_to_cpu(*dptr++);
+
+ DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
+ DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
+ ha->nvram_size));
+
+ /* Bad NVRAM data, set defaults parameters. */
+ if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
+ || nv->id[3] != ' ' ||
+ nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
+ /* Reset NVRAM data. */
+ qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
+ "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
+ le16_to_cpu(nv->nvram_version));
+ qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
+ "invalid -- WWPN) defaults.\n");
+
+ /*
+ * Set default initialization control block.
+ */
+ memset(nv, 0, ha->nvram_size);
+ nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
+ nv->version = __constant_cpu_to_le16(ICB_VERSION);
+ nv->frame_payload_size = __constant_cpu_to_le16(2048);
+ nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
+ nv->exchange_count = __constant_cpu_to_le16(0);
+ nv->hard_address = __constant_cpu_to_le16(124);
+ nv->port_name[0] = 0x21;
+ nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
+ nv->port_name[2] = 0x00;
+ nv->port_name[3] = 0xe0;
+ nv->port_name[4] = 0x8b;
+ nv->port_name[5] = 0x1c;
+ nv->port_name[6] = 0x55;
+ nv->port_name[7] = 0x86;
+ nv->node_name[0] = 0x20;
+ nv->node_name[1] = 0x00;
+ nv->node_name[2] = 0x00;
+ nv->node_name[3] = 0xe0;
+ nv->node_name[4] = 0x8b;
+ nv->node_name[5] = 0x1c;
+ nv->node_name[6] = 0x55;
+ nv->node_name[7] = 0x86;
+ nv->login_retry_count = __constant_cpu_to_le16(8);
+ nv->link_down_timeout = __constant_cpu_to_le16(200);
+ nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
+ nv->login_timeout = __constant_cpu_to_le16(0);
+ nv->firmware_options_1 =
+ __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
+ nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
+ nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
+ nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
+ nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
+ nv->efi_parameters = __constant_cpu_to_le32(0);
+ nv->reset_delay = 5;
+ nv->max_luns_per_target = __constant_cpu_to_le16(128);
+ nv->port_down_retry_count = __constant_cpu_to_le16(30);
+ nv->link_down_timeout = __constant_cpu_to_le16(30);
+
+ rval = 1;
+ }
+
+ /* Reset Initialization control block */
+ memset(icb, 0, sizeof(struct init_cb_24xx));
+
+ /* Copy 1st segment. */
+ dptr1 = (uint8_t *)icb;
+ dptr2 = (uint8_t *)&nv->version;
+ cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
+ while (cnt--)
+ *dptr1++ = *dptr2++;
+
+ icb->login_retry_count = nv->login_retry_count;
+ icb->link_down_timeout = nv->link_down_timeout;
+
+ /* Copy 2nd segment. */
+ dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
+ dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
+ cnt = (uint8_t *)&icb->reserved_3 -
+ (uint8_t *)&icb->interrupt_delay_timer;
+ while (cnt--)
+ *dptr1++ = *dptr2++;
+
+ /*
+ * Setup driver NVRAM options.
+ */
+ if (memcmp(nv->model_name, BINZERO, sizeof(nv->model_name)) != 0) {
+ char *st, *en;
+ uint16_t index;
+
+ strncpy(ha->model_number, nv->model_name,
+ sizeof(nv->model_name));
+ st = en = ha->model_number;
+ en += sizeof(nv->model_name) - 1;
+ while (en > st) {
+ if (*en != 0x20 && *en != 0x00)
+ break;
+ *en-- = '\0';
+ }
+
+ index = (ha->pdev->subsystem_device & 0xff);
+ if (index < QLA_MODEL_NAMES)
+ ha->model_desc = qla2x00_model_desc[index];
+ } else
+ strcpy(ha->model_number, "QLA2462");
+
+ /* Prepare nodename */
+ if ((icb->firmware_options_1 & BIT_14) == 0) {
+ /*
+ * Firmware will apply the following mask if the nodename was
+ * not provided.
+ */
+ memcpy(icb->node_name, icb->port_name, WWN_SIZE);
+ icb->node_name[0] &= 0xF0;
+ }
+
+ /* Set host adapter parameters. */
+ ha->flags.disable_risc_code_load = 0;
+ ha->flags.enable_lip_reset = 1;
+ ha->flags.enable_lip_full_login = 1;
+ ha->flags.enable_target_reset = 1;
+ ha->flags.enable_led_scheme = 0;
+
+ ha->operating_mode =
+ (icb->firmware_options_2 & (BIT_6 | BIT_5 | BIT_4)) >> 4;
+
+ memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
+ sizeof(ha->fw_seriallink_options24));
+
+ /* save HBA serial number */
+ ha->serial0 = icb->port_name[5];
+ ha->serial1 = icb->port_name[6];
+ ha->serial2 = icb->port_name[7];
+ ha->node_name = icb->node_name;
+ ha->port_name = icb->port_name;
+
+ ha->retry_count = le16_to_cpu(nv->login_retry_count);
+
+ /* Set minimum login_timeout to 4 seconds. */
+ if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
+ nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
+ if (le16_to_cpu(nv->login_timeout) < 4)
+ nv->login_timeout = __constant_cpu_to_le16(4);
+ ha->login_timeout = le16_to_cpu(nv->login_timeout);
+ icb->login_timeout = cpu_to_le16(nv->login_timeout);
+
+ /* Set minimum RATOV to 200 tenths of a second. */
+ ha->r_a_tov = 200;
+
+ ha->loop_reset_delay = nv->reset_delay;
+
+ /* Link Down Timeout = 0:
+ *
+ * When Port Down timer expires we will start returning
+ * I/O's to OS with "DID_NO_CONNECT".
+ *
+ * Link Down Timeout != 0:
+ *
+ * The driver waits for the link to come up after link down
+ * before returning I/Os to OS with "DID_NO_CONNECT".
+ */
+ if (le16_to_cpu(nv->link_down_timeout) == 0) {
+ ha->loop_down_abort_time =
+ (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
+ } else {
+ ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
+ ha->loop_down_abort_time =
+ (LOOP_DOWN_TIME - ha->link_down_timeout);
+ }
+
+ /* Need enough time to try and get the port back. */
+ ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
+ if (qlport_down_retry)
+ ha->port_down_retry_count = qlport_down_retry;
+
+ /* Set login_retry_count */
+ ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
+ if (ha->port_down_retry_count ==
+ le16_to_cpu(nv->port_down_retry_count) &&
+ ha->port_down_retry_count > 3)
+ ha->login_retry_count = ha->port_down_retry_count;
+ else if (ha->port_down_retry_count > (int)ha->login_retry_count)
+ ha->login_retry_count = ha->port_down_retry_count;
+ if (ql2xloginretrycount)
+ ha->login_retry_count = ql2xloginretrycount;
+
+ if (rval) {
+ DEBUG2_3(printk(KERN_WARNING
+ "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
+ }
+ return (rval);
+}
+
+static int
+qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
+{
+ int rval;
+ uint16_t cnt;
+ uint16_t *risc_code;
+ unsigned long risc_address;
+ unsigned long risc_code_size;
+ int num;
+ int i;
+ uint16_t *req_ring;
+ struct qla_fw_info *fw_iter;
+
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ if (ql2xfwloadbin)
+ return qla24xx_load_risc_hotplug(ha, srisc_addr);
+ else
+ return qla24xx_load_risc_flash(ha, srisc_addr);
+ }
+
+ rval = QLA_SUCCESS;
+
+ /* Load firmware sequences */
+ fw_iter = ha->brd_info->fw_info;
+ *srisc_addr = *ha->brd_info->fw_info->fwstart;
+ while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
+ risc_code = fw_iter->fwcode;
+ risc_code_size = *fw_iter->fwlen;
+
+ if (fw_iter->addressing == FW_INFO_ADDR_NORMAL) {
+ risc_address = *fw_iter->fwstart;
+ } else {
+ /* Extended address */
+ risc_address = *fw_iter->lfwstart;
+ }
+
+ num = 0;
+ rval = 0;
+ while (risc_code_size > 0 && !rval) {
+ cnt = (uint16_t)(ha->fw_transfer_size >> 1);
+ if (cnt > risc_code_size)
+ cnt = risc_code_size;
+
+ DEBUG7(printk("scsi(%ld): Loading risc segment@ "
+ "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
+ ha->host_no, risc_code, cnt, risc_address));
+
+ req_ring = (uint16_t *)ha->request_ring;
+ for (i = 0; i < cnt; i++)
+ req_ring[i] = cpu_to_le16(risc_code[i]);
+
+ if (fw_iter->addressing == FW_INFO_ADDR_NORMAL) {
+ rval = qla2x00_load_ram(ha, ha->request_dma,
+ risc_address, cnt);
+ } else {
+ rval = qla2x00_load_ram_ext(ha,
+ ha->request_dma, risc_address, cnt);
+ }
+ if (rval) {
+ DEBUG(printk("scsi(%ld): [ERROR] Failed to "
+ "load segment %d of firmware\n",
+ ha->host_no, num));
+ qla_printk(KERN_WARNING, ha,
+ "[ERROR] Failed to load segment %d of "
+ "firmware\n", num);
+
+ qla2x00_dump_regs(ha);
+ break;
+ }
+
+ risc_code += cnt;
+ risc_address += cnt;
+ risc_code_size -= cnt;
+ num++;
+ }
+
+ /* Next firmware sequence */
+ fw_iter++;
+ }
+
+ return (rval);
+}
+
+/* NOTE: ISP24XX
+ *
+ * Firmware image is written to flash via the .bin file which is in big-endian
+ * format.
+ */
+
+static int
+qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
+{
+ int rval;
+ int segments, fragment;
+ uint32_t faddr;
+ uint32_t *dcode, dlen;
+ uint32_t risc_addr;
+ uint32_t risc_size;
+ uint32_t i;
+
+ rval = QLA_SUCCESS;
+
+ segments = FA_RISC_CODE_SEGMENTS;
+ faddr = FA_RISC_CODE_ADDR;
+ dcode = (uint32_t *)ha->request_ring;
+ *srisc_addr = 0;
+
+ /* Validate firmware image by checking version. */
+ qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
+ for (i = 0; i < 4; i++)
+ dcode[i] = be32_to_cpu(dcode[i]);
+ if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
+ dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
+ (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
+ dcode[3] == 0)) {
+ qla_printk(KERN_WARNING, ha,
+ "Unable to verify integrity of flash firmware image!\n");
+ qla_printk(KERN_WARNING, ha,
+ "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
+ dcode[1], dcode[2], dcode[3]);
+
+ return QLA_FUNCTION_FAILED;
+ }
+
+ while (segments && rval == QLA_SUCCESS) {
+ /* Read segment's load information. */
+ qla24xx_read_flash_data(ha, dcode, faddr, 4);
+
+ risc_addr = be32_to_cpu(dcode[2]);
+ *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
+ risc_size = be32_to_cpu(dcode[3]);
+
+ fragment = 0;
+ while (risc_size > 0 && rval == QLA_SUCCESS) {
+ dlen = (uint32_t)(ha->fw_transfer_size >> 2);
+ if (dlen > risc_size)
+ dlen = risc_size;
+
+ DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
+ "addr %x, number of dwords 0x%x, offset 0x%x.\n",
+ ha->host_no, risc_addr, dlen, faddr));
+
+ qla24xx_read_flash_data(ha, dcode, faddr, dlen);
+ for (i = 0; i < dlen; i++)
+ dcode[i] = swab32(dcode[i]);
+
+ rval = qla2x00_load_ram_ext(ha, ha->request_dma,
+ risc_addr, dlen);
+ if (rval) {
+ DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
+ "segment %d of firmware\n", ha->host_no,
+ fragment));
+ qla_printk(KERN_WARNING, ha,
+ "[ERROR] Failed to load segment %d of "
+ "firmware\n", fragment);
+ break;
+ }
+
+ faddr += dlen;
+ risc_addr += dlen;
+ risc_size -= dlen;
+ fragment++;
+ }
+
+ /* Next segment. */
+ segments--;
+ }
+
+ return rval;
+}
+
+static int
+qla24xx_load_risc_hotplug(scsi_qla_host_t *ha, uint32_t *srisc_addr)
+{
+ int rval;
+ int segments, fragment;
+ uint32_t *dcode, dlen;
+ uint32_t risc_addr;
+ uint32_t risc_size;
+ uint32_t i;
+ const struct firmware *fw_entry;
+ uint32_t *fwcode, fwclen;
+
+ if (request_firmware(&fw_entry, ha->brd_info->fw_fname,
+ &ha->pdev->dev)) {
+ qla_printk(KERN_ERR, ha,
+ "Firmware image file not available: '%s'\n",
+ ha->brd_info->fw_fname);
+ return QLA_FUNCTION_FAILED;
+ }
+
+ rval = QLA_SUCCESS;
+
+ segments = FA_RISC_CODE_SEGMENTS;
+ dcode = (uint32_t *)ha->request_ring;
+ *srisc_addr = 0;
+ fwcode = (uint32_t *)fw_entry->data;
+ fwclen = 0;
+
+ /* Validate firmware image by checking version. */
+ if (fw_entry->size < 8 * sizeof(uint32_t)) {
+ qla_printk(KERN_WARNING, ha,
+ "Unable to verify integrity of flash firmware image "
+ "(%Zd)!\n", fw_entry->size);
+ goto fail_fw_integrity;
+ }
+ for (i = 0; i < 4; i++)
+ dcode[i] = be32_to_cpu(fwcode[i + 4]);
+ if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
+ dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
+ (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
+ dcode[3] == 0)) {
+ qla_printk(KERN_WARNING, ha,
+ "Unable to verify integrity of flash firmware image!\n");
+ qla_printk(KERN_WARNING, ha,
+ "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
+ dcode[1], dcode[2], dcode[3]);
+ goto fail_fw_integrity;
+ }
+
+ while (segments && rval == QLA_SUCCESS) {
+ risc_addr = be32_to_cpu(fwcode[2]);
+ *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
+ risc_size = be32_to_cpu(fwcode[3]);
+
+ /* Validate firmware image size. */
+ fwclen += risc_size * sizeof(uint32_t);
+ if (fw_entry->size < fwclen) {
+ qla_printk(KERN_WARNING, ha,
+ "Unable to verify integrity of flash firmware image "
+ "(%Zd)!\n", fw_entry->size);
+ goto fail_fw_integrity;
+ }
+
+ fragment = 0;
+ while (risc_size > 0 && rval == QLA_SUCCESS) {
+ dlen = (uint32_t)(ha->fw_transfer_size >> 2);
+ if (dlen > risc_size)
+ dlen = risc_size;
+
+ DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
+ "addr %x, number of dwords 0x%x.\n", ha->host_no,
+ risc_addr, dlen));
+
+ for (i = 0; i < dlen; i++)
+ dcode[i] = swab32(fwcode[i]);
+
+ rval = qla2x00_load_ram_ext(ha, ha->request_dma,
+ risc_addr, dlen);
+ if (rval) {
+ DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
+ "segment %d of firmware\n", ha->host_no,
+ fragment));
+ qla_printk(KERN_WARNING, ha,
+ "[ERROR] Failed to load segment %d of "
+ "firmware\n", fragment);
+ break;
+ }
+
+ fwcode += dlen;
+ risc_addr += dlen;
+ risc_size -= dlen;
+ fragment++;
+ }
+
+ /* Next segment. */
+ segments--;
+ }
+
+ release_firmware(fw_entry);
+ return rval;
+
+fail_fw_integrity:
+
+ release_firmware(fw_entry);
+ return QLA_FUNCTION_FAILED;
+
+}
+
+static void
+qla24xx_update_fw_options(scsi_qla_host_t *ha)
+{
+ int rval;
+
+ /* Update Serial Link options. */
+ if ((ha->fw_seriallink_options24[0] & BIT_0) == 0)
+ return;
+
+ rval = qla2x00_set_serdes_params(ha, ha->fw_seriallink_options24[1],
+ ha->fw_seriallink_options24[2], ha->fw_seriallink_options24[3]);
+ if (rval != QLA_SUCCESS) {
+ qla_printk(KERN_WARNING, ha,
+ "Unable to update Serial Link options (%x).\n", rval);
+ }
+}
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
--- a/drivers/scsi/qla2xxx/qla_inline.h
+++ b/drivers/scsi/qla2xxx/qla_inline.h
@@ -288,6 +288,27 @@ qla2x00_delete_timer_from_cmd(srb_t *sp)
}
}
+static inline uint8_t *host_to_fcp_swap(uint8_t *, uint32_t);
+
+/**
+ * host_to_fcp_swap() -
+ * @fcp:
+ * @bsize:
+ *
+ * Returns
+ */
+static inline uint8_t *
+host_to_fcp_swap(uint8_t *fcp, uint32_t bsize)
+{
+ uint32_t *ifcp = (uint32_t *) fcp;
+ uint32_t *ofcp = (uint32_t *) fcp;
+ uint32_t iter = bsize >> 2;
+
+ for (; iter ; iter--)
+ *ofcp++ = swab32(*ifcp++);
+
+ return (fcp);
+}
static inline int qla2x00_is_reserved_id(scsi_qla_host_t *, uint16_t);
static inline int
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -83,6 +83,11 @@ static void qla2x00_free_device(scsi_qla
static void qla2x00_config_dma_addressing(scsi_qla_host_t *ha);
+int ql2xfwloadbin;
+module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
+MODULE_PARM_DESC(ql2xfwloadbin,
+ "");
+
/*
* SCSI host template entry points
*/
@@ -180,24 +185,61 @@ void qla2x00_sp_compl(scsi_qla_host_t *h
static char *
qla2x00_get_pci_info_str(struct scsi_qla_host *ha, char *str)
{
- static char *pci_bus_modes[] = {
- "33", "66", "100", "133",
- };
- uint16_t pci_bus;
+ static char *pci_bus_modes[] = { "33", "66", "100", "133", };
+ uint32_t pci_bus;
+ int pcie_reg;
+
+ pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
+ if (pcie_reg) {
+ char lwstr[6];
+ uint16_t pcie_lstat, lspeed, lwidth;
+
+ pcie_reg += 0x12;
+ pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
+ lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
+ lwidth = (pcie_lstat &
+ (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
+
+ strcpy(str, "PCIe (");
+ if (lspeed == 1)
+ strcat(str, "2.5Gb/s ");
+ else
+ strcat(str, "<unknown> ");
+ snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
+ strcat(str, lwstr);
+
+ return str;
+ }
strcpy(str, "PCI");
- pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
- if (pci_bus) {
- strcat(str, "-X (");
- strcat(str, pci_bus_modes[pci_bus]);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
+ if (pci_bus == 0 || pci_bus == 8) {
+ strcat(str, " (");
+ strcat(str, pci_bus_modes[pci_bus >> 3]);
+ } else {
+ strcat(str, "-X ");
+ if (pci_bus & BIT_2)
+ strcat(str, "Mode 2");
+ else
+ strcat(str, "Mode 1");
+ strcat(str, " (");
+ strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
+ }
} else {
- pci_bus = (ha->pci_attr & BIT_8) >> 8;
- strcat(str, " (");
- strcat(str, pci_bus_modes[pci_bus]);
+ pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
+ if (pci_bus) {
+ strcat(str, "-X (");
+ strcat(str, pci_bus_modes[pci_bus]);
+ } else {
+ pci_bus = (ha->pci_attr & BIT_8) >> 8;
+ strcat(str, " (");
+ strcat(str, pci_bus_modes[pci_bus]);
+ }
}
strcat(str, " MHz)");
- return (str);
+ return str;
}
char *
@@ -209,9 +251,21 @@ qla2x00_get_fw_version_str(struct scsi_q
ha->fw_minor_version,
ha->fw_subminor_version);
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ if (ha->fw_attributes & BIT_0)
+ strcat(str, "[Class 2] ");
+ if (ha->fw_attributes & BIT_1)
+ strcat(str, "[IP] ");
+ if (ha->fw_attributes & BIT_2)
+ strcat(str, "[Multi-ID] ");
+ if (ha->fw_attributes & BIT_13)
+ strcat(str, "[Experimental] ");
+ return str;
+ }
+
if (ha->fw_attributes & BIT_9) {
strcat(str, "FLX");
- return (str);
+ return str;
}
switch (ha->fw_attributes & 0xFF) {
@@ -235,7 +289,7 @@ qla2x00_get_fw_version_str(struct scsi_q
if (ha->fw_attributes & 0x100)
strcat(str, "X");
- return (str);
+ return str;
}
/**************************************************************************
@@ -294,7 +348,7 @@ qla2x00_queuecommand(struct scsi_cmnd *c
CMD_SP(cmd) = (void *)sp;
cmd->scsi_done = done;
- rval = qla2x00_start_scsi(sp);
+ rval = ha->start_scsi(sp);
if (rval != QLA_SUCCESS)
goto qc_host_busy_free_sp;
@@ -385,8 +439,8 @@ qla2x00_eh_wait_on_command(scsi_qla_host
static int
qla2x00_wait_for_hba_online(scsi_qla_host_t *ha)
{
- int return_status;
- unsigned long wait_online;
+ int return_status;
+ unsigned long wait_online;
wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
while (((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) ||
@@ -629,7 +683,9 @@ qla2xxx_eh_device_reset(struct scsi_cmnd
#if defined(LOGOUT_AFTER_DEVICE_RESET)
if (ret == SUCCESS) {
if (fcport->flags & FC_FABRIC_DEVICE) {
- qla2x00_fabric_logout(ha, fcport->loop_id);
+ qla2x00_fabric_logout(ha, fcport->loop_id,
+ fcport->d_id.b.domain, fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
qla2x00_mark_device_lost(ha, fcport);
}
}
@@ -1108,6 +1164,7 @@ int qla2x00_probe_one(struct pci_dev *pd
{
int ret = -ENODEV;
device_reg_t __iomem *reg;
+ struct device_reg_24xx __iomem *reg24;
struct Scsi_Host *host;
scsi_qla_host_t *ha;
unsigned long flags = 0;
@@ -1142,18 +1199,17 @@ int qla2x00_probe_one(struct pci_dev *pd
if (ret)
goto probe_failed;
- /* Sanitize the information from PCI BIOS. */
- host->irq = pdev->irq;
-
qla_printk(KERN_INFO, ha,
"Found an %s, irq %d, iobase 0x%p\n", ha->brd_info->isp_name,
- host->irq, ha->iobase);
+ pdev->irq, ha->iobase);
spin_lock_init(&ha->hardware_lock);
ha->prev_topology = 0;
ha->ports = MAX_BUSES;
+ ha->init_cb_size = sizeof(init_cb_t);
+ ha->start_scsi = qla2x00_start_scsi;
if (IS_QLA2100(ha)) {
host->max_id = MAX_TARGETS_2100;
ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
@@ -1167,12 +1223,20 @@ int qla2x00_probe_one(struct pci_dev *pd
ha->request_q_length = REQUEST_ENTRY_CNT_2200;
ha->response_q_length = RESPONSE_ENTRY_CNT_2100;
ha->last_loop_id = SNS_LAST_LOOP_ID_2100;
- } else /*if (IS_QLA2300(ha))*/ {
+ } else if (IS_QLA23XX(ha)) {
host->max_id = MAX_TARGETS_2200;
ha->mbx_count = MAILBOX_REGISTER_COUNT;
ha->request_q_length = REQUEST_ENTRY_CNT_2200;
ha->response_q_length = RESPONSE_ENTRY_CNT_2300;
ha->last_loop_id = SNS_LAST_LOOP_ID_2300;
+ } else if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ host->max_id = MAX_TARGETS_2200;
+ ha->mbx_count = MAILBOX_REGISTER_COUNT;
+ ha->request_q_length = REQUEST_ENTRY_CNT_24XX;
+ ha->response_q_length = RESPONSE_ENTRY_CNT_2300;
+ ha->last_loop_id = SNS_LAST_LOOP_ID_2300;
+ ha->init_cb_size = sizeof(struct init_cb_24xx);
+ ha->start_scsi = qla24xx_start_scsi;
}
host->can_queue = ha->request_q_length + 128;
@@ -1243,18 +1307,23 @@ int qla2x00_probe_one(struct pci_dev *pd
host->max_lun = MAX_LUNS;
host->transportt = qla2xxx_transport_template;
+ /* Register ISR. */
if (IS_QLA2100(ha) || IS_QLA2200(ha))
- ret = request_irq(host->irq, qla2100_intr_handler,
+ ret = request_irq(pdev->irq, qla2100_intr_handler,
+ SA_INTERRUPT|SA_SHIRQ, ha->brd_info->drv_name, ha);
+ else if (IS_QLA23XX(ha))
+ ret = request_irq(pdev->irq, qla2300_intr_handler,
SA_INTERRUPT|SA_SHIRQ, ha->brd_info->drv_name, ha);
else
- ret = request_irq(host->irq, qla2300_intr_handler,
+ ret = request_irq(pdev->irq, qla24xx_intr_handler,
SA_INTERRUPT|SA_SHIRQ, ha->brd_info->drv_name, ha);
- if (ret) {
+ if (ret != 0) {
qla_printk(KERN_WARNING, ha,
"Failed to reserve interrupt %d already in use.\n",
- host->irq);
+ pdev->irq);
goto probe_failed;
}
+ host->irq = pdev->irq;
/* Initialized the timer */
qla2x00_start_timer(ha, qla2x00_timer, WATCH_INTERVAL);
@@ -1262,27 +1331,35 @@ int qla2x00_probe_one(struct pci_dev *pd
DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
ha->host_no, ha));
- reg = ha->iobase;
-
/* Disable ISP interrupts. */
qla2x00_disable_intrs(ha);
- /* Ensure mailbox registers are free. */
- spin_lock_irqsave(&ha->hardware_lock, flags);
- WRT_REG_WORD(®->semaphore, 0);
- WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
- WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
-
- /* Enable proper parity */
- if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) {
- if (IS_QLA2300(ha))
- /* SRAM parity */
- WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x1));
- else
- /* SRAM, Instruction RAM and GP RAM parity */
- WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x7));
+ if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
+ reg24 = (struct device_reg_24xx __iomem *)ha->iobase;
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ WRT_REG_DWORD(®24->hccr, HCCRX_CLR_HOST_INT);
+ WRT_REG_DWORD(®24->hccr, HCCRX_CLR_RISC_INT);
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
+ } else {
+ reg = ha->iobase;
+ spin_lock_irqsave(&ha->hardware_lock, flags);
+ WRT_REG_WORD(®->semaphore, 0);
+ WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
+ WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
+
+ /* Enable proper parity */
+ if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) {
+ if (IS_QLA2300(ha))
+ /* SRAM parity */
+ WRT_REG_WORD(®->hccr,
+ (HCCR_ENABLE_PARITY + 0x1));
+ else
+ /* SRAM, Instruction RAM and GP RAM parity */
+ WRT_REG_WORD(®->hccr,
+ (HCCR_ENABLE_PARITY + 0x7));
+ }
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
}
- spin_unlock_irqrestore(&ha->hardware_lock, flags);
/* Enable chip interrupts. */
qla2x00_enable_intrs(ha);
@@ -1321,7 +1398,7 @@ int qla2x00_probe_one(struct pci_dev *pd
" %s: %s @ %s hdma%c, host#=%ld, fw=%s\n", qla2x00_version_str,
ha->model_number, ha->model_desc ? ha->model_desc: "",
ha->brd_info->isp_name, qla2x00_get_pci_info_str(ha, pci_info),
- pci_name(ha->pdev), ha->flags.enable_64bit_addressing ? '+': '-',
+ pci_name(pdev), ha->flags.enable_64bit_addressing ? '+': '-',
ha->host_no, qla2x00_get_fw_version_str(ha, fw_str));
/* Go with fc_rport registration. */
@@ -1606,7 +1683,7 @@ qla2x00_mem_alloc(scsi_qla_host_t *ha)
continue;
}
- memset(ha->init_cb, 0, sizeof(init_cb_t));
+ memset(ha->init_cb, 0, ha->init_cb_size);
/* Get consistent memory allocated for Get Port Database cmd */
ha->iodesc_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
@@ -1818,10 +1895,15 @@ qla2x00_mem_free(scsi_qla_host_t *ha)
if (ha->fw_dump)
free_pages((unsigned long)ha->fw_dump, ha->fw_dump_order);
+ if (ha->fw_dump24)
+ vfree(ha->fw_dump24);
+
if (ha->fw_dump_buffer)
vfree(ha->fw_dump_buffer);
ha->fw_dump = NULL;
+ ha->fw_dump24 = NULL;
+ ha->fw_dumped = 0;
ha->fw_dump_reading = 0;
ha->fw_dump_buffer = NULL;
}
@@ -1983,7 +2065,10 @@ qla2x00_do_dpc(void *data)
FCF_TAPE_PRESENT)
qla2x00_fabric_logout(
ha,
- fcport->loop_id);
+ fcport->loop_id,
+ fcport->d_id.b.domain,
+ fcport->d_id.b.area,
+ fcport->d_id.b.al_pa);
status = qla2x00_fabric_login(
ha, fcport, &next_loopid);
} else
@@ -2194,7 +2279,7 @@ qla2x00_timer(scsi_qla_host_t *ha)
atomic_set(&fcport->state, FCS_DEVICE_DEAD);
DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
- "%d remainning\n",
+ "%d remaining\n",
ha->host_no,
t, atomic_read(&fcport->port_down_timer)));
}
@@ -2257,7 +2342,7 @@ qla2x00_timer(scsi_qla_host_t *ha)
set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
}
}
- DEBUG3(printk("scsi(%ld): Loop Down - seconds remainning %d\n",
+ DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
ha->host_no,
atomic_read(&ha->loop_down_timer)));
}
@@ -2294,12 +2379,66 @@ qla2x00_down_timeout(struct semaphore *s
return -ETIMEDOUT;
}
+static struct qla_board_info qla_board_tbl[] = {
+ {
+ .drv_name = "qla2400",
+ .isp_name = "ISP2422",
+ .fw_fname = "ql2400_fw.bin",
+ },
+ {
+ .drv_name = "qla2400",
+ .isp_name = "ISP2432",
+ .fw_fname = "ql2400_fw.bin",
+ },
+};
+
+static struct pci_device_id qla2xxx_pci_tbl[] = {
+ {
+ .vendor = PCI_VENDOR_ID_QLOGIC,
+ .device = PCI_DEVICE_ID_QLOGIC_ISP2422,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (unsigned long)&qla_board_tbl[0],
+ },
+ {
+ .vendor = PCI_VENDOR_ID_QLOGIC,
+ .device = PCI_DEVICE_ID_QLOGIC_ISP2432,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (unsigned long)&qla_board_tbl[1],
+ },
+ {0, 0},
+};
+MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
+
+static int __devinit
+qla2xxx_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+ return qla2x00_probe_one(pdev,
+ (struct qla_board_info *)id->driver_data);
+}
+
+static void __devexit
+qla2xxx_remove_one(struct pci_dev *pdev)
+{
+ qla2x00_remove_one(pdev);
+}
+
+static struct pci_driver qla2xxx_pci_driver = {
+ .name = "qla2xxx",
+ .id_table = qla2xxx_pci_tbl,
+ .probe = qla2xxx_probe_one,
+ .remove = __devexit_p(qla2xxx_remove_one),
+};
+
/**
* qla2x00_module_init - Module initialization.
**/
static int __init
qla2x00_module_init(void)
{
+ int ret = 0;
+
/* Allocate cache for SRBs. */
srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
SLAB_HWCACHE_ALIGN, NULL, NULL);
@@ -2320,7 +2459,12 @@ qla2x00_module_init(void)
return -ENODEV;
printk(KERN_INFO "QLogic Fibre Channel HBA Driver\n");
- return 0;
+ ret = pci_module_init(&qla2xxx_pci_driver);
+ if (ret) {
+ kmem_cache_destroy(srb_cachep);
+ fc_release_transport(qla2xxx_transport_template);
+ }
+ return ret;
}
/**
@@ -2329,6 +2473,7 @@ qla2x00_module_init(void)
static void __exit
qla2x00_module_exit(void)
{
+ pci_unregister_driver(&qla2xxx_pci_driver);
kmem_cache_destroy(srb_cachep);
fc_release_transport(qla2xxx_transport_template);
}
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 9/11] qla2xxx: NVRAM id-list updates.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (7 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 5:32 ` [PATCH 10/11] qla2xxx: Code scrubbing Andrew Vasquez
2005-06-14 5:32 ` [PATCH 11/11] qla2xxx: Firmware updates Andrew Vasquez
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
NVRAM id-list updates.
Resync with latest NVRAM subsystem ID list.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_devtbl.h | 46 +++++++++++++++++++++++++++++++++----
1 files changed, 41 insertions(+), 5 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_devtbl.h b/drivers/scsi/qla2xxx/qla_devtbl.h
--- a/drivers/scsi/qla2xxx/qla_devtbl.h
+++ b/drivers/scsi/qla2xxx/qla_devtbl.h
@@ -1,4 +1,4 @@
-#define QLA_MODEL_NAMES 0x32
+#define QLA_MODEL_NAMES 0x44
/*
* Adapter model names.
@@ -53,7 +53,25 @@ static char *qla2x00_model_name[QLA_MODE
" ", /* 0x12e */
"QLA210", /* 0x12f */
"EMC 250", /* 0x130 */
- "HP A7538A" /* 0x131 */
+ "HP A7538A", /* 0x131 */
+ "QLA210", /* 0x132 */
+ "QLA2460", /* 0x133 */
+ "QLA2462", /* 0x134 */
+ "QMC2462", /* 0x135 */
+ "QMC2462S", /* 0x136 */
+ "QLE2460", /* 0x137 */
+ "QLE2462", /* 0x138 */
+ "QME2462", /* 0x139 */
+ "QLA2440", /* 0x13a */
+ "QLA2442", /* 0x13b */
+ "QSM2442", /* 0x13c */
+ "QSM2462", /* 0x13d */
+ "QLE210", /* 0x13e */
+ "QLE220", /* 0x13f */
+ "QLA2460", /* 0x140 */
+ "QLA2462", /* 0x141 */
+ "QLE2460", /* 0x142 */
+ "QLE2462" /* 0x143 */
};
static char *qla2x00_model_desc[QLA_MODEL_NAMES] = {
@@ -78,8 +96,8 @@ static char *qla2x00_model_desc[QLA_MODE
" ", /* 0x112 */
" ", /* 0x113 */
" ", /* 0x114 */
- "133MHz PCI-X to 2Gb FC Single Channel", /* 0x115 */
- "133MHz PCI-X to 2Gb FC Dual Channel", /* 0x116 */
+ "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x115 */
+ "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x116 */
"PCI-Express to 2Gb FC, Single Channel", /* 0x117 */
"PCI-Express to 2Gb FC, Dual Channel", /* 0x118 */
"133MHz PCI-X to 2Gb FC Optical", /* 0x119 */
@@ -106,5 +124,23 @@ static char *qla2x00_model_desc[QLA_MODE
" ", /* 0x12e */
"133MHz PCI-X to 2Gb FC SFF", /* 0x12f */
"133MHz PCI-X to 2Gb FC SFF", /* 0x130 */
- "HP 1p2g QLA2340" /* 0x131 */
+ "HP 1p2g QLA2340", /* 0x131 */
+ "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x132 */
+ "PCI-X 2.0 to 4Gb FC, Single Channel", /* 0x133 */
+ "PCI-X 2.0 to 4Gb FC, Dual Channel", /* 0x134 */
+ "IBM eServer BC 4Gb FC Expansion Card", /* 0x135 */
+ "IBM eServer BC 4Gb FC Expansion Card SFF", /* 0x136 */
+ "PCI-Express to 4Gb FC, Single Channel", /* 0x137 */
+ "PCI-Express to 4Gb FC, Dual Channel", /* 0x138 */
+ "Dell PCI-Express to 4Gb FC, Dual Channel", /* 0x139 */
+ "PCI-X 1.0 to 4Gb FC, Single Channel", /* 0x13a */
+ "PCI-X 1.0 to 4Gb FC, Dual Channel", /* 0x13b */
+ "Server I/O Module 4Gb FC, Single Channel", /* 0x13c */
+ "Server I/O Module 4Gb FC, Single Channel", /* 0x13d */
+ "PCI-Express to 2Gb FC, Single Channel", /* 0x13e */
+ "PCI-Express to 4Gb FC, Single Channel", /* 0x13f */
+ "Sun PCI-X 2.0 to 4Gb FC, Single Channel", /* 0x140 */
+ "Sun PCI-X 2.0 to 4Gb FC, Dual Channel", /* 0x141 */
+ "Sun PCI-Express to 2Gb FC, Single Channel", /* 0x142 */
+ "Sun PCI-Express to 4Gb FC, Single Channel" /* 0x143 */
};
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 10/11] qla2xxx: Code scrubbing.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (8 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 9/11] qla2xxx: NVRAM id-list updates Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
2005-06-14 5:32 ` [PATCH 11/11] qla2xxx: Firmware updates Andrew Vasquez
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Code scrubbing.
Remove trailing whitespace from driver files.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
---
drivers/scsi/qla2xxx/qla_dbg.c | 130 ++++++++++++++++++-----------------
drivers/scsi/qla2xxx/qla_def.h | 42 ++++++-----
drivers/scsi/qla2xxx/qla_gs.c | 6 +-
drivers/scsi/qla2xxx/qla_init.c | 60 ++++++++--------
drivers/scsi/qla2xxx/qla_inline.h | 22 +++---
drivers/scsi/qla2xxx/qla_iocb.c | 4 +
drivers/scsi/qla2xxx/qla_isr.c | 20 +++--
drivers/scsi/qla2xxx/qla_mbx.c | 12 ++-
drivers/scsi/qla2xxx/qla_os.c | 78 +++++++++++----------
drivers/scsi/qla2xxx/qla_rscn.c | 30 ++++----
drivers/scsi/qla2xxx/qla_settings.h | 2 -
drivers/scsi/qla2xxx/qla_sup.c | 4 +
drivers/scsi/qla2xxx/qla_version.h | 2 -
13 files changed, 206 insertions(+), 206 deletions(-)
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -74,7 +74,7 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int
fw->hccr = RD_REG_WORD(®->hccr);
/* Pause RISC. */
- WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
+ WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
if (IS_QLA2300(ha)) {
for (cnt = 30000;
(RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0 &&
@@ -91,85 +91,85 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int
if (rval == QLA_SUCCESS) {
dmp_reg = (uint16_t __iomem *)(reg + 0);
- for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10);
- for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2; cnt++)
fw->risc_host_reg[cnt] = RD_REG_WORD(dmp_reg++);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x40);
- for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
fw->mailbox_reg[cnt] = RD_REG_WORD(dmp_reg++);
WRT_REG_WORD(®->ctrl_status, 0x40);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->resp_dma_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->resp_dma_reg) / 2; cnt++)
fw->resp_dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
WRT_REG_WORD(®->ctrl_status, 0x50);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
WRT_REG_WORD(®->ctrl_status, 0x00);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0);
- for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2000);
+ WRT_REG_WORD(®->pcr, 0x2000);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2200);
+ WRT_REG_WORD(®->pcr, 0x2200);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2400);
+ WRT_REG_WORD(®->pcr, 0x2400);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2600);
+ WRT_REG_WORD(®->pcr, 0x2600);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2800);
+ WRT_REG_WORD(®->pcr, 0x2800);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2A00);
+ WRT_REG_WORD(®->pcr, 0x2A00);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2C00);
+ WRT_REG_WORD(®->pcr, 0x2C00);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2E00);
+ WRT_REG_WORD(®->pcr, 0x2E00);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x10);
+ WRT_REG_WORD(®->ctrl_status, 0x10);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x20);
+ WRT_REG_WORD(®->ctrl_status, 0x20);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x30);
+ WRT_REG_WORD(®->ctrl_status, 0x30);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++);
/* Reset RISC. */
@@ -622,7 +622,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int
fw->hccr = RD_REG_WORD(®->hccr);
/* Pause RISC. */
- WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
+ WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
for (cnt = 30000; (RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0 &&
rval == QLA_SUCCESS; cnt--) {
if (cnt)
@@ -632,7 +632,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int
}
if (rval == QLA_SUCCESS) {
dmp_reg = (uint16_t __iomem *)(reg + 0);
- for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
fw->pbiu_reg[cnt] = RD_REG_WORD(dmp_reg++);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x10);
@@ -644,67 +644,67 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int
}
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x20);
- for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
fw->dma_reg[cnt] = RD_REG_WORD(dmp_reg++);
WRT_REG_WORD(®->ctrl_status, 0x00);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0xA0);
- for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
fw->risc_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2000);
+ WRT_REG_WORD(®->pcr, 0x2000);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp0_reg) / 2; cnt++)
fw->risc_gp0_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2100);
+ WRT_REG_WORD(®->pcr, 0x2100);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp1_reg) / 2; cnt++)
fw->risc_gp1_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2200);
+ WRT_REG_WORD(®->pcr, 0x2200);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp2_reg) / 2; cnt++)
fw->risc_gp2_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2300);
+ WRT_REG_WORD(®->pcr, 0x2300);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp3_reg) / 2; cnt++)
fw->risc_gp3_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2400);
+ WRT_REG_WORD(®->pcr, 0x2400);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp4_reg) / 2; cnt++)
fw->risc_gp4_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2500);
+ WRT_REG_WORD(®->pcr, 0x2500);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp5_reg) / 2; cnt++)
fw->risc_gp5_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2600);
+ WRT_REG_WORD(®->pcr, 0x2600);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp6_reg) / 2; cnt++)
fw->risc_gp6_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->pcr, 0x2700);
+ WRT_REG_WORD(®->pcr, 0x2700);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->risc_gp7_reg) / 2; cnt++)
fw->risc_gp7_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x10);
+ WRT_REG_WORD(®->ctrl_status, 0x10);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->frame_buf_hdw_reg) / 2; cnt++)
fw->frame_buf_hdw_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x20);
+ WRT_REG_WORD(®->ctrl_status, 0x20);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->fpm_b0_reg) / 2; cnt++)
fw->fpm_b0_reg[cnt] = RD_REG_WORD(dmp_reg++);
- WRT_REG_WORD(®->ctrl_status, 0x30);
+ WRT_REG_WORD(®->ctrl_status, 0x30);
dmp_reg = (uint16_t __iomem *)((uint8_t __iomem *)reg + 0x80);
- for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
+ for (cnt = 0; cnt < sizeof(fw->fpm_b1_reg) / 2; cnt++)
fw->fpm_b1_reg[cnt] = RD_REG_WORD(dmp_reg++);
/* Reset the ISP. */
@@ -723,7 +723,7 @@ qla2100_fw_dump(scsi_qla_host_t *ha, int
if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) &&
(RD_REG_WORD(®->mctr) & (BIT_1 | BIT_0)) != 0))) {
- WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
+ WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
for (cnt = 30000;
(RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0 &&
rval == QLA_SUCCESS; cnt--) {
@@ -964,7 +964,7 @@ qla_uprintf(char **uiter, char *fmt, ...
int iter, len;
char buf[128];
va_list args;
-
+
va_start(args, fmt);
len = vsprintf(buf, fmt, args);
va_end(args);
@@ -2160,8 +2160,8 @@ qla24xx_console_fw_dump(scsi_qla_host_t
/* Driver Debug Functions. */
/****************************************************************************/
-void
-qla2x00_dump_regs(scsi_qla_host_t *ha)
+void
+qla2x00_dump_regs(scsi_qla_host_t *ha)
{
device_reg_t __iomem *reg = ha->iobase;
@@ -2182,7 +2182,7 @@ qla2x00_dump_regs(scsi_qla_host_t *ha)
void
-qla2x00_dump_buffer(uint8_t * b, uint32_t size)
+qla2x00_dump_buffer(uint8_t * b, uint32_t size)
{
uint32_t cnt;
uint8_t c;
@@ -2208,11 +2208,11 @@ qla2x00_dump_buffer(uint8_t * b, uint32_
/**************************************************************************
* qla2x00_print_scsi_cmd
* Dumps out info about the scsi cmd and srb.
- * Input
+ * Input
* cmd : struct scsi_cmnd
**************************************************************************/
void
-qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd)
+qla2x00_print_scsi_cmd(struct scsi_cmnd * cmd)
{
int i;
struct scsi_qla_host *ha;
@@ -2235,7 +2235,7 @@ qla2x00_print_scsi_cmd(struct scsi_cmnd
cmd->request_buffer, cmd->request_bufflen);
printk(" tag=%d, transfersize=0x%x\n",
cmd->tag, cmd->transfersize);
- printk(" serial_number=%lx, SP=%p\n", cmd->serial_number, sp);
+ printk(" serial_number=%lx, SP=%p\n", cmd->serial_number, sp);
printk(" data direction=%d\n", cmd->sc_data_direction);
if (!sp)
@@ -2272,8 +2272,8 @@ qla2x00_dump_pkt(void *pkt)
* count = number of words.
*/
void
-qla2x00_formatted_dump_buffer(char *string, uint8_t * buffer,
- uint8_t wd_size, uint32_t count)
+qla2x00_formatted_dump_buffer(char *string, uint8_t * buffer,
+ uint8_t wd_size, uint32_t count)
{
uint32_t cnt;
uint16_t *buf16;
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -153,7 +153,7 @@
#include "qla_settings.h"
-/*
+/*
* Data bit definitions
*/
#define BIT_0 0x1
@@ -231,8 +231,8 @@
#define MAX_TARGETS MAX_FIBRE_DEVICES
#define MIN_LUNS 8
#define MAX_LUNS MAX_FIBRE_LUNS
-#define MAX_CMDS_PER_LUN 255
-
+#define MAX_CMDS_PER_LUN 255
+
/*
* Fibre Channel device definitions.
*/
@@ -280,7 +280,7 @@
#define RESPONSE_ENTRY_CNT_2300 512 /* Number of response entries.*/
/*
- * SCSI Request Block
+ * SCSI Request Block
*/
typedef struct srb {
struct list_head list;
@@ -291,7 +291,7 @@ typedef struct srb {
struct scsi_cmnd *cmd; /* Linux SCSI command pkt */
struct timer_list timer; /* Command timer */
- atomic_t ref_count; /* Reference count for this structure */
+ atomic_t ref_count; /* Reference count for this structure */
uint16_t flags;
/* Request state */
@@ -349,7 +349,7 @@ typedef volatile struct {
volatile uint16_t flash_data; /* Flash BIOS data */
uint16_t unused_1[1]; /* Gap */
volatile uint16_t ctrl_status; /* Control/Status */
-#define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */
+#define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */
#define CSR_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */
#define CSR_ISP_SOFT_RESET BIT_0 /* ISP soft reset */
@@ -392,12 +392,12 @@ typedef volatile struct {
volatile uint16_t rsp_q_out; /* Out-Pointer */
/* RISC to Host Status */
- volatile uint32_t host_status;
+ volatile uint32_t host_status;
#define HSR_RISC_INT BIT_15 /* RISC interrupt */
#define HSR_RISC_PAUSED BIT_8 /* RISC Paused */
/* Host to Host Semaphore */
- volatile uint16_t host_semaphore;
+ volatile uint16_t host_semaphore;
uint16_t unused_3[17]; /* Gap */
volatile uint16_t mailbox0;
volatile uint16_t mailbox1;
@@ -1087,7 +1087,7 @@ typedef struct {
* LSB BIT 5 = Rx Sensitivity 1G bit 1
* LSB BIT 6 = Rx Sensitivity 1G bit 2
* LSB BIT 7 = Rx Sensitivity 1G bit 3
- *
+ *
* MSB BIT 0 = Tx Sensitivity 2G bit 0
* MSB BIT 1 = Tx Sensitivity 2G bit 1
* MSB BIT 2 = Tx Sensitivity 2G bit 2
@@ -1105,7 +1105,7 @@ typedef struct {
* LSB BIT 5 = Output Swing 2G bit 0
* LSB BIT 6 = Output Swing 2G bit 1
* LSB BIT 7 = Output Swing 2G bit 2
- *
+ *
* MSB BIT 0 = Output Emphasis 2G bit 0
* MSB BIT 1 = Output Emphasis 2G bit 1
* MSB BIT 2 = Output Enable
@@ -2028,7 +2028,7 @@ struct qla_board_info {
struct gid_list_info {
uint8_t al_pa;
uint8_t area;
- uint8_t domain;
+ uint8_t domain;
uint8_t loop_id_2100; /* ISP2100/ISP2200 -- 4 bytes. */
uint16_t loop_id; /* ISP23XX -- 6 bytes. */
uint16_t reserved_1; /* ISP24XX -- 8 bytes. */
@@ -2101,7 +2101,7 @@ typedef struct scsi_qla_host {
#define ISP_ABORT_RETRY 20 /* ISP aborted. */
#define FCPORT_RESCAN_NEEDED 21 /* IO descriptor processing needed */
#define IODESC_PROCESS_NEEDED 22 /* IO descriptor processing needed */
-#define IOCTL_ERROR_RECOVERY 23
+#define IOCTL_ERROR_RECOVERY 23
#define LOOP_RESET_NEEDED 24
#define BEACON_BLINK_NEEDED 25
@@ -2116,7 +2116,7 @@ typedef struct scsi_qla_host {
#define SRB_MIN_REQ 128
mempool_t *srb_mempool;
- /* This spinlock is used to protect "io transactions", you must
+ /* This spinlock is used to protect "io transactions", you must
* aquire it before doing any IO to the card, eg with RD_REG*() and
* WRT_REG*() for the duration of your entire commandtransaction.
*
@@ -2143,14 +2143,14 @@ typedef struct scsi_qla_host {
response_t *response_ring_ptr; /* Current address. */
uint16_t rsp_ring_index; /* Current index. */
uint16_t response_q_length;
-
+
int (*start_scsi)(srb_t *);
uint16_t (*calc_request_entries)(uint16_t);
void (*build_scsi_iocbs)(srb_t *, cmd_entry_t *, uint16_t);
/* Outstandings ISP commands. */
srb_t *outstanding_cmds[MAX_OUTSTANDING_COMMANDS];
- uint32_t current_outstanding_cmd;
+ uint32_t current_outstanding_cmd;
srb_t *status_srb; /* Status continuation entry. */
uint16_t revision;
@@ -2179,7 +2179,7 @@ typedef struct scsi_qla_host {
#define LOOP_P2P 2
#define P2P_LOOP 3
- uint8_t marker_needed;
+ uint8_t marker_needed;
uint8_t interrupts_on;
@@ -2200,7 +2200,7 @@ typedef struct scsi_qla_host {
uint8_t mbx_count;
uint16_t last_loop_id;
- uint32_t login_retry_count;
+ uint32_t login_retry_count;
/* Fibre Channel Device List. */
struct list_head fcports;
@@ -2244,7 +2244,7 @@ typedef struct scsi_qla_host {
dma_addr_t rlc_rsp_dma;
rpt_lun_cmd_rsp_t *rlc_rsp;
- /* Small DMA pool allocations -- maximum 256 bytes in length. */
+ /* Small DMA pool allocations -- maximum 256 bytes in length. */
#define DMA_POOL_SIZE 256
struct dma_pool *s_dma_pool;
@@ -2272,10 +2272,10 @@ typedef struct scsi_qla_host {
uint32_t mbx_flags;
#define MBX_IN_PROGRESS BIT_0
#define MBX_BUSY BIT_1 /* Got the Access */
-#define MBX_SLEEPING_ON_SEM BIT_2
+#define MBX_SLEEPING_ON_SEM BIT_2
#define MBX_POLLING_FOR_COMP BIT_3
#define MBX_COMPLETED BIT_4
-#define MBX_TIMEDOUT BIT_5
+#define MBX_TIMEDOUT BIT_5
#define MBX_ACCESS_TIMEDOUT BIT_6
mbx_cmd_t mc;
@@ -2337,7 +2337,7 @@ typedef struct scsi_qla_host {
test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
test_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) || \
atomic_read(&ha->loop_state) == LOOP_DOWN)
-
+
#define LOOP_RDY(ha) (!LOOP_NOT_READY(ha))
#define TGT_Q(ha, t) (ha->otgt[t])
diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c
--- a/drivers/scsi/qla2xxx/qla_gs.c
+++ b/drivers/scsi/qla2xxx/qla_gs.c
@@ -331,7 +331,7 @@ qla2x00_gid_pt(scsi_qla_host_t *ha, sw_i
* single call. Return a failed status, and let GA_NXT handle
* the overload.
*/
- if (i == MAX_FIBRE_DEVICES)
+ if (i == MAX_FIBRE_DEVICES)
rval = QLA_FUNCTION_FAILED;
}
@@ -672,7 +672,7 @@ qla2x00_rsnn_nn(scsi_qla_host_t *ha)
/* Prepare CT arguments -- node_name, symbolic node_name, size */
memcpy(ct_req->req.rsnn_nn.node_name, ha->node_name, WWN_SIZE);
-
+
/* Prepare the Symbolic Node Name */
/* Board type */
snn = ct_req->req.rsnn_nn.sym_node_name;
@@ -877,7 +877,7 @@ qla2x00_sns_gid_pt(scsi_qla_host_t *ha,
* single call. Return a failed status, and let GA_NXT handle
* the overload.
*/
- if (i == MAX_FIBRE_DEVICES)
+ if (i == MAX_FIBRE_DEVICES)
rval = QLA_FUNCTION_FAILED;
}
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -133,10 +133,10 @@ qla2x00_initialize_adapter(scsi_qla_host
(rval = qla2x00_init_rings(ha)) == QLA_SUCCESS) {
check_fw_ready_again:
/*
- * Wait for a successful LIP up to a maximum
+ * Wait for a successful LIP up to a maximum
* of (in seconds): RISC login timeout value,
* RISC retry count value, and port down retry
- * value OR a minimum of 4 seconds OR If no
+ * value OR a minimum of 4 seconds OR If no
* cable, only 5 seconds.
*/
rval = qla2x00_fw_ready(ha);
@@ -215,7 +215,7 @@ qla2x00_pci_config(scsi_qla_host_t *ha)
qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
- /*
+ /*
* Turn on PCI master; for system BIOSes that don't turn it on by
* default.
*/
@@ -366,7 +366,7 @@ qla2x00_isp_firmware(scsi_qla_host_t *ha
int rval;
/* Assume loading risc code */
- rval = QLA_FUNCTION_FAILED;
+ rval = QLA_FUNCTION_FAILED;
if (ha->flags.disable_risc_code_load) {
DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
@@ -394,7 +394,7 @@ qla2x00_isp_firmware(scsi_qla_host_t *ha
* Returns 0 on success.
*/
static void
-qla2x00_reset_chip(scsi_qla_host_t *ha)
+qla2x00_reset_chip(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
device_reg_t __iomem *reg = ha->iobase;
@@ -712,7 +712,7 @@ qla2x00_chip_diag(scsi_qla_host_t *ha)
for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
udelay(5);
data = RD_MAILBOX_REG(ha, reg, 0);
- barrier();
+ barrier();
}
} else
udelay(10);
@@ -962,7 +962,7 @@ qla2x00_update_fw_options(scsi_qla_host_
emphasis = (ha->fw_seriallink_options[2] &
(BIT_4 | BIT_3)) >> 3;
tx_sens = ha->fw_seriallink_options[0] &
- (BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ (BIT_3 | BIT_2 | BIT_1 | BIT_0);
rx_sens = (ha->fw_seriallink_options[0] &
(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->fw_options[10] = (emphasis << 14) | (swing << 8);
@@ -980,7 +980,7 @@ qla2x00_update_fw_options(scsi_qla_host_
(BIT_7 | BIT_6 | BIT_5)) >> 5;
emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
tx_sens = ha->fw_seriallink_options[1] &
- (BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ (BIT_3 | BIT_2 | BIT_1 | BIT_0);
rx_sens = (ha->fw_seriallink_options[1] &
(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->fw_options[11] = (emphasis << 14) | (swing << 8);
@@ -1127,7 +1127,7 @@ qla2x00_fw_ready(scsi_qla_host_t *ha)
rval = QLA_SUCCESS;
/* 20 seconds for loop down. */
- min_wait = 20;
+ min_wait = 20;
/*
* Firmware should take at most one RATOV to login, plus 5 seconds for
@@ -1173,8 +1173,8 @@ qla2x00_fw_ready(scsi_qla_host_t *ha)
(fw_state >= FSTATE_LOSS_OF_SYNC ||
fw_state == FSTATE_WAIT_AL_PA)) {
/* Loop down. Timeout on min_wait for states
- * other than Wait for Login.
- */
+ * other than Wait for Login.
+ */
if (time_after_eq(jiffies, mtime)) {
qla_printk(KERN_INFO, ha,
"Cable is unplugged...\n");
@@ -1579,7 +1579,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
*
* The driver waits for the link to come up after link down
* before returning I/Os to OS with "DID_NO_CONNECT".
- */
+ */
if (nv->link_down_timeout == 0) {
ha->loop_down_abort_time =
(LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
@@ -1587,7 +1587,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha
ha->link_down_timeout = nv->link_down_timeout;
ha->loop_down_abort_time =
(LOOP_DOWN_TIME - ha->link_down_timeout);
- }
+ }
/*
* Need enough time to try and get the port back.
@@ -1691,7 +1691,7 @@ qla2x00_alloc_fcport(scsi_qla_host_t *ha
* 2 = database was full and device was not configured.
*/
static int
-qla2x00_configure_loop(scsi_qla_host_t *ha)
+qla2x00_configure_loop(scsi_qla_host_t *ha)
{
int rval;
unsigned long flags, save_flags;
@@ -1799,7 +1799,7 @@ qla2x00_configure_loop(scsi_qla_host_t *
* 0 = success.
*/
static int
-qla2x00_configure_local_loop(scsi_qla_host_t *ha)
+qla2x00_configure_local_loop(scsi_qla_host_t *ha)
{
int rval, rval2;
int found_devs;
@@ -1875,7 +1875,7 @@ qla2x00_configure_local_loop(scsi_qla_ho
((struct gid_list_info *)id_iter)->loop_id);
id_iter += 8;
}
-
+
/* Bypass reserved domain fields. */
if ((domain & 0xf0) == 0xf0)
continue;
@@ -1960,16 +1960,16 @@ cleanup_allocation:
}
static void
-qla2x00_probe_for_all_luns(scsi_qla_host_t *ha)
+qla2x00_probe_for_all_luns(scsi_qla_host_t *ha)
{
fc_port_t *fcport;
- qla2x00_mark_all_devices_lost(ha);
+ qla2x00_mark_all_devices_lost(ha);
list_for_each_entry(fcport, &ha->fcports, list) {
if (fcport->port_type != FCT_TARGET)
continue;
- qla2x00_update_fcport(ha, fcport);
+ qla2x00_update_fcport(ha, fcport);
}
}
@@ -2540,7 +2540,7 @@ qla2x00_find_new_loop_id(scsi_qla_host_t
* Kernel context.
*/
static int
-qla2x00_device_resync(scsi_qla_host_t *ha)
+qla2x00_device_resync(scsi_qla_host_t *ha)
{
int rval;
int rval2;
@@ -2803,8 +2803,8 @@ qla2x00_fabric_login(scsi_qla_host_t *ha
* unrecoverable / not handled error
*/
DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
- "loop_id=%x jiffies=%lx.\n",
- __func__, ha->host_no, mb[0],
+ "loop_id=%x jiffies=%lx.\n",
+ __func__, ha->host_no, mb[0],
fcport->d_id.b.domain, fcport->d_id.b.area,
fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
@@ -2867,7 +2867,7 @@ qla2x00_local_device_login(scsi_qla_host
* 0 = success
*/
int
-qla2x00_loop_resync(scsi_qla_host_t *ha)
+qla2x00_loop_resync(scsi_qla_host_t *ha)
{
int rval;
uint32_t wait_time;
@@ -2926,7 +2926,7 @@ qla2x00_rescan_fcports(scsi_qla_host_t *
rescan_done = 1;
}
- qla2x00_probe_for_all_luns(ha);
+ qla2x00_probe_for_all_luns(ha);
}
/*
@@ -2997,7 +2997,7 @@ qla2x00_abort_isp(scsi_qla_host_t *ha)
/* Enable ISP interrupts. */
qla2x00_enable_intrs(ha);
- ha->isp_abort_cnt = 0;
+ ha->isp_abort_cnt = 0;
clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
} else { /* failed the ISP abort */
ha->flags.online = 1;
@@ -3006,7 +3006,7 @@ qla2x00_abort_isp(scsi_qla_host_t *ha)
qla_printk(KERN_WARNING, ha,
"ISP error recovery failed - "
"board disabled\n");
- /*
+ /*
* The next call disables the board
* completely.
*/
@@ -3031,7 +3031,7 @@ qla2x00_abort_isp(scsi_qla_host_t *ha)
status = 1;
}
}
-
+
}
if (status) {
@@ -3088,11 +3088,11 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
}
spin_unlock_irqrestore(&ha->hardware_lock, flags);
-
+
status = qla2x00_setup_chip(ha);
spin_lock_irqsave(&ha->hardware_lock, flags);
-
+
if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha)) {
/* Enable proper parity */
if (IS_QLA2300(ha))
@@ -3137,7 +3137,7 @@ qla2x00_restart_isp(scsi_qla_host_t *ha)
}
/* if no cable then assume it's good */
- if ((ha->device_flags & DFLG_NO_CABLE))
+ if ((ha->device_flags & DFLG_NO_CABLE))
status = 0;
DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
--- a/drivers/scsi/qla2xxx/qla_inline.h
+++ b/drivers/scsi/qla2xxx/qla_inline.h
@@ -30,7 +30,7 @@ static __inline__ uint16_t qla2x00_debou
* register value.
*/
static __inline__ uint16_t
-qla2x00_debounce_register(volatile uint16_t __iomem *addr)
+qla2x00_debounce_register(volatile uint16_t __iomem *addr)
{
volatile uint16_t first;
volatile uint16_t second;
@@ -78,7 +78,7 @@ static __inline__ int qla2x00_normalize_
* ffffabc1ffffeeee (0x100000000 + e_addr)
* ffffabc100000000 (0x100000000 + e_addr) & ~(0xffffffff)
* ffffabc100000000 (ne_addr)
- *
+ *
* Compute length of second DMA segment:
*
* 00000000ffffeeee (e_addr & 0xffffffff)
@@ -114,7 +114,7 @@ qla2x00_normalize_dma_addr(
}
static __inline__ void qla2x00_poll(scsi_qla_host_t *);
-static inline void
+static inline void
qla2x00_poll(scsi_qla_host_t *ha)
{
if (IS_QLA2100(ha) || IS_QLA2200(ha))
@@ -129,7 +129,7 @@ qla2x00_poll(scsi_qla_host_t *ha)
static __inline__ void qla2x00_enable_intrs(scsi_qla_host_t *);
static __inline__ void qla2x00_disable_intrs(scsi_qla_host_t *);
-static inline void
+static inline void
qla2x00_enable_intrs(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
@@ -150,7 +150,7 @@ qla2x00_enable_intrs(scsi_qla_host_t *ha
}
-static inline void
+static inline void
qla2x00_disable_intrs(scsi_qla_host_t *ha)
{
unsigned long flags = 0;
@@ -207,7 +207,7 @@ static __inline__ void qla2x00_check_fab
* This routine will wait for fabric devices for
* the reset delay.
*/
-static __inline__ void qla2x00_check_fabric_devices(scsi_qla_host_t *ha)
+static __inline__ void qla2x00_check_fabric_devices(scsi_qla_host_t *ha)
{
uint16_t fw_state;
@@ -278,7 +278,7 @@ qla2x00_add_timer_to_cmd(srb_t *sp, int
* Returns:
* None.
**************************************************************************/
-static inline void
+static inline void
qla2x00_delete_timer_from_cmd(srb_t *sp)
{
if (sp->timer.function != NULL) {
@@ -291,11 +291,11 @@ qla2x00_delete_timer_from_cmd(srb_t *sp)
static inline uint8_t *host_to_fcp_swap(uint8_t *, uint32_t);
/**
- * host_to_fcp_swap() -
- * @fcp:
- * @bsize:
+ * host_to_fcp_swap() -
+ * @fcp:
+ * @bsize:
*
- * Returns
+ * Returns
*/
static inline uint8_t *
host_to_fcp_swap(uint8_t *fcp, uint32_t bsize)
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c
--- a/drivers/scsi/qla2xxx/qla_iocb.c
+++ b/drivers/scsi/qla2xxx/qla_iocb.c
@@ -468,7 +468,7 @@ queuing_error:
*
* Returns non-zero if a failure occured, else zero.
*/
-int
+int
__qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
uint8_t type)
{
@@ -504,7 +504,7 @@ __qla2x00_marker(scsi_qla_host_t *ha, ui
return (QLA_SUCCESS);
}
-int
+int
qla2x00_marker(scsi_qla_host_t *ha, uint16_t loop_id, uint16_t lun,
uint8_t type)
{
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -245,14 +245,14 @@ qla2x00_mbx_completion(scsi_qla_host_t *
wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
for (cnt = 1; cnt < ha->mbx_count; cnt++) {
- if (IS_QLA2200(ha) && cnt == 8)
+ if (IS_QLA2200(ha) && cnt == 8)
wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha) && (cnt == 4 ||
cnt == 5))
ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
else
ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
-
+
wptr++;
}
@@ -521,7 +521,7 @@ qla2x00_async_event(scsi_qla_host_t *ha,
"Configuration change detected: value=%x.\n", mb[1]);
if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
- atomic_set(&ha->loop_state, LOOP_DOWN);
+ atomic_set(&ha->loop_state, LOOP_DOWN);
if (!atomic_read(&ha->loop_down_timer))
atomic_set(&ha->loop_down_timer,
LOOP_DOWN_TIME);
@@ -853,7 +853,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
qla_printk(KERN_WARNING, ha, "Status Entry invalid handle.\n");
set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
- if (ha->dpc_wait && !ha->dpc_active)
+ if (ha->dpc_wait && !ha->dpc_active)
up(ha->dpc_wait);
return;
@@ -976,7 +976,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
}
/*
- * Check to see if SCSI Status is non zero. If so report SCSI
+ * Check to see if SCSI Status is non zero. If so report SCSI
* Status.
*/
if (lscsi_status != 0) {
@@ -998,7 +998,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
sp->request_sense_length = sense_len;
sp->request_sense_ptr = cp->sense_buffer;
- if (sp->request_sense_length > 32)
+ if (sp->request_sense_length > 32)
sense_len = 32;
memcpy(cp->sense_buffer, sense_data, sense_len);
@@ -1103,7 +1103,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
break;
case CS_ABORTED:
- /*
+ /*
* hv2.19.12 - DID_ABORT does not retry the request if we
* aborted this request then abort otherwise it must be a
* reset.
@@ -1144,7 +1144,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha
/* SCSI Mid-Layer handles device queue full */
- cp->result = DID_OK << 16 | lscsi_status;
+ cp->result = DID_OK << 16 | lscsi_status;
break;
@@ -1185,7 +1185,7 @@ qla2x00_status_cont_entry(scsi_qla_host_
"sp=%p sp->state:%d\n", __func__, sp, sp->state));
qla_printk(KERN_INFO, ha,
"cmd is NULL: already returned to OS (sp=%p)\n",
- sp);
+ sp);
ha->status_srb = NULL;
return;
@@ -1230,7 +1230,7 @@ qla2x00_error_entry(scsi_qla_host_t *ha,
else if (pkt->entry_status & RF_INV_E_COUNT)
qla_printk(KERN_ERR, ha, "%s: Invalid Entry Count\n", __func__);
else if (pkt->entry_status & RF_INV_E_PARAM)
- qla_printk(KERN_ERR, ha,
+ qla_printk(KERN_ERR, ha,
"%s: Invalid Entry Parameter\n", __func__);
else if (pkt->entry_status & RF_INV_E_TYPE)
qla_printk(KERN_ERR, ha, "%s: Invalid Entry Type\n", __func__);
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -302,7 +302,7 @@ qla2x00_mailbox_command(scsi_qla_host_t
"Mailbox command timeout occured. Scheduling ISP "
"abort.\n");
set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
- if (ha->dpc_wait && !ha->dpc_active)
+ if (ha->dpc_wait && !ha->dpc_active)
up(ha->dpc_wait);
} else if (!abort_active) {
@@ -1774,18 +1774,18 @@ qla2x00_login_fabric(scsi_qla_host_t *ha
/*
* qla2x00_login_local_device
* Issue login loop port mailbox command.
- *
+ *
* Input:
* ha = adapter block pointer.
* loop_id = device loop ID.
* opt = command options.
- *
+ *
* Returns:
* Return status code.
- *
+ *
* Context:
* Kernel context.
- *
+ *
*/
int
qla2x00_login_local_device(scsi_qla_host_t *ha, uint16_t loop_id,
@@ -2094,7 +2094,7 @@ qla2x00_get_resource_cnts(scsi_qla_host_
} else {
DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
"mb7=%x mb10=%x.\n", __func__, ha->host_no,
- mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[6], mcp->mb[7],
+ mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[6], mcp->mb[7],
mcp->mb[10]));
if (cur_xchg_cnt)
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -64,7 +64,7 @@ MODULE_PARM_DESC(ql2xplogiabsentdevice,
int ql2xenablezio = 0;
module_param(ql2xenablezio, int, S_IRUGO|S_IRUSR);
MODULE_PARM_DESC(ql2xenablezio,
- "Option to enable ZIO:If 1 then enable it otherwise"
+ "Option to enable ZIO:If 1 then enable it otherwise"
" use the default set in the NVRAM."
" Default is 0 : disabled");
@@ -89,7 +89,7 @@ MODULE_PARM_DESC(ql2xfwloadbin,
"");
/*
- * SCSI host template entry points
+ * SCSI host template entry points
*/
static int qla2xxx_slave_configure(struct scsi_device * device);
static int qla2xxx_slave_alloc(struct scsi_device *);
@@ -246,7 +246,7 @@ char *
qla2x00_get_fw_version_str(struct scsi_qla_host *ha, char *str)
{
char un_str[10];
-
+
sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
ha->fw_minor_version,
ha->fw_subminor_version);
@@ -421,14 +421,14 @@ qla2x00_eh_wait_on_command(scsi_qla_host
/*
* qla2x00_wait_for_hba_online
- * Wait till the HBA is online after going through
+ * Wait till the HBA is online after going through
* <= MAX_RETRIES_OF_ISP_ABORT or
* finally HBA is disabled ie marked offline
*
* Input:
* ha - pointer to host adapter structure
- *
- * Note:
+ *
+ * Note:
* Does context switching-Release SPIN_LOCK
* (if any) before calling this routine.
*
@@ -436,13 +436,13 @@ qla2x00_eh_wait_on_command(scsi_qla_host
* Success (Adapter is online) : 0
* Failed (Adapter is offline/disabled) : 1
*/
-static int
+static int
qla2x00_wait_for_hba_online(scsi_qla_host_t *ha)
{
int return_status;
unsigned long wait_online;
- wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
+ wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
while (((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) ||
test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags) ||
test_bit(ISP_ABORT_RETRY, &ha->dpc_flags) ||
@@ -450,8 +450,8 @@ qla2x00_wait_for_hba_online(scsi_qla_hos
msleep(1000);
}
- if (ha->flags.online)
- return_status = QLA_SUCCESS;
+ if (ha->flags.online)
+ return_status = QLA_SUCCESS;
else
return_status = QLA_FUNCTION_FAILED;
@@ -463,27 +463,27 @@ qla2x00_wait_for_hba_online(scsi_qla_hos
/*
* qla2x00_wait_for_loop_ready
* Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
- * to be in LOOP_READY state.
+ * to be in LOOP_READY state.
* Input:
* ha - pointer to host adapter structure
- *
- * Note:
+ *
+ * Note:
* Does context switching-Release SPIN_LOCK
* (if any) before calling this routine.
- *
+ *
*
* Return:
* Success (LOOP_READY) : 0
* Failed (LOOP_NOT_READY) : 1
*/
-static inline int
+static inline int
qla2x00_wait_for_loop_ready(scsi_qla_host_t *ha)
{
int return_status = QLA_SUCCESS;
unsigned long loop_timeout ;
/* wait for 5 min at the max for loop to be ready */
- loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
+ loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
while ((!atomic_read(&ha->loop_down_timer) &&
atomic_read(&ha->loop_state) == LOOP_DOWN) ||
@@ -494,7 +494,7 @@ qla2x00_wait_for_loop_ready(scsi_qla_hos
break;
}
}
- return (return_status);
+ return (return_status);
}
/**************************************************************************
@@ -564,7 +564,7 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd)
if (ret == SUCCESS) {
spin_unlock(&ha->hardware_lock);
if (qla2x00_eh_wait_on_command(ha, cmd) != QLA_SUCCESS) {
- qla_printk(KERN_ERR, ha,
+ qla_printk(KERN_ERR, ha,
"scsi(%ld:%d:%d): Abort handler timed out -- %lx "
"%x.\n", ha->host_no, id, lun, serial, ret);
}
@@ -572,7 +572,7 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd)
}
spin_lock_irq(ha->host->host_lock);
- qla_printk(KERN_INFO, ha,
+ qla_printk(KERN_INFO, ha,
"scsi(%ld:%d:%d): Abort command issued -- %lx %x.\n", ha->host_no,
id, lun, serial, ret);
@@ -587,7 +587,7 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd)
*
* Input:
* ha - pointer to scsi_qla_host structure.
-* t - target
+* t - target
* Returns:
* Either SUCCESS or FAILED.
*
@@ -635,7 +635,7 @@ qla2x00_eh_wait_for_pending_target_comma
* executing commands.
*
* NOTE: The use of SP is undefined within this context. Do *NOT*
-* attempt to use this value, even if you determine it is
+* attempt to use this value, even if you determine it is
* non-null.
*
* Input:
@@ -717,7 +717,7 @@ qla2xxx_eh_device_reset(struct scsi_cmnd
"commands\n", __func__, ha->host_no));
qla_printk(KERN_INFO, ha,
"%s: failed while waiting for commands\n",
- __func__);
+ __func__);
goto eh_dev_reset_done;
}
@@ -890,7 +890,7 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *
/*
* Fixme-may be dpc thread is active and processing
- * loop_resync,so wait a while for it to
+ * loop_resync,so wait a while for it to
* be completed and then issue big hammer.Otherwise
* it may cause I/O failure as big hammer marks the
* devices as lost kicking of the port_down_timer
@@ -905,7 +905,7 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *
if (qla2x00_wait_for_hba_online(ha) != QLA_SUCCESS)
goto eh_host_reset_lock;
- }
+ }
clear_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags);
/* Waiting for our command in done_queue to be returned to OS.*/
@@ -953,7 +953,7 @@ qla2x00_loop_reset(scsi_qla_host_t *ha)
}
if (status == QLA_SUCCESS &&
- ((!ha->flags.enable_target_reset &&
+ ((!ha->flags.enable_target_reset &&
!ha->flags.enable_lip_reset) ||
ha->flags.enable_lip_full_login)) {
@@ -1074,7 +1074,7 @@ qla2x00_config_dma_addressing(scsi_qla_h
if (pci_set_consistent_dma_mask(ha->pdev,
DMA_64BIT_MASK)) {
- qla_printk(KERN_DEBUG, ha,
+ qla_printk(KERN_DEBUG, ha,
"Failed to set 64 bit PCI consistent mask; "
"using 32 bit.\n");
pci_set_consistent_dma_mask(ha->pdev,
@@ -1507,7 +1507,7 @@ void qla2x00_mark_device_lost(scsi_qla_h
{
if (atomic_read(&fcport->state) == FCS_ONLINE && fcport->rport)
schedule_work(&fcport->block_work);
- /*
+ /*
* We may need to retry the login, so don't change the state of the
* port but do the retries.
*/
@@ -1552,7 +1552,7 @@ void qla2x00_mark_device_lost(scsi_qla_h
* Context:
*/
void
-qla2x00_mark_all_devices_lost(scsi_qla_host_t *ha)
+qla2x00_mark_all_devices_lost(scsi_qla_host_t *ha)
{
fc_port_t *fcport;
@@ -1918,11 +1918,11 @@ qla2x00_mem_free(scsi_qla_host_t *ha)
*
* Context:
* Kernel context.
- *
+ *
* Note: Sets the ref_count for non Null sp to one.
*/
static int
-qla2x00_allocate_sp_pool(scsi_qla_host_t *ha)
+qla2x00_allocate_sp_pool(scsi_qla_host_t *ha)
{
int rval;
@@ -1938,10 +1938,10 @@ qla2x00_allocate_sp_pool(scsi_qla_host_t
/*
* This routine frees all adapter allocated memory.
- *
+ *
*/
static void
-qla2x00_free_sp_pool( scsi_qla_host_t *ha)
+qla2x00_free_sp_pool( scsi_qla_host_t *ha)
{
if (ha->srb_mempool) {
mempool_destroy(ha->srb_mempool);
@@ -2081,7 +2081,7 @@ qla2x00_do_dpc(void *data)
DEBUG(printk("scsi(%ld): port login OK: logged in ID 0x%x\n",
ha->host_no, fcport->loop_id));
-
+
fcport->port_login_retry_count =
ha->port_down_retry_count * PORT_RETRY_TIME;
atomic_set(&fcport->state, FCS_ONLINE);
@@ -2112,7 +2112,7 @@ qla2x00_do_dpc(void *data)
clear_bit(LOGIN_RETRY_NEEDED, &ha->dpc_flags);
DEBUG(printk("scsi(%ld): qla2x00_login_retry()\n",
ha->host_no));
-
+
set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
DEBUG(printk("scsi(%ld): qla2x00_login_retry - end\n",
@@ -2173,7 +2173,7 @@ qla2x00_do_dpc(void *data)
* ha = adapter block pointer.
*/
static void
-qla2x00_rst_aen(scsi_qla_host_t *ha)
+qla2x00_rst_aen(scsi_qla_host_t *ha)
{
if (ha->flags.online && !ha->flags.reset_active &&
!atomic_read(&ha->loop_down_timer) &&
@@ -2263,7 +2263,7 @@ qla2x00_timer(scsi_qla_host_t *ha)
*
* Whenever, a port is in the LOST state we start decrementing its port
* down timer every second until it reaches zero. Once it reaches zero
- * the port it marked DEAD.
+ * the port it marked DEAD.
*/
t = 0;
list_for_each_entry(fcport, &ha->fcports, list) {
@@ -2275,9 +2275,9 @@ qla2x00_timer(scsi_qla_host_t *ha)
if (atomic_read(&fcport->port_down_timer) == 0)
continue;
- if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
+ if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
atomic_set(&fcport->state, FCS_DEVICE_DEAD);
-
+
DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
"%d remaining\n",
ha->host_no,
@@ -2299,7 +2299,7 @@ qla2x00_timer(scsi_qla_host_t *ha)
ha->host_no));
if (!IS_QLA2100(ha) && ha->link_down_timeout)
- atomic_set(&ha->loop_state, LOOP_DEAD);
+ atomic_set(&ha->loop_state, LOOP_DEAD);
/* Schedule an ISP abort to return any tape commands. */
spin_lock_irqsave(&ha->hardware_lock, cpu_flags);
diff --git a/drivers/scsi/qla2xxx/qla_rscn.c b/drivers/scsi/qla2xxx/qla_rscn.c
--- a/drivers/scsi/qla2xxx/qla_rscn.c
+++ b/drivers/scsi/qla2xxx/qla_rscn.c
@@ -82,7 +82,7 @@ static int qla2x00_send_login_iocb(scsi_
static int qla2x00_send_login_iocb_cb(scsi_qla_host_t *, struct io_descriptor *,
struct mbx_entry *);
-/**
+/**
* Mailbox IOCB callback array.
**/
static int (*iocb_function_cb_list[LAST_IOCB_CB])
@@ -95,7 +95,7 @@ static int (*iocb_function_cb_list[LAST_
};
-/**
+/**
* Generic IO descriptor handle routines.
**/
@@ -169,7 +169,7 @@ qla2x00_handle_to_iodesc(scsi_qla_host_t
}
-/**
+/**
* IO descriptor allocation routines.
**/
@@ -248,7 +248,7 @@ qla2x00_init_io_descriptors(scsi_qla_hos
}
-/**
+/**
* IO descriptor timer routines.
**/
@@ -299,7 +299,7 @@ qla2x00_add_iodesc_timer(struct io_descr
add_timer(&iodesc->timer);
}
-/**
+/**
* IO descriptor support routines.
**/
@@ -333,7 +333,7 @@ qla2x00_update_login_fcport(scsi_qla_hos
}
-/**
+/**
* Mailbox IOCB commands.
**/
@@ -383,7 +383,7 @@ qla2x00_get_mbx_iocb_entry(scsi_qla_host
* Returns QLA_SUCCESS if the IOCB was issued.
*/
static int
-qla2x00_send_abort_iocb(scsi_qla_host_t *ha, struct io_descriptor *iodesc,
+qla2x00_send_abort_iocb(scsi_qla_host_t *ha, struct io_descriptor *iodesc,
uint32_t handle_to_abort, int ha_locked)
{
unsigned long flags = 0;
@@ -720,7 +720,7 @@ qla2x00_send_login_iocb_cb(scsi_qla_host
/* Only process the last command. */
if (remote_fcport->iodesc_idx_sent != iodesc->idx) {
DEBUG14(printk("scsi(%ld): Login IOCB -- ignoring, sent to "
- "[%02x%02x%02x], expected %x, received %x.\n",
+ "[%02x%02x%02x], expected %x, received %x.\n",
ha->host_no, iodesc->d_id.b.domain, iodesc->d_id.b.area,
iodesc->d_id.b.al_pa, remote_fcport->iodesc_idx_sent,
iodesc->idx));
@@ -754,9 +754,9 @@ qla2x00_send_login_iocb_cb(scsi_qla_host
DEBUG14(printk("scsi(%ld): Login IOCB -- status=%x mb1=%x pn="
"%02x%02x%02x%02x%02x%02x%02x%02x.\n", ha->host_no, status,
- mb[1], mbxstat->port_name[0], mbxstat->port_name[1],
- mbxstat->port_name[2], mbxstat->port_name[3],
- mbxstat->port_name[4], mbxstat->port_name[5],
+ mb[1], mbxstat->port_name[0], mbxstat->port_name[1],
+ mbxstat->port_name[2], mbxstat->port_name[3],
+ mbxstat->port_name[4], mbxstat->port_name[5],
mbxstat->port_name[6], mbxstat->port_name[7]));
memcpy(remote_fcport->node_name, mbxstat->node_name, WWN_SIZE);
@@ -1052,7 +1052,7 @@ qla2x00_send_login_iocb_cb(scsi_qla_host
}
-/**
+/**
* IO descriptor processing routines.
**/
@@ -1136,7 +1136,7 @@ qla2x00_handle_port_rscn(scsi_qla_host_t
remote_fcport = rscn_fcport;
}
- /*
+ /*
* If the port is already in our fcport list and online, send an ADISC
* to see if it's still alive. Issue login if a new fcport or the known
* fcport is currently offline.
@@ -1191,7 +1191,7 @@ qla2x00_handle_port_rscn(scsi_qla_host_t
}
return (QLA_SUCCESS);
}
-
+
/* Send ADISC if the fcport is online */
if (atomic_read(&remote_fcport->state) == FCS_ONLINE ||
remote_fcport->iodesc_idx_sent == IODESC_ADISC_NEEDED) {
@@ -1229,7 +1229,7 @@ qla2x00_handle_port_rscn(scsi_qla_host_t
* abort.
*/
uint32_t handle_to_abort;
-
+
iodesc = &ha->io_descriptors[
remote_fcport->iodesc_idx_sent];
qla2x00_remove_iodesc_timer(iodesc);
diff --git a/drivers/scsi/qla2xxx/qla_settings.h b/drivers/scsi/qla2xxx/qla_settings.h
--- a/drivers/scsi/qla2xxx/qla_settings.h
+++ b/drivers/scsi/qla2xxx/qla_settings.h
@@ -36,7 +36,7 @@
#define QLA_CMD_TIMER_DELTA 3
-/*
+/*
* When a lun is suspended for the "Not Ready" condition then it will suspend
* the lun for increments of 6 sec delays. SUSPEND_COUNT is that count.
*/
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -31,7 +31,7 @@ static void qla2x00_nv_write(scsi_qla_ho
*/
/**
- * qla2x00_lock_nvram_access() -
+ * qla2x00_lock_nvram_access() -
* @ha: HA context
*/
void
@@ -64,7 +64,7 @@ qla2x00_lock_nvram_access(scsi_qla_host_
}
/**
- * qla2x00_unlock_nvram_access() -
+ * qla2x00_unlock_nvram_access() -
* @ha: HA context
*/
void
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -17,7 +17,7 @@
*
******************************************************************************/
/*
- * Driver version
+ * Driver version
*/
#define QLA2XXX_VERSION "8.00.02b5-k"
------------
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 11/11] qla2xxx: Firmware updates.
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
` (9 preceding siblings ...)
2005-06-14 5:32 ` [PATCH 10/11] qla2xxx: Code scrubbing Andrew Vasquez
@ 2005-06-14 5:32 ` Andrew Vasquez
10 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-14 5:32 UTC (permalink / raw)
To: James Bottomley, Linux-SCSI Mailing List; +Cc: Andrew Vasquez
Firmware updates.
Resync with latest 21xx firmware -- 1.19.25.
Resync with latest 22xx firmware -- 2.02.08.
Resync with latest 23xx/63xx firmware -- 3.03.15.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
This patch is too large for an inline patch, please download the
bzip'd patch from:
ftp://ftp.qlogic.com/outgoing/linux/patches/8.x/8.01.00b4k/0011-Firmware-updates.diff.bz2
--
Andrew Vasquez
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/11] qla2xxx: Add ISP24xx definitions.
2005-06-14 5:31 ` [PATCH 1/11] qla2xxx: Add ISP24xx definitions Andrew Vasquez
@ 2005-06-14 21:50 ` Christoph Hellwig
2005-06-21 18:23 ` Andrew Vasquez
0 siblings, 1 reply; 18+ messages in thread
From: Christoph Hellwig @ 2005-06-14 21:50 UTC (permalink / raw)
To: Andrew Vasquez; +Cc: James Bottomley, Linux-SCSI Mailing List
> diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
> --- a/drivers/scsi/qla2xxx/qla_def.h
> +++ b/drivers/scsi/qla2xxx/qla_def.h
> @@ -62,6 +62,22 @@
> #define PCI_DEVICE_ID_QLOGIC_ISP6322 0x6322
> #endif
>
> +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2422
> +#define PCI_DEVICE_ID_QLOGIC_ISP2422 0x2422
> +#endif
> +
> +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2432
> +#define PCI_DEVICE_ID_QLOGIC_ISP2432 0x2432
> +#endif
> +
> +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2512
> +#define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512
> +#endif
> +
> +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2522
> +#define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522
> +#endif
It's only an historic accident that the older ids are in here, care
to remove all and move them to pci_ids.h instead?
> + int (*start_scsi)(srb_t *);
umm, that's most of ->queuecommand, isn't it? Shouldn't you define
a separate scsi_host_template for 24xx/25xx?
> +//ISP24xx
please try to avoid C++-style comments
> + volatile uint16_t mailbox0;
> + volatile uint16_t mailbox1;
> + volatile uint16_t mailbox2;
never use volatile, always use proper kernel primitives to access
hardware or atomic_t for atomic in-kernel variables.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines.
2005-06-14 5:31 ` [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines Andrew Vasquez
@ 2005-06-14 21:50 ` Christoph Hellwig
0 siblings, 0 replies; 18+ messages in thread
From: Christoph Hellwig @ 2005-06-14 21:50 UTC (permalink / raw)
To: Andrew Vasquez; +Cc: James Bottomley, Linux-SCSI Mailing List
> @@ -47,6 +55,9 @@ qla2x00_prep_ms_iocb(scsi_qla_host_t *ha
> {
> ms_iocb_entry_t *ms_pkt;
>
> + if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
> + return qla24xx_prep_ms_iocb(ha, req_size, rsp_size);
> +
this is horrible style. Please move the guts of the code of this
function to qla2x00_old_prep_ms_iocb and make qla2x00_prep_ms_iocb
a wrapper. Or given that you things like this in lots of places
add a proper method table and just call ->prep_ms_iocb on it.
> ms_pkt = ha->ms_iocb;
> memset(ms_pkt, 0, sizeof(ms_iocb_entry_t));
>
> @@ -72,6 +83,42 @@ qla2x00_prep_ms_iocb(scsi_qla_host_t *ha
> }
>
> /**
> + * qla24xx_prep_ms_iocb() - Prepare common CT IOCB fields for SNS CT query.
> + * @ha: HA context
> + * @req_size: request size in bytes
> + * @rsp_size: response size in bytes
> + *
> + * Returns a pointer to the @ha's ms_iocb.
> + */
> +static inline void *
> +qla24xx_prep_ms_iocb(scsi_qla_host_t *ha, uint32_t req_size, uint32_t rsp_size)
also please try to avoid defining functions below their usage. it makes
reading the code a lot harder.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support.
2005-06-14 5:31 ` [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support Andrew Vasquez
@ 2005-06-14 21:50 ` Christoph Hellwig
0 siblings, 0 replies; 18+ messages in thread
From: Christoph Hellwig @ 2005-06-14 21:50 UTC (permalink / raw)
To: Andrew Vasquez; +Cc: James Bottomley, Linux-SCSI Mailing List
> +//ISP24xx
C++ comments again.
> /* Load mailbox registers. */
> - optr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 0);
> + if (IS_QLA24XX(ha) || IS_QLA25XX(ha)) {
> + reg24 = (struct device_reg_24xx __iomem *)ha->iobase;
> + optr = (uint16_t __iomem *)®24->mailbox0;
> + } else {
> + reg = ha->iobase;
> + optr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 0);
> + }
Looking over the patches you have things like this a lot, and it's ugly
as hell. There must be a nicer way to get all this sorted out.
As a start make the ha->iobase and union of the both different register
laouts, dito for the reg variable in all the functions, then make sure
MAILBOX_REG & co work for the 24xx and 25xx aswell.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines.
2005-06-14 5:32 ` [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines Andrew Vasquez
@ 2005-06-14 21:50 ` Christoph Hellwig
0 siblings, 0 replies; 18+ messages in thread
From: Christoph Hellwig @ 2005-06-14 21:50 UTC (permalink / raw)
To: Andrew Vasquez; +Cc: James Bottomley, Linux-SCSI Mailing List
> + * @sp: command to send to the ISP
> + *
> + * Returns non-zero if a failure occured, else zero.
> + */
> +int
> +qla24xx_start_scsi(srb_t *sp)
It'd rather see 24xx having it's own ->queuecommand then adding another
dispatch layer slightly below it. Put the code before and after _start_scsi
into nice helpers so it's shared.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx.
2005-06-14 5:32 ` [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx Andrew Vasquez
@ 2005-06-14 21:50 ` Christoph Hellwig
0 siblings, 0 replies; 18+ messages in thread
From: Christoph Hellwig @ 2005-06-14 21:50 UTC (permalink / raw)
To: Andrew Vasquez; +Cc: James Bottomley, Linux-SCSI Mailing List
On Mon, Jun 13, 2005 at 10:32:17PM -0700, Andrew Vasquez wrote:
> Final glue-code for ISP24xx.
>
> Add appropriate glue-code for ISP24xx support within
> OS and initialization sections of driver.
So why is 24xx and 25xx support directly in the main module while
all others aren't?
And while we're at it, it would be really nice if you could add support
for hotplug firmware loading for older chips aswell.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/11] qla2xxx: Add ISP24xx definitions.
2005-06-14 21:50 ` Christoph Hellwig
@ 2005-06-21 18:23 ` Andrew Vasquez
0 siblings, 0 replies; 18+ messages in thread
From: Andrew Vasquez @ 2005-06-21 18:23 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: James Bottomley, Linux-SCSI Mailing List
On Tue, 14 Jun 2005, Christoph Hellwig wrote:
> > +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2512
> > +#define PCI_DEVICE_ID_QLOGIC_ISP2512 0x2512
> > +#endif
> > +
> > +#ifndef PCI_DEVICE_ID_QLOGIC_ISP2522
> > +#define PCI_DEVICE_ID_QLOGIC_ISP2522 0x2522
> > +#endif
>
> It's only an historic accident that the older ids are in here, care
> to remove all and move them to pci_ids.h instead?
>
> > + int (*start_scsi)(srb_t *);
>
> umm, that's most of ->queuecommand, isn't it? Shouldn't you define
> a separate scsi_host_template for 24xx/25xx?
>
> > +//ISP24xx
>
> please try to avoid C++-style comments
>
> > + volatile uint16_t mailbox0;
> > + volatile uint16_t mailbox1;
> > + volatile uint16_t mailbox2;
>
> never use volatile, always use proper kernel primitives to access
> hardware or atomic_t for atomic in-kernel variables.
No problem. I'll have another patchset which hopefully addresses the
concerns and with a bit of additional testing in the next week or so.
Thanks,
Andrew
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2005-06-21 18:23 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2005-06-14 5:31 [PATCH 0/11] qla2xxx: Add ISP24xx support Andrew Vasquez
2005-06-14 5:31 ` [PATCH 1/11] qla2xxx: Add ISP24xx definitions Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-21 18:23 ` Andrew Vasquez
2005-06-14 5:31 ` [PATCH 2/11] qla2xxx: Add ISP24xx diagnostic routines Andrew Vasquez
2005-06-14 5:31 ` [PATCH 3/11] qla2xxx: Generalize SNS generic-services routines Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:31 ` [PATCH 4/11] qla2xxx: Add MBX command routines for ISP24xx support Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 5/11] qla2xxx: Add ISP24xx flash-manipulation routines Andrew Vasquez
2005-06-14 5:32 ` [PATCH 6/11] qla2xxx: Add ISP24xx IOCB manipulation routines Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 7/11] qla2xxx: ISP24xx ISR routines Andrew Vasquez
2005-06-14 5:32 ` [PATCH 8/11] qla2xxx: Final glue-code for ISP24xx Andrew Vasquez
2005-06-14 21:50 ` Christoph Hellwig
2005-06-14 5:32 ` [PATCH 9/11] qla2xxx: NVRAM id-list updates Andrew Vasquez
2005-06-14 5:32 ` [PATCH 10/11] qla2xxx: Code scrubbing Andrew Vasquez
2005-06-14 5:32 ` [PATCH 11/11] qla2xxx: Firmware updates Andrew Vasquez
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