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* [PATCH 7/11]  lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family
@ 2005-11-28 16:42 James.Smart
  2005-11-28 16:51 ` Christoph Hellwig
  0 siblings, 1 reply; 5+ messages in thread
From: James.Smart @ 2005-11-28 16:42 UTC (permalink / raw)
  To: linux-scsi; +Cc: James.Smart


Add support for more members of the Light Pulse 11xxx (4Gb) family


Signed-off-by: James Smart <James.Smart@emulex.com>


diff -upNr a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h
--- a/drivers/scsi/lpfc/lpfc_hw.h	2005-11-28 10:36:16.000000000 -0500
+++ b/drivers/scsi/lpfc/lpfc_hw.h	2005-11-28 10:51:01.000000000 -0500
@@ -1027,23 +1027,32 @@ typedef struct {
 /* Start FireFly Register definitions */
 #define PCI_VENDOR_ID_EMULEX        0x10df
 #define PCI_DEVICE_ID_FIREFLY       0x1ae5
-#define PCI_DEVICE_ID_SUPERFLY      0xf700
-#define PCI_DEVICE_ID_DRAGONFLY     0xf800
 #define PCI_DEVICE_ID_RFLY          0xf095
 #define PCI_DEVICE_ID_PFLY          0xf098
+#define PCI_DEVICE_ID_LP101         0xf0a1
 #define PCI_DEVICE_ID_TFLY          0xf0a5
+#define PCI_DEVICE_ID_BSMB          0xf0d1
+#define PCI_DEVICE_ID_BMID          0xf0d5
+#define PCI_DEVICE_ID_ZSMB          0xf0e1
+#define PCI_DEVICE_ID_ZMID          0xf0e5
+#define PCI_DEVICE_ID_NEPTUNE       0xf0f5
+#define PCI_DEVICE_ID_NEPTUNE_SCSP  0xf0f6
+#define PCI_DEVICE_ID_NEPTUNE_DCSP  0xf0f7
+#define PCI_DEVICE_ID_SUPERFLY      0xf700
+#define PCI_DEVICE_ID_DRAGONFLY     0xf800
 #define PCI_DEVICE_ID_CENTAUR       0xf900
 #define PCI_DEVICE_ID_PEGASUS       0xf980
 #define PCI_DEVICE_ID_THOR          0xfa00
 #define PCI_DEVICE_ID_VIPER         0xfb00
+#define PCI_DEVICE_ID_LP10000S      0xfc00
+#define PCI_DEVICE_ID_LP11000S      0xfc10
+#define PCI_DEVICE_ID_LPE11000S     0xfc20
 #define PCI_DEVICE_ID_HELIOS        0xfd00
-#define PCI_DEVICE_ID_BMID          0xf0d5
-#define PCI_DEVICE_ID_BSMB          0xf0d1
+#define PCI_DEVICE_ID_HELIOS_SCSP   0xfd11
+#define PCI_DEVICE_ID_HELIOS_DCSP   0xfd12
 #define PCI_DEVICE_ID_ZEPHYR        0xfe00
-#define PCI_DEVICE_ID_ZMID          0xf0e5
-#define PCI_DEVICE_ID_ZSMB          0xf0e1
-#define PCI_DEVICE_ID_LP101	    0xf0a1
-#define PCI_DEVICE_ID_LP10000S	    0xfc00
+#define PCI_DEVICE_ID_ZEPHYR_SCSP   0xfe11
+#define PCI_DEVICE_ID_ZEPHYR_DCSP   0xfe12
 
 #define JEDEC_ID_ADDRESS            0x0080001c
 #define FIREFLY_JEDEC_ID            0x1ACC
diff -upNr a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
--- a/drivers/scsi/lpfc/lpfc_init.c	2005-11-28 10:36:16.000000000 -0500
+++ b/drivers/scsi/lpfc/lpfc_init.c	2005-11-28 10:51:01.000000000 -0500
@@ -759,15 +759,15 @@ static void
 lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
 {
 	lpfc_vpd_t *vp;
-	uint32_t id;
+	uint16_t dev_id;
 	uint8_t hdrtype;
 	char str[16];
 
 	vp = &phba->vpd;
-	pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
+	pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id);
 	pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
 
-	switch ((id >> 16) & 0xffff) {
+	switch (dev_id) {
 	case PCI_DEVICE_ID_FIREFLY:
 		strcpy(str, "LP6000 1");
 		break;
@@ -816,6 +816,24 @@ lpfc_get_hba_model_desc(struct lpfc_hba 
 		else
 			strcpy(str, "LP11000 4");
 		break;
+	case PCI_DEVICE_ID_HELIOS_SCSP:
+		strcpy(str, "LP11000-SP 4");
+		break;
+	case PCI_DEVICE_ID_HELIOS_DCSP:
+		strcpy(str, "LP11002-SP 4");
+		break;
+	case PCI_DEVICE_ID_NEPTUNE:
+		if (hdrtype == 0x80)
+			strcpy(str, "LPe1002 4");
+		else
+			strcpy(str, "LPe1000 4");
+		break;
+	case PCI_DEVICE_ID_NEPTUNE_SCSP:
+		strcpy(str, "LPe1000-SP 4");
+		break;
+	case PCI_DEVICE_ID_NEPTUNE_DCSP:
+		strcpy(str, "LPe1002-SP 4");
+		break;
 	case PCI_DEVICE_ID_BMID:
 		strcpy(str, "LP1150 4");
 		break;
@@ -828,6 +846,12 @@ lpfc_get_hba_model_desc(struct lpfc_hba 
 		else
 			strcpy(str, "LPe11000 4");
 		break;
+	case PCI_DEVICE_ID_ZEPHYR_SCSP:
+		strcpy(str, "LPe11000-SP 4");
+		break;
+	case PCI_DEVICE_ID_ZEPHYR_DCSP:
+		strcpy(str, "LPe11002-SP 4");
+		break;
 	case PCI_DEVICE_ID_ZMID:
 		strcpy(str, "LPe1150 4");
 		break;
@@ -843,6 +867,18 @@ lpfc_get_hba_model_desc(struct lpfc_hba 
 	default:
 		memset(str, 0, 16);
 		break;
+	case PCI_DEVICE_ID_LP11000S:
+		if (hdrtype == 0x80)
+			strcpy(str, "LP11002-S 4");
+		else
+			strcpy(str, "LP11000-S 4");
+		break;
+	case PCI_DEVICE_ID_LPE11000S:
+		if (hdrtype == 0x80)
+			strcpy(str, "LPe11002-S 4");
+		else
+			strcpy(str, "LPe11000-S 4");
+		break;
 	}
 	if (mdp)
 		sscanf(str, "%s", mdp);
@@ -1673,14 +1709,28 @@ static struct pci_device_id lpfc_id_tabl
 		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
 		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
+		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
 		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
 		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
 		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
 		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
+		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
 		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
@@ -1691,6 +1741,10 @@ static struct pci_device_id lpfc_id_tabl
 		PCI_ANY_ID, PCI_ANY_ID, },
 	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
 		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
+		PCI_ANY_ID, PCI_ANY_ID, },
+	{PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
+		PCI_ANY_ID, PCI_ANY_ID, },
 	{ 0 }
 };
 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 7/11]  lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family
  2005-11-28 16:42 James.Smart
@ 2005-11-28 16:51 ` Christoph Hellwig
  0 siblings, 0 replies; 5+ messages in thread
From: Christoph Hellwig @ 2005-11-28 16:51 UTC (permalink / raw)
  To: James.Smart; +Cc: linux-scsi

On Mon, Nov 28, 2005 at 11:42:12AM -0500, James.Smart@Emulex.Com wrote:
> -	pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
> +	pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id);

please don't read the pci id directly, alway use pdev->device


^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH 7/11]  lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family
@ 2005-11-28 17:08 James.Smart
  2005-11-28 17:49 ` Matthew Wilcox
  0 siblings, 1 reply; 5+ messages in thread
From: James.Smart @ 2005-11-28 17:08 UTC (permalink / raw)
  To: hch; +Cc: linux-scsi

There's a couple of other references that can be removed as well.

Rather than back this out of the patch - we'll submit another short patch
which addresses this comment. Patch is done, just need to quickly test it.

Please note: there will be 2 other areas where we will still be accessing
config space:
  - We need the bar value, as the hardware sees it, to program a base
    address it can decode to keep ring accesses on-chip. The current pci
    infrastructure doesn't provide this. (we've talked about this on this
    reflector before).
  - If we reset the card, there were hardware-isms that may erroneously
    drive perr/serr. So, we need to temporarily turn them off while we
    reset. (I believe we went through this as well on this list early on).

-- james

> -----Original Message-----
> From: Christoph Hellwig [mailto:hch@infradead.org]
> Sent: Monday, November 28, 2005 11:52 AM
> To: Smart, James
> Cc: linux-scsi@vger.kernel.org
> Subject: Re: [PATCH 7/11] lpfc 8.1.1 : Add support for more members of
> the Light Pulse 11xxx (4Gb) family
> 
> 
> On Mon, Nov 28, 2005 at 11:42:12AM -0500, 
> James.Smart@Emulex.Com wrote:
> > -	pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
> > +	pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id);
> 
> please don't read the pci id directly, alway use pdev->device
> 
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 7/11]  lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family
  2005-11-28 17:08 [PATCH 7/11] lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family James.Smart
@ 2005-11-28 17:49 ` Matthew Wilcox
  2005-12-12 17:12   ` Matthew Wilcox
  0 siblings, 1 reply; 5+ messages in thread
From: Matthew Wilcox @ 2005-11-28 17:49 UTC (permalink / raw)
  To: James.Smart; +Cc: hch, linux-scsi

On Mon, Nov 28, 2005 at 12:08:46PM -0500, James.Smart@Emulex.Com wrote:
> Please note: there will be 2 other areas where we will still be accessing
> config space:
>   - We need the bar value, as the hardware sees it, to program a base
>     address it can decode to keep ring accesses on-chip. The current pci
>     infrastructure doesn't provide this. (we've talked about this on this
>     reflector before).

sym2 has the same need for pretty much the same reason.  It has a
private function called pci_get_base_address() right now.  I believe the
correct thing to do (but haven't got round to trying it yet) is to call
pcibios_resource_to_bus().

>   - If we reset the card, there were hardware-isms that may erroneously
>     drive perr/serr. So, we need to temporarily turn them off while we
>     reset. (I believe we went through this as well on this list early on).

That's certainly a reasonable need.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 7/11]  lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family
  2005-11-28 17:49 ` Matthew Wilcox
@ 2005-12-12 17:12   ` Matthew Wilcox
  0 siblings, 0 replies; 5+ messages in thread
From: Matthew Wilcox @ 2005-12-12 17:12 UTC (permalink / raw)
  To: James.Smart; +Cc: hch, linux-scsi

On Mon, Nov 28, 2005 at 10:49:36AM -0700, Matthew Wilcox wrote:
> On Mon, Nov 28, 2005 at 12:08:46PM -0500, James.Smart@Emulex.Com wrote:
> > Please note: there will be 2 other areas where we will still be accessing
> > config space:
> >   - We need the bar value, as the hardware sees it, to program a base
> >     address it can decode to keep ring accesses on-chip. The current pci
> >     infrastructure doesn't provide this. (we've talked about this on this
> >     reflector before).
> 
> sym2 has the same need for pretty much the same reason.  It has a
> private function called pci_get_base_address() right now.  I believe the
> correct thing to do (but haven't got round to trying it yet) is to call
> pcibios_resource_to_bus().

Done, and tested on ia64 and parisc.  Here's the patch that does it for
sym2, hopefully your code will be similar:

http://hera.kernel.org/git/?p=linux/kernel/git/willy/sym2.git;a=blobdiff;h=e6ff89a8524c74f93971715a762b8c64d18176e1;hp=ec9d93aa160d89a256aee7e92b17493205149fca;hb=b5d641b0098e2ae2263f6fa8f24fa18fcbe831ef;f=drivers/scsi/sym53c8xx_2/sym_glue.c

> >   - If we reset the card, there were hardware-isms that may erroneously
> >     drive perr/serr. So, we need to temporarily turn them off while we
> >     reset. (I believe we went through this as well on this list early on).
> 
> That's certainly a reasonable need.

I wonder if it's functionality that should be provided by the PCI layer.
I don't think yours is the only card with this issue.

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2005-12-12 17:12 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2005-11-28 17:08 [PATCH 7/11] lpfc 8.1.1 : Add support for more members of the Light Pulse 11xxx (4Gb) family James.Smart
2005-11-28 17:49 ` Matthew Wilcox
2005-12-12 17:12   ` Matthew Wilcox
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2005-11-28 16:42 James.Smart
2005-11-28 16:51 ` Christoph Hellwig

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