* [PATCH 1/5] aic7xxx: deinline large or slow functions
@ 2008-04-25 2:32 Denys Vlasenko
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
` (2 more replies)
0 siblings, 3 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-25 2:32 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
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Hi Hannes,
I reworked my patches as you requested.
The first one (in this mail) was ACKed by you, so it's just a resend.
Following pathes were not ACKed and are modified.
Please take a look.
Deinlines and moves big functions from .h to .c files.
Adds prototypes for ahc_lookup_scb and ahd_lookup_scb to .h files.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
--
vda
[-- Attachment #2: aic_debloat_1.diff --]
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--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic79xx.reg Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx.reg Thu Apr 24 07:48:32 2008
@@ -3648,9 +3648,9 @@
*/
KERNEL_TQINPOS {
size 1
}
- TQINPOS {
+ TQINPOS {
size 1
}
/*
* Base address of our shared data with the kernel driver in host
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic79xx_core.c Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_core.c Thu Apr 24 07:48:32 2008
@@ -265,10 +265,754 @@
static int ahd_match_scb(struct ahd_softc *ahd, struct scb *scb,
int target, char channel, int lun,
u_int tag, role_t role);
-/******************************** Private Inlines *****************************/
+/************************ Sequencer Execution Control *************************/
+void
+ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
+{
+ if (ahd->src_mode == src && ahd->dst_mode == dst)
+ return;
+#ifdef AHD_DEBUG
+ if (ahd->src_mode == AHD_MODE_UNKNOWN
+ || ahd->dst_mode == AHD_MODE_UNKNOWN)
+ panic("Setting mode prior to saving it.\n");
+ if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
+ printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
+ ahd_build_mode_state(ahd, src, dst));
+#endif
+ ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
+ ahd->src_mode = src;
+ ahd->dst_mode = dst;
+}
+void
+ahd_update_modes(struct ahd_softc *ahd)
+{
+ ahd_mode_state mode_ptr;
+ ahd_mode src;
+ ahd_mode dst;
+
+ mode_ptr = ahd_inb(ahd, MODE_PTR);
+#ifdef AHD_DEBUG
+ if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
+ printf("Reading mode 0x%x\n", mode_ptr);
+#endif
+ ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
+ ahd_known_modes(ahd, src, dst);
+}
+
+void
+ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
+ ahd_mode dstmode, const char *file, int line)
+{
+#ifdef AHD_DEBUG
+ if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0
+ || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) {
+ panic("%s:%s:%d: Mode assertion failed.\n",
+ ahd_name(ahd), file, line);
+ }
+#endif
+}
+
+#define AHD_ASSERT_MODES(ahd, source, dest) \
+ ahd_assert_modes(ahd, source, dest, __FILE__, __LINE__);
+
+ahd_mode_state
+ahd_save_modes(struct ahd_softc *ahd)
+{
+ if (ahd->src_mode == AHD_MODE_UNKNOWN
+ || ahd->dst_mode == AHD_MODE_UNKNOWN)
+ ahd_update_modes(ahd);
+
+ return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode));
+}
+
+void
+ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state)
+{
+ ahd_mode src;
+ ahd_mode dst;
+
+ ahd_extract_mode_state(ahd, state, &src, &dst);
+ ahd_set_modes(ahd, src, dst);
+}
+
+/*
+ * Determine whether the sequencer has halted code execution.
+ * Returns non-zero status if the sequencer is stopped.
+ */
+int
+ahd_is_paused(struct ahd_softc *ahd)
+{
+ return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0);
+}
+
+/*
+ * Request that the sequencer stop and wait, indefinitely, for it
+ * to stop. The sequencer will only acknowledge that it is paused
+ * once it has reached an instruction boundary and PAUSEDIS is
+ * cleared in the SEQCTL register. The sequencer may use PAUSEDIS
+ * for critical sections.
+ */
+void
+ahd_pause(struct ahd_softc *ahd)
+{
+ ahd_outb(ahd, HCNTRL, ahd->pause);
+
+ /*
+ * Since the sequencer can disable pausing in a critical section, we
+ * must loop until it actually stops.
+ */
+ while (ahd_is_paused(ahd) == 0)
+ ;
+}
+
+/*
+ * Allow the sequencer to continue program execution.
+ * We check here to ensure that no additional interrupt
+ * sources that would cause the sequencer to halt have been
+ * asserted. If, for example, a SCSI bus reset is detected
+ * while we are fielding a different, pausing, interrupt type,
+ * we don't want to release the sequencer before going back
+ * into our interrupt handler and dealing with this new
+ * condition.
+ */
+void
+ahd_unpause(struct ahd_softc *ahd)
+{
+ /*
+ * Automatically restore our modes to those saved
+ * prior to the first change of the mode.
+ */
+ if (ahd->saved_src_mode != AHD_MODE_UNKNOWN
+ && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) {
+ if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0)
+ ahd_reset_cmds_pending(ahd);
+ ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
+ }
+
+ if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
+ ahd_outb(ahd, HCNTRL, ahd->unpause);
+
+ ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN);
+}
+
+/*********************** Scatter Gather List Handling *************************/
+void *
+ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
+ void *sgptr, dma_addr_t addr, bus_size_t len, int last)
+{
+ scb->sg_count++;
+ if (sizeof(dma_addr_t) > 4
+ && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
+ struct ahd_dma64_seg *sg;
+
+ sg = (struct ahd_dma64_seg *)sgptr;
+ sg->addr = ahd_htole64(addr);
+ sg->len = ahd_htole32(len | (last ? AHD_DMA_LAST_SEG : 0));
+ return (sg + 1);
+ } else {
+ struct ahd_dma_seg *sg;
+
+ sg = (struct ahd_dma_seg *)sgptr;
+ sg->addr = ahd_htole32(addr & 0xFFFFFFFF);
+ sg->len = ahd_htole32(len | ((addr >> 8) & 0x7F000000)
+ | (last ? AHD_DMA_LAST_SEG : 0));
+ return (sg + 1);
+ }
+}
+
+void
+ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
+{
+ /* XXX Handle target mode SCBs. */
+ scb->crc_retry_count = 0;
+ if ((scb->flags & SCB_PACKETIZED) != 0) {
+ /* XXX what about ACA?? It is type 4, but TAG_TYPE == 0x3. */
+ scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;
+ } else {
+ if (ahd_get_transfer_length(scb) & 0x01)
+ scb->hscb->task_attribute = SCB_XFERLEN_ODD;
+ else
+ scb->hscb->task_attribute = 0;
+ }
+
+ if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR
+ || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0)
+ scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
+ ahd_htole32(scb->sense_busaddr);
+}
+
+void
+ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
+{
+ /*
+ * Copy the first SG into the "current" data ponter area.
+ */
+ if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
+ struct ahd_dma64_seg *sg;
+
+ sg = (struct ahd_dma64_seg *)scb->sg_list;
+ scb->hscb->dataptr = sg->addr;
+ scb->hscb->datacnt = sg->len;
+ } else {
+ struct ahd_dma_seg *sg;
+ uint32_t *dataptr_words;
+
+ sg = (struct ahd_dma_seg *)scb->sg_list;
+ dataptr_words = (uint32_t*)&scb->hscb->dataptr;
+ dataptr_words[0] = sg->addr;
+ dataptr_words[1] = 0;
+ if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
+ uint64_t high_addr;
+
+ high_addr = ahd_le32toh(sg->len) & 0x7F000000;
+ scb->hscb->dataptr |= ahd_htole64(high_addr << 8);
+ }
+ scb->hscb->datacnt = sg->len;
+ }
+ /*
+ * Note where to find the SG entries in bus space.
+ * We also set the full residual flag which the
+ * sequencer will clear as soon as a data transfer
+ * occurs.
+ */
+ scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
+}
+
+void
+ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
+{
+ scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL);
+ scb->hscb->dataptr = 0;
+ scb->hscb->datacnt = 0;
+}
+
+/************************** Memory mapping routines ***************************/
+void *
+ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
+{
+ dma_addr_t sg_offset;
+
+ /* sg_list_phys points to entry 1, not 0 */
+ sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
+ return ((uint8_t *)scb->sg_list + sg_offset);
+}
+
+uint32_t
+ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
+{
+ dma_addr_t sg_offset;
+
+ /* sg_list_phys points to entry 1, not 0 */
+ sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
+ - ahd_sg_size(ahd);
+
+ return (scb->sg_list_busaddr + sg_offset);
+}
+
+void
+ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
+{
+ ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat,
+ scb->hscb_map->dmamap,
+ /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
+ /*len*/sizeof(*scb->hscb), op);
+}
+
+void
+ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op)
+{
+ if (scb->sg_count == 0)
+ return;
+
+ ahd_dmamap_sync(ahd, ahd->scb_data.sg_dmat,
+ scb->sg_map->dmamap,
+ /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
+ /*len*/ahd_sg_size(ahd) * scb->sg_count, op);
+}
+
+void
+ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
+{
+ ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat,
+ scb->sense_map->dmamap,
+ /*offset*/scb->sense_busaddr,
+ /*len*/AHD_SENSE_BUFSIZE, op);
+}
+
+uint32_t
+ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
+{
+ return (((uint8_t *)&ahd->targetcmds[index])
+ - (uint8_t *)ahd->qoutfifo);
+}
+
+/*********************** Miscelaneous Support Functions ***********************/
+/*
+ * Return pointers to the transfer negotiation information
+ * for the specified our_id/remote_id pair.
+ */
+struct ahd_initiator_tinfo *
+ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id,
+ u_int remote_id, struct ahd_tmode_tstate **tstate)
+{
+ /*
+ * Transfer data structures are stored from the perspective
+ * of the target role. Since the parameters for a connection
+ * in the initiator role to a given target are the same as
+ * when the roles are reversed, we pretend we are the target.
+ */
+ if (channel == 'B')
+ our_id += 8;
+ *tstate = ahd->enabled_targets[our_id];
+ return (&(*tstate)->transinfo[remote_id]);
+}
+
+uint16_t
+ahd_inw(struct ahd_softc *ahd, u_int port)
+{
+ /*
+ * Read high byte first as some registers increment
+ * or have other side effects when the low byte is
+ * read.
+ */
+ uint16_t r = ahd_inb(ahd, port+1) << 8;
+ return r | ahd_inb(ahd, port);
+}
+
+void
+ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
+{
+ /*
+ * Write low byte first to accomodate registers
+ * such as PRGMCNT where the order maters.
+ */
+ ahd_outb(ahd, port, value & 0xFF);
+ ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
+}
+
+uint32_t
+ahd_inl(struct ahd_softc *ahd, u_int port)
+{
+ return ((ahd_inb(ahd, port))
+ | (ahd_inb(ahd, port+1) << 8)
+ | (ahd_inb(ahd, port+2) << 16)
+ | (ahd_inb(ahd, port+3) << 24));
+}
+
+void
+ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value)
+{
+ ahd_outb(ahd, port, (value) & 0xFF);
+ ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF);
+ ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF);
+ ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF);
+}
+
+uint64_t
+ahd_inq(struct ahd_softc *ahd, u_int port)
+{
+ return ((ahd_inb(ahd, port))
+ | (ahd_inb(ahd, port+1) << 8)
+ | (ahd_inb(ahd, port+2) << 16)
+ | (ahd_inb(ahd, port+3) << 24)
+ | (((uint64_t)ahd_inb(ahd, port+4)) << 32)
+ | (((uint64_t)ahd_inb(ahd, port+5)) << 40)
+ | (((uint64_t)ahd_inb(ahd, port+6)) << 48)
+ | (((uint64_t)ahd_inb(ahd, port+7)) << 56));
+}
+
+void
+ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value)
+{
+ ahd_outb(ahd, port, value & 0xFF);
+ ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
+ ahd_outb(ahd, port+2, (value >> 16) & 0xFF);
+ ahd_outb(ahd, port+3, (value >> 24) & 0xFF);
+ ahd_outb(ahd, port+4, (value >> 32) & 0xFF);
+ ahd_outb(ahd, port+5, (value >> 40) & 0xFF);
+ ahd_outb(ahd, port+6, (value >> 48) & 0xFF);
+ ahd_outb(ahd, port+7, (value >> 56) & 0xFF);
+}
+
+u_int
+ahd_get_scbptr(struct ahd_softc *ahd)
+{
+ AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
+ ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
+ return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8));
+}
+
+void
+ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr)
+{
+ AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
+ ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
+ ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
+ ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
+}
+
+u_int
+ahd_get_hnscb_qoff(struct ahd_softc *ahd)
+{
+ return (ahd_inw_atomic(ahd, HNSCB_QOFF));
+}
+
+void
+ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
+{
+ ahd_outw_atomic(ahd, HNSCB_QOFF, value);
+}
+
+u_int
+ahd_get_hescb_qoff(struct ahd_softc *ahd)
+{
+ return (ahd_inb(ahd, HESCB_QOFF));
+}
+
+void
+ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
+{
+ ahd_outb(ahd, HESCB_QOFF, value);
+}
+
+u_int
+ahd_get_snscb_qoff(struct ahd_softc *ahd)
+{
+ u_int oldvalue;
+
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ oldvalue = ahd_inw(ahd, SNSCB_QOFF);
+ ahd_outw(ahd, SNSCB_QOFF, oldvalue);
+ return (oldvalue);
+}
+
+void
+ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
+{
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ ahd_outw(ahd, SNSCB_QOFF, value);
+}
+
+u_int
+ahd_get_sescb_qoff(struct ahd_softc *ahd)
+{
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ return (ahd_inb(ahd, SESCB_QOFF));
+}
+
+void
+ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
+{
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ ahd_outb(ahd, SESCB_QOFF, value);
+}
+
+u_int
+ahd_get_sdscb_qoff(struct ahd_softc *ahd)
+{
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
+}
+
+void
+ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
+{
+ AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+ ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
+ ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF);
+}
+
+u_int
+ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
+{
+ u_int value;
+
+ /*
+ * Workaround PCI-X Rev A. hardware bug.
+ * After a host read of SCB memory, the chip
+ * may become confused into thinking prefetch
+ * was required. This starts the discard timer
+ * running and can cause an unexpected discard
+ * timer interrupt. The work around is to read
+ * a normal register prior to the exhaustion of
+ * the discard timer. The mode pointer register
+ * has no side effects and so serves well for
+ * this purpose.
+ *
+ * Razor #528
+ */
+ value = ahd_inb(ahd, offset);
+ if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0)
+ ahd_inb(ahd, MODE_PTR);
+ return (value);
+}
+
+u_int
+ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
+{
+ return (ahd_inb_scbram(ahd, offset)
+ | (ahd_inb_scbram(ahd, offset+1) << 8));
+}
+
+uint32_t
+ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
+{
+ return (ahd_inw_scbram(ahd, offset)
+ | (ahd_inw_scbram(ahd, offset+2) << 16));
+}
+
+uint64_t
+ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
+{
+ return (ahd_inl_scbram(ahd, offset)
+ | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
+}
+
+struct scb *
+ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
+{
+ struct scb* scb;
+
+ if (tag >= AHD_SCB_MAX)
+ return (NULL);
+ scb = ahd->scb_data.scbindex[tag];
+ if (scb != NULL)
+ ahd_sync_scb(ahd, scb,
+ BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+ return (scb);
+}
+
+void
+ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
+{
+ struct hardware_scb *q_hscb;
+ struct map_node *q_hscb_map;
+ uint32_t saved_hscb_busaddr;
+
+ /*
+ * Our queuing method is a bit tricky. The card
+ * knows in advance which HSCB (by address) to download,
+ * and we can't disappoint it. To achieve this, the next
+ * HSCB to download is saved off in ahd->next_queued_hscb.
+ * When we are called to queue "an arbitrary scb",
+ * we copy the contents of the incoming HSCB to the one
+ * the sequencer knows about, swap HSCB pointers and
+ * finally assign the SCB to the tag indexed location
+ * in the scb_array. This makes sure that we can still
+ * locate the correct SCB by SCB_TAG.
+ */
+ q_hscb = ahd->next_queued_hscb;
+ q_hscb_map = ahd->next_queued_hscb_map;
+ saved_hscb_busaddr = q_hscb->hscb_busaddr;
+ memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
+ q_hscb->hscb_busaddr = saved_hscb_busaddr;
+ q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
+
+ /* Now swap HSCB pointers. */
+ ahd->next_queued_hscb = scb->hscb;
+ ahd->next_queued_hscb_map = scb->hscb_map;
+ scb->hscb = q_hscb;
+ scb->hscb_map = q_hscb_map;
+
+ /* Now define the mapping from tag to SCB in the scbindex */
+ ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
+}
+
+/*
+ * Tell the sequencer about a new transaction to execute.
+ */
+void
+ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb)
+{
+ ahd_swap_with_next_hscb(ahd, scb);
+
+ if (SCBID_IS_NULL(SCB_GET_TAG(scb)))
+ panic("Attempt to queue invalid SCB tag %x\n",
+ SCB_GET_TAG(scb));
+
+ /*
+ * Keep a history of SCBs we've downloaded in the qinfifo.
+ */
+ ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
+ ahd->qinfifonext++;
+
+ if (scb->sg_count != 0)
+ ahd_setup_data_scb(ahd, scb);
+ else
+ ahd_setup_noxfer_scb(ahd, scb);
+ ahd_setup_scb_common(ahd, scb);
+
+ /*
+ * Make sure our data is consistent from the
+ * perspective of the adapter.
+ */
+ ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+
+#ifdef AHD_DEBUG
+ if ((ahd_debug & AHD_SHOW_QUEUE) != 0) {
+ uint64_t host_dataptr;
+
+ host_dataptr = ahd_le64toh(scb->hscb->dataptr);
+ printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
+ ahd_name(ahd),
+ SCB_GET_TAG(scb), scb->hscb->scsiid,
+ ahd_le32toh(scb->hscb->hscb_busaddr),
+ (u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
+ (u_int)(host_dataptr & 0xFFFFFFFF),
+ ahd_le32toh(scb->hscb->datacnt));
+ }
+#endif
+ /* Tell the adapter about the newly queued SCB */
+ ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
+}
+
+/************************** Interrupt Processing ******************************/
+void
+ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
+{
+ ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
+ /*offset*/0,
+ /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
+}
+
+void
+ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
+{
+#ifdef AHD_TARGET_MODE
+ if ((ahd->flags & AHD_TARGETROLE) != 0) {
+ ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
+ ahd->shared_data_map.dmamap,
+ ahd_targetcmd_offset(ahd, 0),
+ sizeof(struct target_cmd) * AHD_TMODE_CMDS,
+ op);
+ }
+#endif
+}
+
+/*
+ * See if the firmware has posted any completed commands
+ * into our in-core command complete fifos.
+ */
+#define AHD_RUN_QOUTFIFO 0x1
+#define AHD_RUN_TQINFIFO 0x2
+u_int
+ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
+{
+ u_int retval;
+
+ retval = 0;
+ ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
+ /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
+ /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
+ if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag
+ == ahd->qoutfifonext_valid_tag)
+ retval |= AHD_RUN_QOUTFIFO;
+#ifdef AHD_TARGET_MODE
+ if ((ahd->flags & AHD_TARGETROLE) != 0
+ && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
+ ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
+ ahd->shared_data_map.dmamap,
+ ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
+ /*len*/sizeof(struct target_cmd),
+ BUS_DMASYNC_POSTREAD);
+ if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0)
+ retval |= AHD_RUN_TQINFIFO;
+ }
+#endif
+ return (retval);
+}
+
+/*
+ * Catch an interrupt from the adapter
+ */
+int
+ahd_intr(struct ahd_softc *ahd)
+{
+ u_int intstat;
+
+ if ((ahd->pause & INTEN) == 0) {
+ /*
+ * Our interrupt is not enabled on the chip
+ * and may be disabled for re-entrancy reasons,
+ * so just return. This is likely just a shared
+ * interrupt.
+ */
+ return (0);
+ }
+
+ /*
+ * Instead of directly reading the interrupt status register,
+ * infer the cause of the interrupt by checking our in-core
+ * completion queues. This avoids a costly PCI bus read in
+ * most cases.
+ */
+ if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0
+ && (ahd_check_cmdcmpltqueues(ahd) != 0))
+ intstat = CMDCMPLT;
+ else
+ intstat = ahd_inb(ahd, INTSTAT);
+
+ if ((intstat & INT_PEND) == 0)
+ return (0);
+
+ if (intstat & CMDCMPLT) {
+ ahd_outb(ahd, CLRINT, CLRCMDINT);
+
+ /*
+ * Ensure that the chip sees that we've cleared
+ * this interrupt before we walk the output fifo.
+ * Otherwise, we may, due to posted bus writes,
+ * clear the interrupt after we finish the scan,
+ * and after the sequencer has added new entries
+ * and asserted the interrupt again.
+ */
+ if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
+ if (ahd_is_paused(ahd)) {
+ /*
+ * Potentially lost SEQINT.
+ * If SEQINTCODE is non-zero,
+ * simulate the SEQINT.
+ */
+ if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
+ intstat |= SEQINT;
+ }
+ } else {
+ ahd_flush_device_writes(ahd);
+ }
+ ahd_run_qoutfifo(ahd);
+ ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++;
+ ahd->cmdcmplt_total++;
+#ifdef AHD_TARGET_MODE
+ if ((ahd->flags & AHD_TARGETROLE) != 0)
+ ahd_run_tqinfifo(ahd, /*paused*/FALSE);
+#endif
+ }
+
+ /*
+ * Handle statuses that may invalidate our cached
+ * copy of INTSTAT separately.
+ */
+ if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) {
+ /* Hot eject. Do nothing */
+ } else if (intstat & HWERRINT) {
+ ahd_handle_hwerrint(ahd);
+ } else if ((intstat & (PCIINT|SPLTINT)) != 0) {
+ ahd->bus_intr(ahd);
+ } else {
+
+ if ((intstat & SEQINT) != 0)
+ ahd_handle_seqint(ahd, intstat);
+
+ if ((intstat & SCSIINT) != 0)
+ ahd_handle_scsiint(ahd, intstat);
+ }
+ return (1);
+}
+
+/******************************** Private Inlines *****************************/
static __inline void
ahd_assert_atn(struct ahd_softc *ahd)
{
ahd_outb(ahd, SCSISIGO, ATNO);
@@ -279,9 +1023,9 @@
* agreement. This does not necessarily mean that we
* are currently in a packetized transfer. We could
* just as easily be sending or receiving a message.
*/
-static __inline int
+static int
ahd_currently_packetized(struct ahd_softc *ahd)
{
ahd_mode_state saved_modes;
int packetized;
@@ -3940,9 +4684,9 @@
* Manual message loop handler.
*/
static void
ahd_handle_message_phase(struct ahd_softc *ahd)
-{
+{
struct ahd_devinfo devinfo;
u_int bus_phase;
int end_session;
@@ -5982,10 +6726,9 @@
* Return an SCB resource to the free list.
*/
void
ahd_free_scb(struct ahd_softc *ahd, struct scb *scb)
-{
-
+{
/* Clean up for the next user */
scb->flags = SCB_FLAG_NONE;
scb->hscb->control = 0;
ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = NULL;
@@ -6270,8 +7013,26 @@
"Over Terminated",
"Under Terminated",
"Not Configured"
};
+
+/***************************** Timer Facilities *******************************/
+#define ahd_timer_init init_timer
+#define ahd_timer_stop del_timer_sync
+typedef void ahd_linux_callback_t (u_long);
+
+static void
+ahd_timer_reset(ahd_timer_t *timer, int usec, ahd_callback_t *func, void *arg)
+{
+ struct ahd_softc *ahd;
+
+ ahd = (struct ahd_softc *)arg;
+ del_timer(timer);
+ timer->data = (u_long)arg;
+ timer->expires = jiffies + (usec * HZ)/1000000;
+ timer->function = (ahd_linux_callback_t*)func;
+ add_timer(timer);
+}
/*
* Start the board, ready for normal operation
*/
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic79xx_inline.h Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_inline.h Thu Apr 24 07:48:32 2008
@@ -62,21 +62,22 @@
ahd_mode dst);
static __inline void ahd_extract_mode_state(struct ahd_softc *ahd,
ahd_mode_state state,
ahd_mode *src, ahd_mode *dst);
-static __inline void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src,
- ahd_mode dst);
-static __inline void ahd_update_modes(struct ahd_softc *ahd);
-static __inline void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
- ahd_mode dstmode, const char *file,
- int line);
-static __inline ahd_mode_state ahd_save_modes(struct ahd_softc *ahd);
-static __inline void ahd_restore_modes(struct ahd_softc *ahd,
- ahd_mode_state state);
-static __inline int ahd_is_paused(struct ahd_softc *ahd);
-static __inline void ahd_pause(struct ahd_softc *ahd);
-static __inline void ahd_unpause(struct ahd_softc *ahd);
+void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src,
+ ahd_mode dst);
+void ahd_update_modes(struct ahd_softc *ahd);
+void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
+ ahd_mode dstmode, const char *file,
+ int line);
+ahd_mode_state ahd_save_modes(struct ahd_softc *ahd);
+void ahd_restore_modes(struct ahd_softc *ahd,
+ ahd_mode_state state);
+int ahd_is_paused(struct ahd_softc *ahd);
+void ahd_pause(struct ahd_softc *ahd);
+void ahd_unpause(struct ahd_softc *ahd);
+
static __inline void
ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
{
ahd->src_mode = src;
@@ -98,696 +99,106 @@
*src = (state & SRC_MODE) >> SRC_MODE_SHIFT;
*dst = (state & DST_MODE) >> DST_MODE_SHIFT;
}
-static __inline void
-ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
-{
- if (ahd->src_mode == src && ahd->dst_mode == dst)
- return;
-#ifdef AHD_DEBUG
- if (ahd->src_mode == AHD_MODE_UNKNOWN
- || ahd->dst_mode == AHD_MODE_UNKNOWN)
- panic("Setting mode prior to saving it.\n");
- if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
- printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
- ahd_build_mode_state(ahd, src, dst));
-#endif
- ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
- ahd->src_mode = src;
- ahd->dst_mode = dst;
-}
-
-static __inline void
-ahd_update_modes(struct ahd_softc *ahd)
-{
- ahd_mode_state mode_ptr;
- ahd_mode src;
- ahd_mode dst;
-
- mode_ptr = ahd_inb(ahd, MODE_PTR);
-#ifdef AHD_DEBUG
- if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
- printf("Reading mode 0x%x\n", mode_ptr);
-#endif
- ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
- ahd_known_modes(ahd, src, dst);
-}
-
-static __inline void
-ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
- ahd_mode dstmode, const char *file, int line)
-{
-#ifdef AHD_DEBUG
- if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0
- || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) {
- panic("%s:%s:%d: Mode assertion failed.\n",
- ahd_name(ahd), file, line);
- }
-#endif
-}
-
-static __inline ahd_mode_state
-ahd_save_modes(struct ahd_softc *ahd)
-{
- if (ahd->src_mode == AHD_MODE_UNKNOWN
- || ahd->dst_mode == AHD_MODE_UNKNOWN)
- ahd_update_modes(ahd);
-
- return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode));
-}
-
-static __inline void
-ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state)
-{
- ahd_mode src;
- ahd_mode dst;
-
- ahd_extract_mode_state(ahd, state, &src, &dst);
- ahd_set_modes(ahd, src, dst);
-}
-
-#define AHD_ASSERT_MODES(ahd, source, dest) \
- ahd_assert_modes(ahd, source, dest, __FILE__, __LINE__);
-
-/*
- * Determine whether the sequencer has halted code execution.
- * Returns non-zero status if the sequencer is stopped.
- */
-static __inline int
-ahd_is_paused(struct ahd_softc *ahd)
-{
- return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0);
-}
-
-/*
- * Request that the sequencer stop and wait, indefinitely, for it
- * to stop. The sequencer will only acknowledge that it is paused
- * once it has reached an instruction boundary and PAUSEDIS is
- * cleared in the SEQCTL register. The sequencer may use PAUSEDIS
- * for critical sections.
- */
-static __inline void
-ahd_pause(struct ahd_softc *ahd)
-{
- ahd_outb(ahd, HCNTRL, ahd->pause);
-
- /*
- * Since the sequencer can disable pausing in a critical section, we
- * must loop until it actually stops.
- */
- while (ahd_is_paused(ahd) == 0)
- ;
-}
-
-/*
- * Allow the sequencer to continue program execution.
- * We check here to ensure that no additional interrupt
- * sources that would cause the sequencer to halt have been
- * asserted. If, for example, a SCSI bus reset is detected
- * while we are fielding a different, pausing, interrupt type,
- * we don't want to release the sequencer before going back
- * into our interrupt handler and dealing with this new
- * condition.
- */
-static __inline void
-ahd_unpause(struct ahd_softc *ahd)
-{
- /*
- * Automatically restore our modes to those saved
- * prior to the first change of the mode.
- */
- if (ahd->saved_src_mode != AHD_MODE_UNKNOWN
- && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) {
- if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0)
- ahd_reset_cmds_pending(ahd);
- ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
- }
-
- if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
- ahd_outb(ahd, HCNTRL, ahd->unpause);
-
- ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN);
-}
-
/*********************** Scatter Gather List Handling *************************/
-static __inline void *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
- void *sgptr, dma_addr_t addr,
- bus_size_t len, int last);
-static __inline void ahd_setup_scb_common(struct ahd_softc *ahd,
- struct scb *scb);
-static __inline void ahd_setup_data_scb(struct ahd_softc *ahd,
- struct scb *scb);
-static __inline void ahd_setup_noxfer_scb(struct ahd_softc *ahd,
- struct scb *scb);
+void *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
+ void *sgptr, dma_addr_t addr,
+ bus_size_t len, int last);
+void ahd_setup_scb_common(struct ahd_softc *ahd,
+ struct scb *scb);
+void ahd_setup_data_scb(struct ahd_softc *ahd,
+ struct scb *scb);
+void ahd_setup_noxfer_scb(struct ahd_softc *ahd,
+ struct scb *scb);
-static __inline void *
-ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
- void *sgptr, dma_addr_t addr, bus_size_t len, int last)
-{
- scb->sg_count++;
- if (sizeof(dma_addr_t) > 4
- && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
- struct ahd_dma64_seg *sg;
-
- sg = (struct ahd_dma64_seg *)sgptr;
- sg->addr = ahd_htole64(addr);
- sg->len = ahd_htole32(len | (last ? AHD_DMA_LAST_SEG : 0));
- return (sg + 1);
- } else {
- struct ahd_dma_seg *sg;
-
- sg = (struct ahd_dma_seg *)sgptr;
- sg->addr = ahd_htole32(addr & 0xFFFFFFFF);
- sg->len = ahd_htole32(len | ((addr >> 8) & 0x7F000000)
- | (last ? AHD_DMA_LAST_SEG : 0));
- return (sg + 1);
- }
-}
-
-static __inline void
-ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
-{
- /* XXX Handle target mode SCBs. */
- scb->crc_retry_count = 0;
- if ((scb->flags & SCB_PACKETIZED) != 0) {
- /* XXX what about ACA?? It is type 4, but TAG_TYPE == 0x3. */
- scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;
- } else {
- if (ahd_get_transfer_length(scb) & 0x01)
- scb->hscb->task_attribute = SCB_XFERLEN_ODD;
- else
- scb->hscb->task_attribute = 0;
- }
-
- if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR
- || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0)
- scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
- ahd_htole32(scb->sense_busaddr);
-}
-
-static __inline void
-ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
-{
- /*
- * Copy the first SG into the "current" data ponter area.
- */
- if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
- struct ahd_dma64_seg *sg;
-
- sg = (struct ahd_dma64_seg *)scb->sg_list;
- scb->hscb->dataptr = sg->addr;
- scb->hscb->datacnt = sg->len;
- } else {
- struct ahd_dma_seg *sg;
- uint32_t *dataptr_words;
-
- sg = (struct ahd_dma_seg *)scb->sg_list;
- dataptr_words = (uint32_t*)&scb->hscb->dataptr;
- dataptr_words[0] = sg->addr;
- dataptr_words[1] = 0;
- if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
- uint64_t high_addr;
-
- high_addr = ahd_le32toh(sg->len) & 0x7F000000;
- scb->hscb->dataptr |= ahd_htole64(high_addr << 8);
- }
- scb->hscb->datacnt = sg->len;
- }
- /*
- * Note where to find the SG entries in bus space.
- * We also set the full residual flag which the
- * sequencer will clear as soon as a data transfer
- * occurs.
- */
- scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
-}
-
-static __inline void
-ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
-{
- scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL);
- scb->hscb->dataptr = 0;
- scb->hscb->datacnt = 0;
-}
-
/************************** Memory mapping routines ***************************/
static __inline size_t ahd_sg_size(struct ahd_softc *ahd);
-static __inline void *
- ahd_sg_bus_to_virt(struct ahd_softc *ahd,
- struct scb *scb,
- uint32_t sg_busaddr);
-static __inline uint32_t
- ahd_sg_virt_to_bus(struct ahd_softc *ahd,
- struct scb *scb,
- void *sg);
-static __inline void ahd_sync_scb(struct ahd_softc *ahd,
- struct scb *scb, int op);
-static __inline void ahd_sync_sglist(struct ahd_softc *ahd,
- struct scb *scb, int op);
-static __inline void ahd_sync_sense(struct ahd_softc *ahd,
- struct scb *scb, int op);
-static __inline uint32_t
- ahd_targetcmd_offset(struct ahd_softc *ahd,
- u_int index);
+void *
+ ahd_sg_bus_to_virt(struct ahd_softc *ahd,
+ struct scb *scb,
+ uint32_t sg_busaddr);
+uint32_t
+ ahd_sg_virt_to_bus(struct ahd_softc *ahd,
+ struct scb *scb,
+ void *sg);
+void ahd_sync_scb(struct ahd_softc *ahd,
+ struct scb *scb, int op);
+void ahd_sync_sglist(struct ahd_softc *ahd,
+ struct scb *scb, int op);
+void ahd_sync_sense(struct ahd_softc *ahd,
+ struct scb *scb, int op);
+uint32_t
+ ahd_targetcmd_offset(struct ahd_softc *ahd,
+ u_int index);
+
static __inline size_t
ahd_sg_size(struct ahd_softc *ahd)
{
if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
return (sizeof(struct ahd_dma64_seg));
return (sizeof(struct ahd_dma_seg));
}
-static __inline void *
-ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
-{
- dma_addr_t sg_offset;
-
- /* sg_list_phys points to entry 1, not 0 */
- sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
- return ((uint8_t *)scb->sg_list + sg_offset);
-}
-
-static __inline uint32_t
-ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
-{
- dma_addr_t sg_offset;
-
- /* sg_list_phys points to entry 1, not 0 */
- sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
- - ahd_sg_size(ahd);
-
- return (scb->sg_list_busaddr + sg_offset);
-}
-
-static __inline void
-ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
-{
- ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat,
- scb->hscb_map->dmamap,
- /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
- /*len*/sizeof(*scb->hscb), op);
-}
-
-static __inline void
-ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op)
-{
- if (scb->sg_count == 0)
- return;
-
- ahd_dmamap_sync(ahd, ahd->scb_data.sg_dmat,
- scb->sg_map->dmamap,
- /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
- /*len*/ahd_sg_size(ahd) * scb->sg_count, op);
-}
-
-static __inline void
-ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
-{
- ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat,
- scb->sense_map->dmamap,
- /*offset*/scb->sense_busaddr,
- /*len*/AHD_SENSE_BUFSIZE, op);
-}
-
-static __inline uint32_t
-ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
-{
- return (((uint8_t *)&ahd->targetcmds[index])
- - (uint8_t *)ahd->qoutfifo);
-}
-
/*********************** Miscellaneous Support Functions ***********************/
-static __inline struct ahd_initiator_tinfo *
- ahd_fetch_transinfo(struct ahd_softc *ahd,
- char channel, u_int our_id,
- u_int remote_id,
- struct ahd_tmode_tstate **tstate);
-static __inline uint16_t
- ahd_inw(struct ahd_softc *ahd, u_int port);
-static __inline void ahd_outw(struct ahd_softc *ahd, u_int port,
- u_int value);
-static __inline uint32_t
- ahd_inl(struct ahd_softc *ahd, u_int port);
-static __inline void ahd_outl(struct ahd_softc *ahd, u_int port,
- uint32_t value);
-static __inline uint64_t
- ahd_inq(struct ahd_softc *ahd, u_int port);
-static __inline void ahd_outq(struct ahd_softc *ahd, u_int port,
- uint64_t value);
-static __inline u_int ahd_get_scbptr(struct ahd_softc *ahd);
-static __inline void ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr);
-static __inline u_int ahd_get_hnscb_qoff(struct ahd_softc *ahd);
-static __inline void ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value);
-static __inline u_int ahd_get_hescb_qoff(struct ahd_softc *ahd);
-static __inline void ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value);
-static __inline u_int ahd_get_snscb_qoff(struct ahd_softc *ahd);
-static __inline void ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value);
-static __inline u_int ahd_get_sescb_qoff(struct ahd_softc *ahd);
-static __inline void ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value);
-static __inline u_int ahd_get_sdscb_qoff(struct ahd_softc *ahd);
-static __inline void ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value);
-static __inline u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
-static __inline u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
-static __inline uint32_t
- ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
-static __inline uint64_t
- ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
-static __inline void ahd_swap_with_next_hscb(struct ahd_softc *ahd,
- struct scb *scb);
-static __inline void ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb);
+struct ahd_initiator_tinfo *
+ ahd_fetch_transinfo(struct ahd_softc *ahd,
+ char channel, u_int our_id,
+ u_int remote_id,
+ struct ahd_tmode_tstate **tstate);
+uint16_t
+ ahd_inw(struct ahd_softc *ahd, u_int port);
+void ahd_outw(struct ahd_softc *ahd, u_int port,
+ u_int value);
+uint32_t
+ ahd_inl(struct ahd_softc *ahd, u_int port);
+void ahd_outl(struct ahd_softc *ahd, u_int port,
+ uint32_t value);
+uint64_t
+ ahd_inq(struct ahd_softc *ahd, u_int port);
+void ahd_outq(struct ahd_softc *ahd, u_int port,
+ uint64_t value);
+u_int ahd_get_scbptr(struct ahd_softc *ahd);
+void ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr);
+u_int ahd_get_hnscb_qoff(struct ahd_softc *ahd);
+void ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value);
+u_int ahd_get_hescb_qoff(struct ahd_softc *ahd);
+void ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value);
+u_int ahd_get_snscb_qoff(struct ahd_softc *ahd);
+void ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value);
+u_int ahd_get_sescb_qoff(struct ahd_softc *ahd);
+void ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value);
+u_int ahd_get_sdscb_qoff(struct ahd_softc *ahd);
+void ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value);
+u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
+u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
+uint32_t
+ ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
+uint64_t
+ ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
+struct scb *
+ ahd_lookup_scb(struct ahd_softc *ahd, u_int tag);
+void ahd_swap_with_next_hscb(struct ahd_softc *ahd,
+ struct scb *scb);
+void ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb);
+
static __inline uint8_t *
ahd_get_sense_buf(struct ahd_softc *ahd,
struct scb *scb);
static __inline uint32_t
ahd_get_sense_bufaddr(struct ahd_softc *ahd,
struct scb *scb);
-/*
- * Return pointers to the transfer negotiation information
- * for the specified our_id/remote_id pair.
- */
-static __inline struct ahd_initiator_tinfo *
-ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id,
- u_int remote_id, struct ahd_tmode_tstate **tstate)
-{
- /*
- * Transfer data structures are stored from the perspective
- * of the target role. Since the parameters for a connection
- * in the initiator role to a given target are the same as
- * when the roles are reversed, we pretend we are the target.
- */
- if (channel == 'B')
- our_id += 8;
- *tstate = ahd->enabled_targets[our_id];
- return (&(*tstate)->transinfo[remote_id]);
-}
+#if 0 /* unused */
#define AHD_COPY_COL_IDX(dst, src) \
do { \
dst->hscb->scsiid = src->hscb->scsiid; \
dst->hscb->lun = src->hscb->lun; \
} while (0)
-static __inline uint16_t
-ahd_inw(struct ahd_softc *ahd, u_int port)
-{
- /*
- * Read high byte first as some registers increment
- * or have other side effects when the low byte is
- * read.
- */
- uint16_t r = ahd_inb(ahd, port+1) << 8;
- return r | ahd_inb(ahd, port);
-}
-
-static __inline void
-ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
-{
- /*
- * Write low byte first to accomodate registers
- * such as PRGMCNT where the order maters.
- */
- ahd_outb(ahd, port, value & 0xFF);
- ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
-}
-
-static __inline uint32_t
-ahd_inl(struct ahd_softc *ahd, u_int port)
-{
- return ((ahd_inb(ahd, port))
- | (ahd_inb(ahd, port+1) << 8)
- | (ahd_inb(ahd, port+2) << 16)
- | (ahd_inb(ahd, port+3) << 24));
-}
-
-static __inline void
-ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value)
-{
- ahd_outb(ahd, port, (value) & 0xFF);
- ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF);
- ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF);
- ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF);
-}
-
-static __inline uint64_t
-ahd_inq(struct ahd_softc *ahd, u_int port)
-{
- return ((ahd_inb(ahd, port))
- | (ahd_inb(ahd, port+1) << 8)
- | (ahd_inb(ahd, port+2) << 16)
- | (ahd_inb(ahd, port+3) << 24)
- | (((uint64_t)ahd_inb(ahd, port+4)) << 32)
- | (((uint64_t)ahd_inb(ahd, port+5)) << 40)
- | (((uint64_t)ahd_inb(ahd, port+6)) << 48)
- | (((uint64_t)ahd_inb(ahd, port+7)) << 56));
-}
-
-static __inline void
-ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value)
-{
- ahd_outb(ahd, port, value & 0xFF);
- ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
- ahd_outb(ahd, port+2, (value >> 16) & 0xFF);
- ahd_outb(ahd, port+3, (value >> 24) & 0xFF);
- ahd_outb(ahd, port+4, (value >> 32) & 0xFF);
- ahd_outb(ahd, port+5, (value >> 40) & 0xFF);
- ahd_outb(ahd, port+6, (value >> 48) & 0xFF);
- ahd_outb(ahd, port+7, (value >> 56) & 0xFF);
-}
-
-static __inline u_int
-ahd_get_scbptr(struct ahd_softc *ahd)
-{
- AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
- ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
- return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8));
-}
-
-static __inline void
-ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr)
-{
- AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
- ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
- ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
- ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
-}
-
-static __inline u_int
-ahd_get_hnscb_qoff(struct ahd_softc *ahd)
-{
- return (ahd_inw_atomic(ahd, HNSCB_QOFF));
-}
-
-static __inline void
-ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
-{
- ahd_outw_atomic(ahd, HNSCB_QOFF, value);
-}
-
-static __inline u_int
-ahd_get_hescb_qoff(struct ahd_softc *ahd)
-{
- return (ahd_inb(ahd, HESCB_QOFF));
-}
-
-static __inline void
-ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
-{
- ahd_outb(ahd, HESCB_QOFF, value);
-}
-
-static __inline u_int
-ahd_get_snscb_qoff(struct ahd_softc *ahd)
-{
- u_int oldvalue;
-
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- oldvalue = ahd_inw(ahd, SNSCB_QOFF);
- ahd_outw(ahd, SNSCB_QOFF, oldvalue);
- return (oldvalue);
-}
-
-static __inline void
-ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
-{
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- ahd_outw(ahd, SNSCB_QOFF, value);
-}
-
-static __inline u_int
-ahd_get_sescb_qoff(struct ahd_softc *ahd)
-{
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- return (ahd_inb(ahd, SESCB_QOFF));
-}
-
-static __inline void
-ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
-{
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- ahd_outb(ahd, SESCB_QOFF, value);
-}
-
-static __inline u_int
-ahd_get_sdscb_qoff(struct ahd_softc *ahd)
-{
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
-}
-
-static __inline void
-ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
-{
- AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
- ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
- ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF);
-}
-
-static __inline u_int
-ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
-{
- u_int value;
-
- /*
- * Workaround PCI-X Rev A. hardware bug.
- * After a host read of SCB memory, the chip
- * may become confused into thinking prefetch
- * was required. This starts the discard timer
- * running and can cause an unexpected discard
- * timer interrupt. The work around is to read
- * a normal register prior to the exhaustion of
- * the discard timer. The mode pointer register
- * has no side effects and so serves well for
- * this purpose.
- *
- * Razor #528
- */
- value = ahd_inb(ahd, offset);
- if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0)
- ahd_inb(ahd, MODE_PTR);
- return (value);
-}
-
-static __inline u_int
-ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
-{
- return (ahd_inb_scbram(ahd, offset)
- | (ahd_inb_scbram(ahd, offset+1) << 8));
-}
-
-static __inline uint32_t
-ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
-{
- return (ahd_inw_scbram(ahd, offset)
- | (ahd_inw_scbram(ahd, offset+2) << 16));
-}
-
-static __inline uint64_t
-ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
-{
- return (ahd_inl_scbram(ahd, offset)
- | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
-}
-
-static __inline struct scb *
-ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
-{
- struct scb* scb;
-
- if (tag >= AHD_SCB_MAX)
- return (NULL);
- scb = ahd->scb_data.scbindex[tag];
- if (scb != NULL)
- ahd_sync_scb(ahd, scb,
- BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
- return (scb);
-}
-
-static __inline void
-ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
-{
- struct hardware_scb *q_hscb;
- struct map_node *q_hscb_map;
- uint32_t saved_hscb_busaddr;
-
- /*
- * Our queuing method is a bit tricky. The card
- * knows in advance which HSCB (by address) to download,
- * and we can't disappoint it. To achieve this, the next
- * HSCB to download is saved off in ahd->next_queued_hscb.
- * When we are called to queue "an arbitrary scb",
- * we copy the contents of the incoming HSCB to the one
- * the sequencer knows about, swap HSCB pointers and
- * finally assign the SCB to the tag indexed location
- * in the scb_array. This makes sure that we can still
- * locate the correct SCB by SCB_TAG.
- */
- q_hscb = ahd->next_queued_hscb;
- q_hscb_map = ahd->next_queued_hscb_map;
- saved_hscb_busaddr = q_hscb->hscb_busaddr;
- memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
- q_hscb->hscb_busaddr = saved_hscb_busaddr;
- q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
-
- /* Now swap HSCB pointers. */
- ahd->next_queued_hscb = scb->hscb;
- ahd->next_queued_hscb_map = scb->hscb_map;
- scb->hscb = q_hscb;
- scb->hscb_map = q_hscb_map;
-
- /* Now define the mapping from tag to SCB in the scbindex */
- ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
-}
-
-/*
- * Tell the sequencer about a new transaction to execute.
- */
-static __inline void
-ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb)
-{
- ahd_swap_with_next_hscb(ahd, scb);
-
- if (SCBID_IS_NULL(SCB_GET_TAG(scb)))
- panic("Attempt to queue invalid SCB tag %x\n",
- SCB_GET_TAG(scb));
-
- /*
- * Keep a history of SCBs we've downloaded in the qinfifo.
- */
- ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
- ahd->qinfifonext++;
-
- if (scb->sg_count != 0)
- ahd_setup_data_scb(ahd, scb);
- else
- ahd_setup_noxfer_scb(ahd, scb);
- ahd_setup_scb_common(ahd, scb);
-
- /*
- * Make sure our data is consistent from the
- * perspective of the adapter.
- */
- ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
-#ifdef AHD_DEBUG
- if ((ahd_debug & AHD_SHOW_QUEUE) != 0) {
- uint64_t host_dataptr;
-
- host_dataptr = ahd_le64toh(scb->hscb->dataptr);
- printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
- ahd_name(ahd),
- SCB_GET_TAG(scb), scb->hscb->scsiid,
- ahd_le32toh(scb->hscb->hscb_busaddr),
- (u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
- (u_int)(host_dataptr & 0xFFFFFFFF),
- ahd_le32toh(scb->hscb->datacnt));
- }
#endif
- /* Tell the adapter about the newly queued SCB */
- ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
-}
static __inline uint8_t *
ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb)
{
@@ -800,152 +211,10 @@
return (scb->sense_busaddr);
}
/************************** Interrupt Processing ******************************/
-static __inline void ahd_sync_qoutfifo(struct ahd_softc *ahd, int op);
-static __inline void ahd_sync_tqinfifo(struct ahd_softc *ahd, int op);
-static __inline u_int ahd_check_cmdcmpltqueues(struct ahd_softc *ahd);
-static __inline int ahd_intr(struct ahd_softc *ahd);
-
-static __inline void
-ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
-{
- ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
- /*offset*/0,
- /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
-}
-
-static __inline void
-ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
-{
-#ifdef AHD_TARGET_MODE
- if ((ahd->flags & AHD_TARGETROLE) != 0) {
- ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
- ahd->shared_data_map.dmamap,
- ahd_targetcmd_offset(ahd, 0),
- sizeof(struct target_cmd) * AHD_TMODE_CMDS,
- op);
- }
-#endif
-}
-
-/*
- * See if the firmware has posted any completed commands
- * into our in-core command complete fifos.
- */
-#define AHD_RUN_QOUTFIFO 0x1
-#define AHD_RUN_TQINFIFO 0x2
-static __inline u_int
-ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
-{
- u_int retval;
-
- retval = 0;
- ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
- /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
- /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
- if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag
- == ahd->qoutfifonext_valid_tag)
- retval |= AHD_RUN_QOUTFIFO;
-#ifdef AHD_TARGET_MODE
- if ((ahd->flags & AHD_TARGETROLE) != 0
- && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
- ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
- ahd->shared_data_map.dmamap,
- ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
- /*len*/sizeof(struct target_cmd),
- BUS_DMASYNC_POSTREAD);
- if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0)
- retval |= AHD_RUN_TQINFIFO;
- }
-#endif
- return (retval);
-}
-
-/*
- * Catch an interrupt from the adapter
- */
-static __inline int
-ahd_intr(struct ahd_softc *ahd)
-{
- u_int intstat;
-
- if ((ahd->pause & INTEN) == 0) {
- /*
- * Our interrupt is not enabled on the chip
- * and may be disabled for re-entrancy reasons,
- * so just return. This is likely just a shared
- * interrupt.
- */
- return (0);
- }
-
- /*
- * Instead of directly reading the interrupt status register,
- * infer the cause of the interrupt by checking our in-core
- * completion queues. This avoids a costly PCI bus read in
- * most cases.
- */
- if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0
- && (ahd_check_cmdcmpltqueues(ahd) != 0))
- intstat = CMDCMPLT;
- else
- intstat = ahd_inb(ahd, INTSTAT);
-
- if ((intstat & INT_PEND) == 0)
- return (0);
-
- if (intstat & CMDCMPLT) {
- ahd_outb(ahd, CLRINT, CLRCMDINT);
-
- /*
- * Ensure that the chip sees that we've cleared
- * this interrupt before we walk the output fifo.
- * Otherwise, we may, due to posted bus writes,
- * clear the interrupt after we finish the scan,
- * and after the sequencer has added new entries
- * and asserted the interrupt again.
- */
- if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
- if (ahd_is_paused(ahd)) {
- /*
- * Potentially lost SEQINT.
- * If SEQINTCODE is non-zero,
- * simulate the SEQINT.
- */
- if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
- intstat |= SEQINT;
- }
- } else {
- ahd_flush_device_writes(ahd);
- }
- ahd_run_qoutfifo(ahd);
- ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++;
- ahd->cmdcmplt_total++;
-#ifdef AHD_TARGET_MODE
- if ((ahd->flags & AHD_TARGETROLE) != 0)
- ahd_run_tqinfifo(ahd, /*paused*/FALSE);
-#endif
- }
-
- /*
- * Handle statuses that may invalidate our cached
- * copy of INTSTAT separately.
- */
- if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) {
- /* Hot eject. Do nothing */
- } else if (intstat & HWERRINT) {
- ahd_handle_hwerrint(ahd);
- } else if ((intstat & (PCIINT|SPLTINT)) != 0) {
- ahd->bus_intr(ahd);
- } else {
-
- if ((intstat & SEQINT) != 0)
- ahd_handle_seqint(ahd, intstat);
-
- if ((intstat & SCSIINT) != 0)
- ahd_handle_scsiint(ahd, intstat);
- }
- return (1);
-}
+void ahd_sync_qoutfifo(struct ahd_softc *ahd, int op);
+void ahd_sync_tqinfifo(struct ahd_softc *ahd, int op);
+u_int ahd_check_cmdcmpltqueues(struct ahd_softc *ahd);
+int ahd_intr(struct ahd_softc *ahd);
#endif /* _AIC79XX_INLINE_H_ */
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic79xx_osm.c Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_osm.c Thu Apr 24 07:48:32 2008
@@ -368,12 +368,168 @@
static int ahd_linux_unit;
+/************************** OS Utility Wrappers *******************************/
+void ahd_delay(long);
+void
+ahd_delay(long usec)
+{
+ /*
+ * udelay on Linux can have problems for
+ * multi-millisecond waits. Wait at most
+ * 1024us per call.
+ */
+ while (usec > 0) {
+ udelay(usec % 1024);
+ usec -= 1024;
+ }
+}
+
+
+/***************************** Low Level I/O **********************************/
+uint8_t ahd_inb(struct ahd_softc * ahd, long port);
+uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
+void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
+void ahd_outw_atomic(struct ahd_softc * ahd,
+ long port, uint16_t val);
+void ahd_outsb(struct ahd_softc * ahd, long port,
+ uint8_t *, int count);
+void ahd_insb(struct ahd_softc * ahd, long port,
+ uint8_t *, int count);
+
+uint8_t
+ahd_inb(struct ahd_softc * ahd, long port)
+{
+ uint8_t x;
+
+ if (ahd->tags[0] == BUS_SPACE_MEMIO) {
+ x = readb(ahd->bshs[0].maddr + port);
+ } else {
+ x = inb(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
+ }
+ mb();
+ return (x);
+}
+
+uint16_t
+ahd_inw_atomic(struct ahd_softc * ahd, long port)
+{
+ uint8_t x;
+
+ if (ahd->tags[0] == BUS_SPACE_MEMIO) {
+ x = readw(ahd->bshs[0].maddr + port);
+ } else {
+ x = inw(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
+ }
+ mb();
+ return (x);
+}
+
+void
+ahd_outb(struct ahd_softc * ahd, long port, uint8_t val)
+{
+ if (ahd->tags[0] == BUS_SPACE_MEMIO) {
+ writeb(val, ahd->bshs[0].maddr + port);
+ } else {
+ outb(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
+ }
+ mb();
+}
+
+void
+ahd_outw_atomic(struct ahd_softc * ahd, long port, uint16_t val)
+{
+ if (ahd->tags[0] == BUS_SPACE_MEMIO) {
+ writew(val, ahd->bshs[0].maddr + port);
+ } else {
+ outw(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
+ }
+ mb();
+}
+
+void
+ahd_outsb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
+{
+ int i;
+
+ /*
+ * There is probably a more efficient way to do this on Linux
+ * but we don't use this for anything speed critical and this
+ * should work.
+ */
+ for (i = 0; i < count; i++)
+ ahd_outb(ahd, port, *array++);
+}
+
+void
+ahd_insb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
+{
+ int i;
+
+ /*
+ * There is probably a more efficient way to do this on Linux
+ * but we don't use this for anything speed critical and this
+ * should work.
+ */
+ for (i = 0; i < count; i++)
+ *array++ = ahd_inb(ahd, port);
+}
+
+/******************************* PCI Routines *********************************/
+uint32_t
+ahd_pci_read_config(ahd_dev_softc_t pci, int reg, int width)
+{
+ switch (width) {
+ case 1:
+ {
+ uint8_t retval;
+
+ pci_read_config_byte(pci, reg, &retval);
+ return (retval);
+ }
+ case 2:
+ {
+ uint16_t retval;
+ pci_read_config_word(pci, reg, &retval);
+ return (retval);
+ }
+ case 4:
+ {
+ uint32_t retval;
+ pci_read_config_dword(pci, reg, &retval);
+ return (retval);
+ }
+ default:
+ panic("ahd_pci_read_config: Read size too big");
+ /* NOTREACHED */
+ return (0);
+ }
+}
+
+void
+ahd_pci_write_config(ahd_dev_softc_t pci, int reg, uint32_t value, int width)
+{
+ switch (width) {
+ case 1:
+ pci_write_config_byte(pci, reg, value);
+ break;
+ case 2:
+ pci_write_config_word(pci, reg, value);
+ break;
+ case 4:
+ pci_write_config_dword(pci, reg, value);
+ break;
+ default:
+ panic("ahd_pci_write_config: Write size too big");
+ /* NOTREACHED */
+ }
+}
+
/****************************** Inlines ***************************************/
-static __inline void ahd_linux_unmap_scb(struct ahd_softc*, struct scb*);
+static void ahd_linux_unmap_scb(struct ahd_softc*, struct scb*);
-static __inline void
+static void
ahd_linux_unmap_scb(struct ahd_softc *ahd, struct scb *scb)
{
struct scsi_cmnd *cmd;
@@ -431,9 +587,9 @@
return rtn;
}
-static inline struct scsi_target **
+static struct scsi_target **
ahd_linux_target_in_softc(struct scsi_target *starget)
{
struct ahd_softc *ahd =
*((struct ahd_softc **)dev_to_shost(&starget->dev)->hostdata);
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic79xx_osm.h Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_osm.h Thu Apr 24 07:48:32 2008
@@ -221,25 +221,9 @@
/***************************** Timer Facilities *******************************/
#define ahd_timer_init init_timer
#define ahd_timer_stop del_timer_sync
-typedef void ahd_linux_callback_t (u_long);
-static __inline void ahd_timer_reset(ahd_timer_t *timer, int usec,
- ahd_callback_t *func, void *arg);
-static __inline void
-ahd_timer_reset(ahd_timer_t *timer, int usec, ahd_callback_t *func, void *arg)
-{
- struct ahd_softc *ahd;
-
- ahd = (struct ahd_softc *)arg;
- del_timer(timer);
- timer->data = (u_long)arg;
- timer->expires = jiffies + (usec * HZ)/1000000;
- timer->function = (ahd_linux_callback_t*)func;
- add_timer(timer);
-}
-
/***************************** SMP support ************************************/
#include <linux/spinlock.h>
#define AIC79XX_DRIVER_VERSION "3.0"
@@ -385,113 +369,21 @@
#define M_WAITOK 0
#define malloc(size, type, flags) kmalloc(size, flags)
#define free(ptr, type) kfree(ptr)
-static __inline void ahd_delay(long);
-static __inline void
-ahd_delay(long usec)
-{
- /*
- * udelay on Linux can have problems for
- * multi-millisecond waits. Wait at most
- * 1024us per call.
- */
- while (usec > 0) {
- udelay(usec % 1024);
- usec -= 1024;
- }
-}
+void ahd_delay(long);
-
/***************************** Low Level I/O **********************************/
-static __inline uint8_t ahd_inb(struct ahd_softc * ahd, long port);
-static __inline uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
-static __inline void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
-static __inline void ahd_outw_atomic(struct ahd_softc * ahd,
+uint8_t ahd_inb(struct ahd_softc * ahd, long port);
+uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
+void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
+void ahd_outw_atomic(struct ahd_softc * ahd,
long port, uint16_t val);
-static __inline void ahd_outsb(struct ahd_softc * ahd, long port,
+void ahd_outsb(struct ahd_softc * ahd, long port,
uint8_t *, int count);
-static __inline void ahd_insb(struct ahd_softc * ahd, long port,
+void ahd_insb(struct ahd_softc * ahd, long port,
uint8_t *, int count);
-static __inline uint8_t
-ahd_inb(struct ahd_softc * ahd, long port)
-{
- uint8_t x;
-
- if (ahd->tags[0] == BUS_SPACE_MEMIO) {
- x = readb(ahd->bshs[0].maddr + port);
- } else {
- x = inb(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
- }
- mb();
- return (x);
-}
-
-static __inline uint16_t
-ahd_inw_atomic(struct ahd_softc * ahd, long port)
-{
- uint8_t x;
-
- if (ahd->tags[0] == BUS_SPACE_MEMIO) {
- x = readw(ahd->bshs[0].maddr + port);
- } else {
- x = inw(ahd->bshs[(port) >> 8].ioport + ((port) & 0xFF));
- }
- mb();
- return (x);
-}
-
-static __inline void
-ahd_outb(struct ahd_softc * ahd, long port, uint8_t val)
-{
- if (ahd->tags[0] == BUS_SPACE_MEMIO) {
- writeb(val, ahd->bshs[0].maddr + port);
- } else {
- outb(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
- }
- mb();
-}
-
-static __inline void
-ahd_outw_atomic(struct ahd_softc * ahd, long port, uint16_t val)
-{
- if (ahd->tags[0] == BUS_SPACE_MEMIO) {
- writew(val, ahd->bshs[0].maddr + port);
- } else {
- outw(val, ahd->bshs[(port) >> 8].ioport + (port & 0xFF));
- }
- mb();
-}
-
-static __inline void
-ahd_outsb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
-{
- int i;
-
- /*
- * There is probably a more efficient way to do this on Linux
- * but we don't use this for anything speed critical and this
- * should work.
- */
- for (i = 0; i < count; i++)
- ahd_outb(ahd, port, *array++);
-}
-
-static __inline void
-ahd_insb(struct ahd_softc * ahd, long port, uint8_t *array, int count)
-{
- int i;
-
- /*
- * There is probably a more efficient way to do this on Linux
- * but we don't use this for anything speed critical and this
- * should work.
- */
- for (i = 0; i < count; i++)
- *array++ = ahd_inb(ahd, port);
-}
-
/**************************** Initialization **********************************/
int ahd_linux_register_host(struct ahd_softc *,
struct scsi_host_template *);
@@ -592,63 +484,13 @@
void ahd_linux_pci_exit(void);
int ahd_pci_map_registers(struct ahd_softc *ahd);
int ahd_pci_map_int(struct ahd_softc *ahd);
-static __inline uint32_t ahd_pci_read_config(ahd_dev_softc_t pci,
+uint32_t ahd_pci_read_config(ahd_dev_softc_t pci,
int reg, int width);
-
-static __inline uint32_t
-ahd_pci_read_config(ahd_dev_softc_t pci, int reg, int width)
-{
- switch (width) {
- case 1:
- {
- uint8_t retval;
-
- pci_read_config_byte(pci, reg, &retval);
- return (retval);
- }
- case 2:
- {
- uint16_t retval;
- pci_read_config_word(pci, reg, &retval);
- return (retval);
- }
- case 4:
- {
- uint32_t retval;
- pci_read_config_dword(pci, reg, &retval);
- return (retval);
- }
- default:
- panic("ahd_pci_read_config: Read size too big");
- /* NOTREACHED */
- return (0);
- }
-}
-
-static __inline void ahd_pci_write_config(ahd_dev_softc_t pci,
+void ahd_pci_write_config(ahd_dev_softc_t pci,
int reg, uint32_t value,
int width);
-
-static __inline void
-ahd_pci_write_config(ahd_dev_softc_t pci, int reg, uint32_t value, int width)
-{
- switch (width) {
- case 1:
- pci_write_config_byte(pci, reg, value);
- break;
- case 2:
- pci_write_config_word(pci, reg, value);
- break;
- case 4:
- pci_write_config_dword(pci, reg, value);
- break;
- default:
- panic("ahd_pci_write_config: Write size too big");
- /* NOTREACHED */
- }
-}
static __inline int ahd_get_pci_function(ahd_dev_softc_t);
static __inline int
ahd_get_pci_function(ahd_dev_softc_t pci)
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx.reg Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx.reg Thu Apr 24 07:48:32 2008
@@ -1435,9 +1435,9 @@
*/
KERNEL_TQINPOS {
size 1
}
- TQINPOS {
+ TQINPOS {
size 1
}
ARG_1 {
size 1
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx_core.c Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_core.c Thu Apr 24 07:48:32 2008
@@ -236,10 +236,514 @@
u_int targid_mask);
static int ahc_handle_target_cmd(struct ahc_softc *ahc,
struct target_cmd *cmd);
#endif
+
/************************* Sequencer Execution Control ************************/
/*
+ * Work around any chip bugs related to halting sequencer execution.
+ * On Ultra2 controllers, we must clear the CIOBUS stretch signal by
+ * reading a register that will set this signal and deassert it.
+ * Without this workaround, if the chip is paused, by an interrupt or
+ * manual pause while accessing scb ram, accesses to certain registers
+ * will hang the system (infinite pci retries).
+ */
+void
+ahc_pause_bug_fix(struct ahc_softc *ahc)
+{
+ if ((ahc->features & AHC_ULTRA2) != 0)
+ (void)ahc_inb(ahc, CCSCBCTL);
+}
+
+/*
+ * Determine whether the sequencer has halted code execution.
+ * Returns non-zero status if the sequencer is stopped.
+ */
+int
+ahc_is_paused(struct ahc_softc *ahc)
+{
+ return ((ahc_inb(ahc, HCNTRL) & PAUSE) != 0);
+}
+
+/*
+ * Request that the sequencer stop and wait, indefinitely, for it
+ * to stop. The sequencer will only acknowledge that it is paused
+ * once it has reached an instruction boundary and PAUSEDIS is
+ * cleared in the SEQCTL register. The sequencer may use PAUSEDIS
+ * for critical sections.
+ */
+void
+ahc_pause(struct ahc_softc *ahc)
+{
+ ahc_outb(ahc, HCNTRL, ahc->pause);
+
+ /*
+ * Since the sequencer can disable pausing in a critical section, we
+ * must loop until it actually stops.
+ */
+ while (ahc_is_paused(ahc) == 0)
+ ;
+
+ ahc_pause_bug_fix(ahc);
+}
+
+/*
+ * Allow the sequencer to continue program execution.
+ * We check here to ensure that no additional interrupt
+ * sources that would cause the sequencer to halt have been
+ * asserted. If, for example, a SCSI bus reset is detected
+ * while we are fielding a different, pausing, interrupt type,
+ * we don't want to release the sequencer before going back
+ * into our interrupt handler and dealing with this new
+ * condition.
+ */
+void
+ahc_unpause(struct ahc_softc *ahc)
+{
+ if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
+ ahc_outb(ahc, HCNTRL, ahc->unpause);
+}
+
+/************************** Memory mapping routines ***************************/
+struct ahc_dma_seg *
+ahc_sg_bus_to_virt(struct scb *scb, uint32_t sg_busaddr)
+{
+ int sg_index;
+
+ sg_index = (sg_busaddr - scb->sg_list_phys)/sizeof(struct ahc_dma_seg);
+ /* sg_list_phys points to entry 1, not 0 */
+ sg_index++;
+
+ return (&scb->sg_list[sg_index]);
+}
+
+uint32_t
+ahc_sg_virt_to_bus(struct scb *scb, struct ahc_dma_seg *sg)
+{
+ int sg_index;
+
+ /* sg_list_phys points to entry 1, not 0 */
+ sg_index = sg - &scb->sg_list[1];
+
+ return (scb->sg_list_phys + (sg_index * sizeof(*scb->sg_list)));
+}
+
+uint32_t
+ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index)
+{
+ return (ahc->scb_data->hscb_busaddr
+ + (sizeof(struct hardware_scb) * index));
+}
+
+void
+ahc_sync_scb(struct ahc_softc *ahc, struct scb *scb, int op)
+{
+ ahc_dmamap_sync(ahc, ahc->scb_data->hscb_dmat,
+ ahc->scb_data->hscb_dmamap,
+ /*offset*/(scb->hscb - ahc->hscbs) * sizeof(*scb->hscb),
+ /*len*/sizeof(*scb->hscb), op);
+}
+
+void
+ahc_sync_sglist(struct ahc_softc *ahc, struct scb *scb, int op)
+{
+ if (scb->sg_count == 0)
+ return;
+
+ ahc_dmamap_sync(ahc, ahc->scb_data->sg_dmat, scb->sg_map->sg_dmamap,
+ /*offset*/(scb->sg_list - scb->sg_map->sg_vaddr)
+ * sizeof(struct ahc_dma_seg),
+ /*len*/sizeof(struct ahc_dma_seg) * scb->sg_count, op);
+}
+
+uint32_t
+ahc_targetcmd_offset(struct ahc_softc *ahc, u_int index)
+{
+ return (((uint8_t *)&ahc->targetcmds[index]) - ahc->qoutfifo);
+}
+
+/*********************** Miscelaneous Support Functions ***********************/
+/*
+ * Determine whether the sequencer reported a residual
+ * for this SCB/transaction.
+ */
+void
+ahc_update_residual(struct ahc_softc *ahc, struct scb *scb)
+{
+ uint32_t sgptr;
+
+ sgptr = ahc_le32toh(scb->hscb->sgptr);
+ if ((sgptr & SG_RESID_VALID) != 0)
+ ahc_calc_residual(ahc, scb);
+}
+
+/*
+ * Return pointers to the transfer negotiation information
+ * for the specified our_id/remote_id pair.
+ */
+struct ahc_initiator_tinfo *
+ahc_fetch_transinfo(struct ahc_softc *ahc, char channel, u_int our_id,
+ u_int remote_id, struct ahc_tmode_tstate **tstate)
+{
+ /*
+ * Transfer data structures are stored from the perspective
+ * of the target role. Since the parameters for a connection
+ * in the initiator role to a given target are the same as
+ * when the roles are reversed, we pretend we are the target.
+ */
+ if (channel == 'B')
+ our_id += 8;
+ *tstate = ahc->enabled_targets[our_id];
+ return (&(*tstate)->transinfo[remote_id]);
+}
+
+uint16_t
+ahc_inw(struct ahc_softc *ahc, u_int port)
+{
+ uint16_t r = ahc_inb(ahc, port+1) << 8;
+ return r | ahc_inb(ahc, port);
+}
+
+void
+ahc_outw(struct ahc_softc *ahc, u_int port, u_int value)
+{
+ ahc_outb(ahc, port, value & 0xFF);
+ ahc_outb(ahc, port+1, (value >> 8) & 0xFF);
+}
+
+uint32_t
+ahc_inl(struct ahc_softc *ahc, u_int port)
+{
+ return ((ahc_inb(ahc, port))
+ | (ahc_inb(ahc, port+1) << 8)
+ | (ahc_inb(ahc, port+2) << 16)
+ | (ahc_inb(ahc, port+3) << 24));
+}
+
+void
+ahc_outl(struct ahc_softc *ahc, u_int port, uint32_t value)
+{
+ ahc_outb(ahc, port, (value) & 0xFF);
+ ahc_outb(ahc, port+1, ((value) >> 8) & 0xFF);
+ ahc_outb(ahc, port+2, ((value) >> 16) & 0xFF);
+ ahc_outb(ahc, port+3, ((value) >> 24) & 0xFF);
+}
+
+uint64_t
+ahc_inq(struct ahc_softc *ahc, u_int port)
+{
+ return ((ahc_inb(ahc, port))
+ | (ahc_inb(ahc, port+1) << 8)
+ | (ahc_inb(ahc, port+2) << 16)
+ | (ahc_inb(ahc, port+3) << 24)
+ | (((uint64_t)ahc_inb(ahc, port+4)) << 32)
+ | (((uint64_t)ahc_inb(ahc, port+5)) << 40)
+ | (((uint64_t)ahc_inb(ahc, port+6)) << 48)
+ | (((uint64_t)ahc_inb(ahc, port+7)) << 56));
+}
+
+void
+ahc_outq(struct ahc_softc *ahc, u_int port, uint64_t value)
+{
+ ahc_outb(ahc, port, value & 0xFF);
+ ahc_outb(ahc, port+1, (value >> 8) & 0xFF);
+ ahc_outb(ahc, port+2, (value >> 16) & 0xFF);
+ ahc_outb(ahc, port+3, (value >> 24) & 0xFF);
+ ahc_outb(ahc, port+4, (value >> 32) & 0xFF);
+ ahc_outb(ahc, port+5, (value >> 40) & 0xFF);
+ ahc_outb(ahc, port+6, (value >> 48) & 0xFF);
+ ahc_outb(ahc, port+7, (value >> 56) & 0xFF);
+}
+
+/*
+ * Get a free scb. If there are none, see if we can allocate a new SCB.
+ */
+struct scb *
+ahc_get_scb(struct ahc_softc *ahc)
+{
+ struct scb *scb;
+
+ if ((scb = SLIST_FIRST(&ahc->scb_data->free_scbs)) == NULL) {
+ ahc_alloc_scbs(ahc);
+ scb = SLIST_FIRST(&ahc->scb_data->free_scbs);
+ if (scb == NULL)
+ return (NULL);
+ }
+ SLIST_REMOVE_HEAD(&ahc->scb_data->free_scbs, links.sle);
+ return (scb);
+}
+
+/*
+ * Return an SCB resource to the free list.
+ */
+void
+ahc_free_scb(struct ahc_softc *ahc, struct scb *scb)
+{
+ struct hardware_scb *hscb;
+
+ hscb = scb->hscb;
+ /* Clean up for the next user */
+ ahc->scb_data->scbindex[hscb->tag] = NULL;
+ scb->flags = SCB_FREE;
+ hscb->control = 0;
+
+ SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs, scb, links.sle);
+
+ /* Notify the OSM that a resource is now available. */
+ ahc_platform_scb_free(ahc, scb);
+}
+
+struct scb *
+ahc_lookup_scb(struct ahc_softc *ahc, u_int tag)
+{
+ struct scb* scb;
+
+ scb = ahc->scb_data->scbindex[tag];
+ if (scb != NULL)
+ ahc_sync_scb(ahc, scb,
+ BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+ return (scb);
+}
+
+void
+ahc_swap_with_next_hscb(struct ahc_softc *ahc, struct scb *scb)
+{
+ struct hardware_scb *q_hscb;
+ u_int saved_tag;
+
+ /*
+ * Our queuing method is a bit tricky. The card
+ * knows in advance which HSCB to download, and we
+ * can't disappoint it. To achieve this, the next
+ * SCB to download is saved off in ahc->next_queued_scb.
+ * When we are called to queue "an arbitrary scb",
+ * we copy the contents of the incoming HSCB to the one
+ * the sequencer knows about, swap HSCB pointers and
+ * finally assign the SCB to the tag indexed location
+ * in the scb_array. This makes sure that we can still
+ * locate the correct SCB by SCB_TAG.
+ */
+ q_hscb = ahc->next_queued_scb->hscb;
+ saved_tag = q_hscb->tag;
+ memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
+ if ((scb->flags & SCB_CDB32_PTR) != 0) {
+ q_hscb->shared_data.cdb_ptr =
+ ahc_htole32(ahc_hscb_busaddr(ahc, q_hscb->tag)
+ + offsetof(struct hardware_scb, cdb32));
+ }
+ q_hscb->tag = saved_tag;
+ q_hscb->next = scb->hscb->tag;
+
+ /* Now swap HSCB pointers. */
+ ahc->next_queued_scb->hscb = scb->hscb;
+ scb->hscb = q_hscb;
+
+ /* Now define the mapping from tag to SCB in the scbindex */
+ ahc->scb_data->scbindex[scb->hscb->tag] = scb;
+}
+
+/*
+ * Tell the sequencer about a new transaction to execute.
+ */
+void
+ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb)
+{
+ ahc_swap_with_next_hscb(ahc, scb);
+
+ if (scb->hscb->tag == SCB_LIST_NULL
+ || scb->hscb->next == SCB_LIST_NULL)
+ panic("Attempt to queue invalid SCB tag %x:%x\n",
+ scb->hscb->tag, scb->hscb->next);
+
+ /*
+ * Setup data "oddness".
+ */
+ scb->hscb->lun &= LID;
+ if (ahc_get_transfer_length(scb) & 0x1)
+ scb->hscb->lun |= SCB_XFERLEN_ODD;
+
+ /*
+ * Keep a history of SCBs we've downloaded in the qinfifo.
+ */
+ ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
+
+ /*
+ * Make sure our data is consistent from the
+ * perspective of the adapter.
+ */
+ ahc_sync_scb(ahc, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+
+ /* Tell the adapter about the newly queued SCB */
+ if ((ahc->features & AHC_QUEUE_REGS) != 0) {
+ ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
+ } else {
+ if ((ahc->features & AHC_AUTOPAUSE) == 0)
+ ahc_pause(ahc);
+ ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
+ if ((ahc->features & AHC_AUTOPAUSE) == 0)
+ ahc_unpause(ahc);
+ }
+}
+
+struct scsi_sense_data *
+ahc_get_sense_buf(struct ahc_softc *ahc, struct scb *scb)
+{
+ int offset;
+
+ offset = scb - ahc->scb_data->scbarray;
+ return (&ahc->scb_data->sense[offset]);
+}
+
+uint32_t
+ahc_get_sense_bufaddr(struct ahc_softc *ahc, struct scb *scb)
+{
+ int offset;
+
+ offset = scb - ahc->scb_data->scbarray;
+ return (ahc->scb_data->sense_busaddr
+ + (offset * sizeof(struct scsi_sense_data)));
+}
+
+/************************** Interrupt Processing ******************************/
+void
+ahc_sync_qoutfifo(struct ahc_softc *ahc, int op)
+{
+ ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
+ /*offset*/0, /*len*/256, op);
+}
+
+void
+ahc_sync_tqinfifo(struct ahc_softc *ahc, int op)
+{
+#ifdef AHC_TARGET_MODE
+ if ((ahc->flags & AHC_TARGETROLE) != 0) {
+ ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
+ ahc->shared_data_dmamap,
+ ahc_targetcmd_offset(ahc, 0),
+ sizeof(struct target_cmd) * AHC_TMODE_CMDS,
+ op);
+ }
+#endif
+}
+
+/*
+ * See if the firmware has posted any completed commands
+ * into our in-core command complete fifos.
+ */
+#define AHC_RUN_QOUTFIFO 0x1
+#define AHC_RUN_TQINFIFO 0x2
+u_int
+ahc_check_cmdcmpltqueues(struct ahc_softc *ahc)
+{
+ u_int retval;
+
+ retval = 0;
+ ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
+ /*offset*/ahc->qoutfifonext, /*len*/1,
+ BUS_DMASYNC_POSTREAD);
+ if (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL)
+ retval |= AHC_RUN_QOUTFIFO;
+#ifdef AHC_TARGET_MODE
+ if ((ahc->flags & AHC_TARGETROLE) != 0
+ && (ahc->flags & AHC_TQINFIFO_BLOCKED) == 0) {
+ ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
+ ahc->shared_data_dmamap,
+ ahc_targetcmd_offset(ahc, ahc->tqinfifofnext),
+ /*len*/sizeof(struct target_cmd),
+ BUS_DMASYNC_POSTREAD);
+ if (ahc->targetcmds[ahc->tqinfifonext].cmd_valid != 0)
+ retval |= AHC_RUN_TQINFIFO;
+ }
+#endif
+ return (retval);
+}
+
+/*
+ * Catch an interrupt from the adapter
+ */
+int
+ahc_intr(struct ahc_softc *ahc)
+{
+ u_int intstat;
+
+ if ((ahc->pause & INTEN) == 0) {
+ /*
+ * Our interrupt is not enabled on the chip
+ * and may be disabled for re-entrancy reasons,
+ * so just return. This is likely just a shared
+ * interrupt.
+ */
+ return (0);
+ }
+ /*
+ * Instead of directly reading the interrupt status register,
+ * infer the cause of the interrupt by checking our in-core
+ * completion queues. This avoids a costly PCI bus read in
+ * most cases.
+ */
+ if ((ahc->flags & (AHC_ALL_INTERRUPTS|AHC_EDGE_INTERRUPT)) == 0
+ && (ahc_check_cmdcmpltqueues(ahc) != 0))
+ intstat = CMDCMPLT;
+ else {
+ intstat = ahc_inb(ahc, INTSTAT);
+ }
+
+ if ((intstat & INT_PEND) == 0) {
+#if AHC_PCI_CONFIG > 0
+ if (ahc->unsolicited_ints > 500) {
+ ahc->unsolicited_ints = 0;
+ if ((ahc->chip & AHC_PCI) != 0
+ && (ahc_inb(ahc, ERROR) & PCIERRSTAT) != 0)
+ ahc->bus_intr(ahc);
+ }
+#endif
+ ahc->unsolicited_ints++;
+ return (0);
+ }
+ ahc->unsolicited_ints = 0;
+
+ if (intstat & CMDCMPLT) {
+ ahc_outb(ahc, CLRINT, CLRCMDINT);
+
+ /*
+ * Ensure that the chip sees that we've cleared
+ * this interrupt before we walk the output fifo.
+ * Otherwise, we may, due to posted bus writes,
+ * clear the interrupt after we finish the scan,
+ * and after the sequencer has added new entries
+ * and asserted the interrupt again.
+ */
+ ahc_flush_device_writes(ahc);
+ ahc_run_qoutfifo(ahc);
+#ifdef AHC_TARGET_MODE
+ if ((ahc->flags & AHC_TARGETROLE) != 0)
+ ahc_run_tqinfifo(ahc, /*paused*/FALSE);
+#endif
+ }
+
+ /*
+ * Handle statuses that may invalidate our cached
+ * copy of INTSTAT separately.
+ */
+ if (intstat == 0xFF && (ahc->features & AHC_REMOVABLE) != 0) {
+ /* Hot eject. Do nothing */
+ } else if (intstat & BRKADRINT) {
+ ahc_handle_brkadrint(ahc);
+ } else if ((intstat & (SEQINT|SCSIINT)) != 0) {
+
+ ahc_pause_bug_fix(ahc);
+
+ if ((intstat & SEQINT) != 0)
+ ahc_handle_seqint(ahc, intstat);
+
+ if ((intstat & SCSIINT) != 0)
+ ahc_handle_scsiint(ahc, intstat);
+ }
+ return (1);
+}
+
+/************************* Sequencer Execution Control ************************/
+/*
* Restart the sequencer program from address zero
*/
void
ahc_restart(struct ahc_softc *ahc)
@@ -2654,9 +3158,9 @@
* Manual message loop handler.
*/
static void
ahc_handle_message_phase(struct ahc_softc *ahc)
-{
+{
struct ahc_devinfo devinfo;
u_int bus_phase;
int end_session;
@@ -5706,9 +6210,9 @@
* scb that follows the one that we remove.
*/
static u_int
ahc_rem_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev)
-{
+{
u_int curscb, next;
/*
* Select the SCB we want to abort and
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx_inline.h Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_inline.h Thu Apr 24 07:48:32 2008
@@ -45,77 +45,13 @@
#ifndef _AIC7XXX_INLINE_H_
#define _AIC7XXX_INLINE_H_
/************************* Sequencer Execution Control ************************/
-static __inline void ahc_pause_bug_fix(struct ahc_softc *ahc);
-static __inline int ahc_is_paused(struct ahc_softc *ahc);
-static __inline void ahc_pause(struct ahc_softc *ahc);
-static __inline void ahc_unpause(struct ahc_softc *ahc);
+void ahc_pause_bug_fix(struct ahc_softc *ahc);
+int ahc_is_paused(struct ahc_softc *ahc);
+void ahc_pause(struct ahc_softc *ahc);
+void ahc_unpause(struct ahc_softc *ahc);
-/*
- * Work around any chip bugs related to halting sequencer execution.
- * On Ultra2 controllers, we must clear the CIOBUS stretch signal by
- * reading a register that will set this signal and deassert it.
- * Without this workaround, if the chip is paused, by an interrupt or
- * manual pause while accessing scb ram, accesses to certain registers
- * will hang the system (infinite pci retries).
- */
-static __inline void
-ahc_pause_bug_fix(struct ahc_softc *ahc)
-{
- if ((ahc->features & AHC_ULTRA2) != 0)
- (void)ahc_inb(ahc, CCSCBCTL);
-}
-
-/*
- * Determine whether the sequencer has halted code execution.
- * Returns non-zero status if the sequencer is stopped.
- */
-static __inline int
-ahc_is_paused(struct ahc_softc *ahc)
-{
- return ((ahc_inb(ahc, HCNTRL) & PAUSE) != 0);
-}
-
-/*
- * Request that the sequencer stop and wait, indefinitely, for it
- * to stop. The sequencer will only acknowledge that it is paused
- * once it has reached an instruction boundary and PAUSEDIS is
- * cleared in the SEQCTL register. The sequencer may use PAUSEDIS
- * for critical sections.
- */
-static __inline void
-ahc_pause(struct ahc_softc *ahc)
-{
- ahc_outb(ahc, HCNTRL, ahc->pause);
-
- /*
- * Since the sequencer can disable pausing in a critical section, we
- * must loop until it actually stops.
- */
- while (ahc_is_paused(ahc) == 0)
- ;
-
- ahc_pause_bug_fix(ahc);
-}
-
-/*
- * Allow the sequencer to continue program execution.
- * We check here to ensure that no additional interrupt
- * sources that would cause the sequencer to halt have been
- * asserted. If, for example, a SCSI bus reset is detected
- * while we are fielding a different, pausing, interrupt type,
- * we don't want to release the sequencer before going back
- * into our interrupt handler and dealing with this new
- * condition.
- */
-static __inline void
-ahc_unpause(struct ahc_softc *ahc)
-{
- if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
- ahc_outb(ahc, HCNTRL, ahc->unpause);
-}
-
/*********************** Untagged Transaction Routines ************************/
static __inline void ahc_freeze_untagged_queues(struct ahc_softc *ahc);
static __inline void ahc_release_untagged_queues(struct ahc_softc *ahc);
@@ -146,81 +82,24 @@
}
}
/************************** Memory mapping routines ***************************/
-static __inline struct ahc_dma_seg *
- ahc_sg_bus_to_virt(struct scb *scb,
- uint32_t sg_busaddr);
-static __inline uint32_t
- ahc_sg_virt_to_bus(struct scb *scb,
- struct ahc_dma_seg *sg);
-static __inline uint32_t
- ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index);
-static __inline void ahc_sync_scb(struct ahc_softc *ahc,
- struct scb *scb, int op);
-static __inline void ahc_sync_sglist(struct ahc_softc *ahc,
- struct scb *scb, int op);
-static __inline uint32_t
- ahc_targetcmd_offset(struct ahc_softc *ahc,
- u_int index);
+struct ahc_dma_seg *
+ ahc_sg_bus_to_virt(struct scb *scb,
+ uint32_t sg_busaddr);
+uint32_t
+ ahc_sg_virt_to_bus(struct scb *scb,
+ struct ahc_dma_seg *sg);
+uint32_t
+ ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index);
+void ahc_sync_scb(struct ahc_softc *ahc,
+ struct scb *scb, int op);
+void ahc_sync_sglist(struct ahc_softc *ahc,
+ struct scb *scb, int op);
+uint32_t
+ ahc_targetcmd_offset(struct ahc_softc *ahc,
+ u_int index);
-static __inline struct ahc_dma_seg *
-ahc_sg_bus_to_virt(struct scb *scb, uint32_t sg_busaddr)
-{
- int sg_index;
-
- sg_index = (sg_busaddr - scb->sg_list_phys)/sizeof(struct ahc_dma_seg);
- /* sg_list_phys points to entry 1, not 0 */
- sg_index++;
-
- return (&scb->sg_list[sg_index]);
-}
-
-static __inline uint32_t
-ahc_sg_virt_to_bus(struct scb *scb, struct ahc_dma_seg *sg)
-{
- int sg_index;
-
- /* sg_list_phys points to entry 1, not 0 */
- sg_index = sg - &scb->sg_list[1];
-
- return (scb->sg_list_phys + (sg_index * sizeof(*scb->sg_list)));
-}
-
-static __inline uint32_t
-ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index)
-{
- return (ahc->scb_data->hscb_busaddr
- + (sizeof(struct hardware_scb) * index));
-}
-
-static __inline void
-ahc_sync_scb(struct ahc_softc *ahc, struct scb *scb, int op)
-{
- ahc_dmamap_sync(ahc, ahc->scb_data->hscb_dmat,
- ahc->scb_data->hscb_dmamap,
- /*offset*/(scb->hscb - ahc->hscbs) * sizeof(*scb->hscb),
- /*len*/sizeof(*scb->hscb), op);
-}
-
-static __inline void
-ahc_sync_sglist(struct ahc_softc *ahc, struct scb *scb, int op)
-{
- if (scb->sg_count == 0)
- return;
-
- ahc_dmamap_sync(ahc, ahc->scb_data->sg_dmat, scb->sg_map->sg_dmamap,
- /*offset*/(scb->sg_list - scb->sg_map->sg_vaddr)
- * sizeof(struct ahc_dma_seg),
- /*len*/sizeof(struct ahc_dma_seg) * scb->sg_count, op);
-}
-
-static __inline uint32_t
-ahc_targetcmd_offset(struct ahc_softc *ahc, u_int index)
-{
- return (((uint8_t *)&ahc->targetcmds[index]) - ahc->qoutfifo);
-}
-
/******************************** Debugging ***********************************/
static __inline char *ahc_name(struct ahc_softc *ahc);
static __inline char *
@@ -230,421 +109,45 @@
}
/*********************** Miscellaneous Support Functions ***********************/
-static __inline void ahc_update_residual(struct ahc_softc *ahc,
- struct scb *scb);
-static __inline struct ahc_initiator_tinfo *
- ahc_fetch_transinfo(struct ahc_softc *ahc,
- char channel, u_int our_id,
- u_int remote_id,
- struct ahc_tmode_tstate **tstate);
-static __inline uint16_t
- ahc_inw(struct ahc_softc *ahc, u_int port);
-static __inline void ahc_outw(struct ahc_softc *ahc, u_int port,
- u_int value);
-static __inline uint32_t
- ahc_inl(struct ahc_softc *ahc, u_int port);
-static __inline void ahc_outl(struct ahc_softc *ahc, u_int port,
- uint32_t value);
-static __inline uint64_t
- ahc_inq(struct ahc_softc *ahc, u_int port);
-static __inline void ahc_outq(struct ahc_softc *ahc, u_int port,
- uint64_t value);
-static __inline struct scb*
- ahc_get_scb(struct ahc_softc *ahc);
-static __inline void ahc_free_scb(struct ahc_softc *ahc, struct scb *scb);
-static __inline void ahc_swap_with_next_hscb(struct ahc_softc *ahc,
- struct scb *scb);
-static __inline void ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb);
-static __inline struct scsi_sense_data *
- ahc_get_sense_buf(struct ahc_softc *ahc,
- struct scb *scb);
-static __inline uint32_t
- ahc_get_sense_bufaddr(struct ahc_softc *ahc,
- struct scb *scb);
+void ahc_update_residual(struct ahc_softc *ahc,
+ struct scb *scb);
+struct ahc_initiator_tinfo *
+ ahc_fetch_transinfo(struct ahc_softc *ahc,
+ char channel, u_int our_id,
+ u_int remote_id,
+ struct ahc_tmode_tstate **tstate);
+uint16_t
+ ahc_inw(struct ahc_softc *ahc, u_int port);
+void ahc_outw(struct ahc_softc *ahc, u_int port,
+ u_int value);
+uint32_t
+ ahc_inl(struct ahc_softc *ahc, u_int port);
+void ahc_outl(struct ahc_softc *ahc, u_int port,
+ uint32_t value);
+uint64_t
+ ahc_inq(struct ahc_softc *ahc, u_int port);
+void ahc_outq(struct ahc_softc *ahc, u_int port,
+ uint64_t value);
+struct scb*
+ ahc_get_scb(struct ahc_softc *ahc);
+void ahc_free_scb(struct ahc_softc *ahc, struct scb *scb);
+struct scb *
+ ahc_lookup_scb(struct ahc_softc *ahc, u_int tag);
+void ahc_swap_with_next_hscb(struct ahc_softc *ahc,
+ struct scb *scb);
+void ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb);
+struct scsi_sense_data *
+ ahc_get_sense_buf(struct ahc_softc *ahc,
+ struct scb *scb);
+uint32_t
+ ahc_get_sense_bufaddr(struct ahc_softc *ahc,
+ struct scb *scb);
-/*
- * Determine whether the sequencer reported a residual
- * for this SCB/transaction.
- */
-static __inline void
-ahc_update_residual(struct ahc_softc *ahc, struct scb *scb)
-{
- uint32_t sgptr;
-
- sgptr = ahc_le32toh(scb->hscb->sgptr);
- if ((sgptr & SG_RESID_VALID) != 0)
- ahc_calc_residual(ahc, scb);
-}
-
-/*
- * Return pointers to the transfer negotiation information
- * for the specified our_id/remote_id pair.
- */
-static __inline struct ahc_initiator_tinfo *
-ahc_fetch_transinfo(struct ahc_softc *ahc, char channel, u_int our_id,
- u_int remote_id, struct ahc_tmode_tstate **tstate)
-{
- /*
- * Transfer data structures are stored from the perspective
- * of the target role. Since the parameters for a connection
- * in the initiator role to a given target are the same as
- * when the roles are reversed, we pretend we are the target.
- */
- if (channel == 'B')
- our_id += 8;
- *tstate = ahc->enabled_targets[our_id];
- return (&(*tstate)->transinfo[remote_id]);
-}
-
-static __inline uint16_t
-ahc_inw(struct ahc_softc *ahc, u_int port)
-{
- uint16_t r = ahc_inb(ahc, port+1) << 8;
- return r | ahc_inb(ahc, port);
-}
-
-static __inline void
-ahc_outw(struct ahc_softc *ahc, u_int port, u_int value)
-{
- ahc_outb(ahc, port, value & 0xFF);
- ahc_outb(ahc, port+1, (value >> 8) & 0xFF);
-}
-
-static __inline uint32_t
-ahc_inl(struct ahc_softc *ahc, u_int port)
-{
- return ((ahc_inb(ahc, port))
- | (ahc_inb(ahc, port+1) << 8)
- | (ahc_inb(ahc, port+2) << 16)
- | (ahc_inb(ahc, port+3) << 24));
-}
-
-static __inline void
-ahc_outl(struct ahc_softc *ahc, u_int port, uint32_t value)
-{
- ahc_outb(ahc, port, (value) & 0xFF);
- ahc_outb(ahc, port+1, ((value) >> 8) & 0xFF);
- ahc_outb(ahc, port+2, ((value) >> 16) & 0xFF);
- ahc_outb(ahc, port+3, ((value) >> 24) & 0xFF);
-}
-
-static __inline uint64_t
-ahc_inq(struct ahc_softc *ahc, u_int port)
-{
- return ((ahc_inb(ahc, port))
- | (ahc_inb(ahc, port+1) << 8)
- | (ahc_inb(ahc, port+2) << 16)
- | (ahc_inb(ahc, port+3) << 24)
- | (((uint64_t)ahc_inb(ahc, port+4)) << 32)
- | (((uint64_t)ahc_inb(ahc, port+5)) << 40)
- | (((uint64_t)ahc_inb(ahc, port+6)) << 48)
- | (((uint64_t)ahc_inb(ahc, port+7)) << 56));
-}
-
-static __inline void
-ahc_outq(struct ahc_softc *ahc, u_int port, uint64_t value)
-{
- ahc_outb(ahc, port, value & 0xFF);
- ahc_outb(ahc, port+1, (value >> 8) & 0xFF);
- ahc_outb(ahc, port+2, (value >> 16) & 0xFF);
- ahc_outb(ahc, port+3, (value >> 24) & 0xFF);
- ahc_outb(ahc, port+4, (value >> 32) & 0xFF);
- ahc_outb(ahc, port+5, (value >> 40) & 0xFF);
- ahc_outb(ahc, port+6, (value >> 48) & 0xFF);
- ahc_outb(ahc, port+7, (value >> 56) & 0xFF);
-}
-
-/*
- * Get a free scb. If there are none, see if we can allocate a new SCB.
- */
-static __inline struct scb *
-ahc_get_scb(struct ahc_softc *ahc)
-{
- struct scb *scb;
-
- if ((scb = SLIST_FIRST(&ahc->scb_data->free_scbs)) == NULL) {
- ahc_alloc_scbs(ahc);
- scb = SLIST_FIRST(&ahc->scb_data->free_scbs);
- if (scb == NULL)
- return (NULL);
- }
- SLIST_REMOVE_HEAD(&ahc->scb_data->free_scbs, links.sle);
- return (scb);
-}
-
-/*
- * Return an SCB resource to the free list.
- */
-static __inline void
-ahc_free_scb(struct ahc_softc *ahc, struct scb *scb)
-{
- struct hardware_scb *hscb;
-
- hscb = scb->hscb;
- /* Clean up for the next user */
- ahc->scb_data->scbindex[hscb->tag] = NULL;
- scb->flags = SCB_FREE;
- hscb->control = 0;
-
- SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs, scb, links.sle);
-
- /* Notify the OSM that a resource is now available. */
- ahc_platform_scb_free(ahc, scb);
-}
-
-static __inline struct scb *
-ahc_lookup_scb(struct ahc_softc *ahc, u_int tag)
-{
- struct scb* scb;
-
- scb = ahc->scb_data->scbindex[tag];
- if (scb != NULL)
- ahc_sync_scb(ahc, scb,
- BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
- return (scb);
-}
-
-static __inline void
-ahc_swap_with_next_hscb(struct ahc_softc *ahc, struct scb *scb)
-{
- struct hardware_scb *q_hscb;
- u_int saved_tag;
-
- /*
- * Our queuing method is a bit tricky. The card
- * knows in advance which HSCB to download, and we
- * can't disappoint it. To achieve this, the next
- * SCB to download is saved off in ahc->next_queued_scb.
- * When we are called to queue "an arbitrary scb",
- * we copy the contents of the incoming HSCB to the one
- * the sequencer knows about, swap HSCB pointers and
- * finally assign the SCB to the tag indexed location
- * in the scb_array. This makes sure that we can still
- * locate the correct SCB by SCB_TAG.
- */
- q_hscb = ahc->next_queued_scb->hscb;
- saved_tag = q_hscb->tag;
- memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
- if ((scb->flags & SCB_CDB32_PTR) != 0) {
- q_hscb->shared_data.cdb_ptr =
- ahc_htole32(ahc_hscb_busaddr(ahc, q_hscb->tag)
- + offsetof(struct hardware_scb, cdb32));
- }
- q_hscb->tag = saved_tag;
- q_hscb->next = scb->hscb->tag;
-
- /* Now swap HSCB pointers. */
- ahc->next_queued_scb->hscb = scb->hscb;
- scb->hscb = q_hscb;
-
- /* Now define the mapping from tag to SCB in the scbindex */
- ahc->scb_data->scbindex[scb->hscb->tag] = scb;
-}
-
-/*
- * Tell the sequencer about a new transaction to execute.
- */
-static __inline void
-ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb)
-{
- ahc_swap_with_next_hscb(ahc, scb);
-
- if (scb->hscb->tag == SCB_LIST_NULL
- || scb->hscb->next == SCB_LIST_NULL)
- panic("Attempt to queue invalid SCB tag %x:%x\n",
- scb->hscb->tag, scb->hscb->next);
-
- /*
- * Setup data "oddness".
- */
- scb->hscb->lun &= LID;
- if (ahc_get_transfer_length(scb) & 0x1)
- scb->hscb->lun |= SCB_XFERLEN_ODD;
-
- /*
- * Keep a history of SCBs we've downloaded in the qinfifo.
- */
- ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
-
- /*
- * Make sure our data is consistent from the
- * perspective of the adapter.
- */
- ahc_sync_scb(ahc, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
-
- /* Tell the adapter about the newly queued SCB */
- if ((ahc->features & AHC_QUEUE_REGS) != 0) {
- ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
- } else {
- if ((ahc->features & AHC_AUTOPAUSE) == 0)
- ahc_pause(ahc);
- ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
- if ((ahc->features & AHC_AUTOPAUSE) == 0)
- ahc_unpause(ahc);
- }
-}
-
-static __inline struct scsi_sense_data *
-ahc_get_sense_buf(struct ahc_softc *ahc, struct scb *scb)
-{
- int offset;
-
- offset = scb - ahc->scb_data->scbarray;
- return (&ahc->scb_data->sense[offset]);
-}
-
-static __inline uint32_t
-ahc_get_sense_bufaddr(struct ahc_softc *ahc, struct scb *scb)
-{
- int offset;
-
- offset = scb - ahc->scb_data->scbarray;
- return (ahc->scb_data->sense_busaddr
- + (offset * sizeof(struct scsi_sense_data)));
-}
-
/************************** Interrupt Processing ******************************/
-static __inline void ahc_sync_qoutfifo(struct ahc_softc *ahc, int op);
-static __inline void ahc_sync_tqinfifo(struct ahc_softc *ahc, int op);
-static __inline u_int ahc_check_cmdcmpltqueues(struct ahc_softc *ahc);
-static __inline int ahc_intr(struct ahc_softc *ahc);
-
-static __inline void
-ahc_sync_qoutfifo(struct ahc_softc *ahc, int op)
-{
- ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
- /*offset*/0, /*len*/256, op);
-}
-
-static __inline void
-ahc_sync_tqinfifo(struct ahc_softc *ahc, int op)
-{
-#ifdef AHC_TARGET_MODE
- if ((ahc->flags & AHC_TARGETROLE) != 0) {
- ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
- ahc->shared_data_dmamap,
- ahc_targetcmd_offset(ahc, 0),
- sizeof(struct target_cmd) * AHC_TMODE_CMDS,
- op);
- }
-#endif
-}
-
-/*
- * See if the firmware has posted any completed commands
- * into our in-core command complete fifos.
- */
-#define AHC_RUN_QOUTFIFO 0x1
-#define AHC_RUN_TQINFIFO 0x2
-static __inline u_int
-ahc_check_cmdcmpltqueues(struct ahc_softc *ahc)
-{
- u_int retval;
-
- retval = 0;
- ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
- /*offset*/ahc->qoutfifonext, /*len*/1,
- BUS_DMASYNC_POSTREAD);
- if (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL)
- retval |= AHC_RUN_QOUTFIFO;
-#ifdef AHC_TARGET_MODE
- if ((ahc->flags & AHC_TARGETROLE) != 0
- && (ahc->flags & AHC_TQINFIFO_BLOCKED) == 0) {
- ahc_dmamap_sync(ahc, ahc->shared_data_dmat,
- ahc->shared_data_dmamap,
- ahc_targetcmd_offset(ahc, ahc->tqinfifofnext),
- /*len*/sizeof(struct target_cmd),
- BUS_DMASYNC_POSTREAD);
- if (ahc->targetcmds[ahc->tqinfifonext].cmd_valid != 0)
- retval |= AHC_RUN_TQINFIFO;
- }
-#endif
- return (retval);
-}
-
-/*
- * Catch an interrupt from the adapter
- */
-static __inline int
-ahc_intr(struct ahc_softc *ahc)
-{
- u_int intstat;
-
- if ((ahc->pause & INTEN) == 0) {
- /*
- * Our interrupt is not enabled on the chip
- * and may be disabled for re-entrancy reasons,
- * so just return. This is likely just a shared
- * interrupt.
- */
- return (0);
- }
- /*
- * Instead of directly reading the interrupt status register,
- * infer the cause of the interrupt by checking our in-core
- * completion queues. This avoids a costly PCI bus read in
- * most cases.
- */
- if ((ahc->flags & (AHC_ALL_INTERRUPTS|AHC_EDGE_INTERRUPT)) == 0
- && (ahc_check_cmdcmpltqueues(ahc) != 0))
- intstat = CMDCMPLT;
- else {
- intstat = ahc_inb(ahc, INTSTAT);
- }
-
- if ((intstat & INT_PEND) == 0) {
-#if AHC_PCI_CONFIG > 0
- if (ahc->unsolicited_ints > 500) {
- ahc->unsolicited_ints = 0;
- if ((ahc->chip & AHC_PCI) != 0
- && (ahc_inb(ahc, ERROR) & PCIERRSTAT) != 0)
- ahc->bus_intr(ahc);
- }
-#endif
- ahc->unsolicited_ints++;
- return (0);
- }
- ahc->unsolicited_ints = 0;
-
- if (intstat & CMDCMPLT) {
- ahc_outb(ahc, CLRINT, CLRCMDINT);
-
- /*
- * Ensure that the chip sees that we've cleared
- * this interrupt before we walk the output fifo.
- * Otherwise, we may, due to posted bus writes,
- * clear the interrupt after we finish the scan,
- * and after the sequencer has added new entries
- * and asserted the interrupt again.
- */
- ahc_flush_device_writes(ahc);
- ahc_run_qoutfifo(ahc);
-#ifdef AHC_TARGET_MODE
- if ((ahc->flags & AHC_TARGETROLE) != 0)
- ahc_run_tqinfifo(ahc, /*paused*/FALSE);
-#endif
- }
-
- /*
- * Handle statuses that may invalidate our cached
- * copy of INTSTAT separately.
- */
- if (intstat == 0xFF && (ahc->features & AHC_REMOVABLE) != 0) {
- /* Hot eject. Do nothing */
- } else if (intstat & BRKADRINT) {
- ahc_handle_brkadrint(ahc);
- } else if ((intstat & (SEQINT|SCSIINT)) != 0) {
-
- ahc_pause_bug_fix(ahc);
-
- if ((intstat & SEQINT) != 0)
- ahc_handle_seqint(ahc, intstat);
-
- if ((intstat & SCSIINT) != 0)
- ahc_handle_scsiint(ahc, intstat);
- }
- return (1);
-}
+void ahc_sync_qoutfifo(struct ahc_softc *ahc, int op);
+void ahc_sync_tqinfifo(struct ahc_softc *ahc, int op);
+u_int ahc_check_cmdcmpltqueues(struct ahc_softc *ahc);
+int ahc_intr(struct ahc_softc *ahc);
#endif /* _AIC7XXX_INLINE_H_ */
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx_osm.c Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_osm.c Thu Apr 24 07:48:32 2008
@@ -387,16 +387,85 @@
static int ahc_linux_unit;
+/************************** OS Utility Wrappers *******************************/
+void
+ahc_delay(long usec)
+{
+ /*
+ * udelay on Linux can have problems for
+ * multi-millisecond waits. Wait at most
+ * 1024us per call.
+ */
+ while (usec > 0) {
+ udelay(usec % 1024);
+ usec -= 1024;
+ }
+}
+
+/***************************** Low Level I/O **********************************/
+uint8_t
+ahc_inb(struct ahc_softc * ahc, long port)
+{
+ uint8_t x;
+
+ if (ahc->tag == BUS_SPACE_MEMIO) {
+ x = readb(ahc->bsh.maddr + port);
+ } else {
+ x = inb(ahc->bsh.ioport + port);
+ }
+ mb();
+ return (x);
+}
+
+void
+ahc_outb(struct ahc_softc * ahc, long port, uint8_t val)
+{
+ if (ahc->tag == BUS_SPACE_MEMIO) {
+ writeb(val, ahc->bsh.maddr + port);
+ } else {
+ outb(val, ahc->bsh.ioport + port);
+ }
+ mb();
+}
+
+void
+ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
+{
+ int i;
+
+ /*
+ * There is probably a more efficient way to do this on Linux
+ * but we don't use this for anything speed critical and this
+ * should work.
+ */
+ for (i = 0; i < count; i++)
+ ahc_outb(ahc, port, *array++);
+}
+
+void
+ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
+{
+ int i;
+
+ /*
+ * There is probably a more efficient way to do this on Linux
+ * but we don't use this for anything speed critical and this
+ * should work.
+ */
+ for (i = 0; i < count; i++)
+ *array++ = ahc_inb(ahc, port);
+}
+
/********************************* Inlines ************************************/
-static __inline void ahc_linux_unmap_scb(struct ahc_softc*, struct scb*);
+static void ahc_linux_unmap_scb(struct ahc_softc*, struct scb*);
-static __inline int ahc_linux_map_seg(struct ahc_softc *ahc, struct scb *scb,
+static int ahc_linux_map_seg(struct ahc_softc *ahc, struct scb *scb,
struct ahc_dma_seg *sg,
dma_addr_t addr, bus_size_t len);
-static __inline void
+static void
ahc_linux_unmap_scb(struct ahc_softc *ahc, struct scb *scb)
{
struct scsi_cmnd *cmd;
@@ -405,9 +474,9 @@
scsi_dma_unmap(cmd);
}
-static __inline int
+static int
ahc_linux_map_seg(struct ahc_softc *ahc, struct scb *scb,
struct ahc_dma_seg *sg, dma_addr_t addr, bus_size_t len)
{
int consumed;
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx_osm.h Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_osm.h Thu Apr 24 07:48:32 2008
@@ -374,85 +374,19 @@
#define M_WAITOK 0
#define malloc(size, type, flags) kmalloc(size, flags)
#define free(ptr, type) kfree(ptr)
-static __inline void ahc_delay(long);
-static __inline void
-ahc_delay(long usec)
-{
- /*
- * udelay on Linux can have problems for
- * multi-millisecond waits. Wait at most
- * 1024us per call.
- */
- while (usec > 0) {
- udelay(usec % 1024);
- usec -= 1024;
- }
-}
+void ahc_delay(long);
/***************************** Low Level I/O **********************************/
-static __inline uint8_t ahc_inb(struct ahc_softc * ahc, long port);
-static __inline void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
-static __inline void ahc_outsb(struct ahc_softc * ahc, long port,
- uint8_t *, int count);
-static __inline void ahc_insb(struct ahc_softc * ahc, long port,
- uint8_t *, int count);
+uint8_t ahc_inb(struct ahc_softc * ahc, long port);
+void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val);
+void ahc_outsb(struct ahc_softc * ahc, long port,
+ uint8_t *, int count);
+void ahc_insb(struct ahc_softc * ahc, long port,
+ uint8_t *, int count);
-static __inline uint8_t
-ahc_inb(struct ahc_softc * ahc, long port)
-{
- uint8_t x;
-
- if (ahc->tag == BUS_SPACE_MEMIO) {
- x = readb(ahc->bsh.maddr + port);
- } else {
- x = inb(ahc->bsh.ioport + port);
- }
- mb();
- return (x);
-}
-
-static __inline void
-ahc_outb(struct ahc_softc * ahc, long port, uint8_t val)
-{
- if (ahc->tag == BUS_SPACE_MEMIO) {
- writeb(val, ahc->bsh.maddr + port);
- } else {
- outb(val, ahc->bsh.ioport + port);
- }
- mb();
-}
-
-static __inline void
-ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
-{
- int i;
-
- /*
- * There is probably a more efficient way to do this on Linux
- * but we don't use this for anything speed critical and this
- * should work.
- */
- for (i = 0; i < count; i++)
- ahc_outb(ahc, port, *array++);
-}
-
-static __inline void
-ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count)
-{
- int i;
-
- /*
- * There is probably a more efficient way to do this on Linux
- * but we don't use this for anything speed critical and this
- * should work.
- */
- for (i = 0; i < count; i++)
- *array++ = ahc_inb(ahc, port);
-}
-
/**************************** Initialization **********************************/
int ahc_linux_register_host(struct ahc_softc *,
struct scsi_host_template *);
@@ -554,63 +488,14 @@
void ahc_linux_pci_exit(void);
int ahc_pci_map_registers(struct ahc_softc *ahc);
int ahc_pci_map_int(struct ahc_softc *ahc);
-static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
+uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
int reg, int width);
-static __inline uint32_t
-ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
-{
- switch (width) {
- case 1:
- {
- uint8_t retval;
-
- pci_read_config_byte(pci, reg, &retval);
- return (retval);
- }
- case 2:
- {
- uint16_t retval;
- pci_read_config_word(pci, reg, &retval);
- return (retval);
- }
- case 4:
- {
- uint32_t retval;
- pci_read_config_dword(pci, reg, &retval);
- return (retval);
- }
- default:
- panic("ahc_pci_read_config: Read size too big");
- /* NOTREACHED */
- return (0);
- }
-}
-
-static __inline void ahc_pci_write_config(ahc_dev_softc_t pci,
- int reg, uint32_t value,
- int width);
-
-static __inline void
-ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
-{
- switch (width) {
- case 1:
- pci_write_config_byte(pci, reg, value);
- break;
- case 2:
- pci_write_config_word(pci, reg, value);
- break;
- case 4:
- pci_write_config_dword(pci, reg, value);
- break;
- default:
- panic("ahc_pci_write_config: Write size too big");
- /* NOTREACHED */
- }
-}
+void ahc_pci_write_config(ahc_dev_softc_t pci,
+ int reg, uint32_t value,
+ int width);
static __inline int ahc_get_pci_function(ahc_dev_softc_t);
static __inline int
ahc_get_pci_function(ahc_dev_softc_t pci)
--- scsi-misc-2.6-2008_04_15.org/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c Tue Apr 15 20:50:42 2008
+++ scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c Thu Apr 24 07:48:32 2008
@@ -268,8 +268,59 @@
ahc_linux_register_host(ahc, &aic7xxx_driver_template);
return (0);
}
+/******************************* PCI Routines *********************************/
+uint32_t
+ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
+{
+ switch (width) {
+ case 1:
+ {
+ uint8_t retval;
+
+ pci_read_config_byte(pci, reg, &retval);
+ return (retval);
+ }
+ case 2:
+ {
+ uint16_t retval;
+ pci_read_config_word(pci, reg, &retval);
+ return (retval);
+ }
+ case 4:
+ {
+ uint32_t retval;
+ pci_read_config_dword(pci, reg, &retval);
+ return (retval);
+ }
+ default:
+ panic("ahc_pci_read_config: Read size too big");
+ /* NOTREACHED */
+ return (0);
+ }
+}
+
+void
+ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
+{
+ switch (width) {
+ case 1:
+ pci_write_config_byte(pci, reg, value);
+ break;
+ case 2:
+ pci_write_config_word(pci, reg, value);
+ break;
+ case 4:
+ pci_write_config_dword(pci, reg, value);
+ break;
+ default:
+ panic("ahc_pci_write_config: Write size too big");
+ /* NOTREACHED */
+ }
+}
+
+
static struct pci_driver aic7xxx_pci_driver = {
.name = "aic7xxx",
.probe = ahc_linux_pci_dev_probe,
#ifdef CONFIG_PM
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 2/5] aic7xxx: add static
2008-04-25 2:32 [PATCH 1/5] aic7xxx: deinline large or slow functions Denys Vlasenko
@ 2008-04-25 2:34 ` Denys Vlasenko
2008-04-25 2:36 ` [PATCH 3/5] aic7xxx: add const Denys Vlasenko
2008-04-25 12:46 ` [PATCH 2/5] aic7xxx: add static Hannes Reinecke
2008-04-25 6:28 ` [PATCH 1/5] aic7xxx: deinline large or slow functions Hannes Reinecke
2008-04-27 13:41 ` James Bottomley
2 siblings, 2 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-25 2:34 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 138 bytes --]
This patch adds static (and sometimes const) keywords where appropriate.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
--
vda
[-- Attachment #2: aic_debloat_2.diff --]
[-- Type: text/x-diff, Size: 43759 bytes --]
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx.h Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx.h Thu Apr 24 07:51:53 2008
@@ -1313,17 +1313,17 @@
struct ahd_pci_identity {
uint64_t full_id;
uint64_t id_mask;
- char *name;
+ const char *name;
ahd_device_setup_t *setup;
};
/***************************** VL/EISA Declarations ***************************/
struct aic7770_identity {
uint32_t full_id;
uint32_t id_mask;
- char *name;
+ const char *name;
ahd_device_setup_t *setup;
};
extern struct aic7770_identity aic7770_ident_table [];
extern const int ahd_num_aic7770_devs;
@@ -1332,9 +1332,8 @@
#define AHD_EISA_IOSIZE 0x100
/*************************** Function Declarations ****************************/
/******************************************************************************/
-void ahd_reset_cmds_pending(struct ahd_softc *ahd);
/***************************** PCI Front End *********************************/
struct ahd_pci_identity *ahd_find_pci_device(ahd_dev_softc_t);
int ahd_pci_config(struct ahd_softc *,
@@ -1375,18 +1374,8 @@
u_int addr, u_int value);
int ahd_read_flexport(struct ahd_softc *ahd, u_int addr,
uint8_t *value);
-/*************************** Interrupt Services *******************************/
-void ahd_run_qoutfifo(struct ahd_softc *ahd);
-#ifdef AHD_TARGET_MODE
-void ahd_run_tqinfifo(struct ahd_softc *ahd, int paused);
-#endif
-void ahd_handle_hwerrint(struct ahd_softc *ahd);
-void ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat);
-void ahd_handle_scsiint(struct ahd_softc *ahd,
- u_int intstat);
-
/***************************** Error Recovery *********************************/
typedef enum {
SEARCH_COMPLETE,
SEARCH_COUNT,
@@ -1478,9 +1467,9 @@
#endif
void ahd_print_devinfo(struct ahd_softc *ahd,
struct ahd_devinfo *devinfo);
void ahd_dump_card_state(struct ahd_softc *ahd);
-int ahd_print_register(ahd_reg_parse_entry_t *table,
+int ahd_print_register(const ahd_reg_parse_entry_t *table,
u_int num_entries,
const char *name,
u_int address,
u_int value,
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_core.c Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_core.c Thu Apr 24 07:51:53 2008
@@ -265,8 +265,20 @@
static int ahd_match_scb(struct ahd_softc *ahd, struct scb *scb,
int target, char channel, int lun,
u_int tag, role_t role);
+static void ahd_reset_cmds_pending(struct ahd_softc *ahd);
+
+/*************************** Interrupt Services *******************************/
+static void ahd_run_qoutfifo(struct ahd_softc *ahd);
+#ifdef AHD_TARGET_MODE
+static void ahd_run_tqinfifo(struct ahd_softc *ahd, int paused);
+#endif
+static void ahd_handle_hwerrint(struct ahd_softc *ahd);
+static void ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat);
+static void ahd_handle_scsiint(struct ahd_softc *ahd,
+ u_int intstat);
+
/************************ Sequencer Execution Control *************************/
void
ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
{
@@ -284,9 +296,9 @@
ahd->src_mode = src;
ahd->dst_mode = dst;
}
-void
+static void
ahd_update_modes(struct ahd_softc *ahd)
{
ahd_mode_state mode_ptr;
ahd_mode src;
@@ -300,9 +312,9 @@
ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
ahd_known_modes(ahd, src, dst);
}
-void
+static void
ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
ahd_mode dstmode, const char *file, int line)
{
#ifdef AHD_DEBUG
@@ -421,9 +433,9 @@
return (sg + 1);
}
}
-void
+static void
ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
{
/* XXX Handle target mode SCBs. */
scb->crc_retry_count = 0;
@@ -442,9 +454,9 @@
scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
ahd_htole32(scb->sense_busaddr);
}
-void
+static void
ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
{
/*
* Copy the first SG into the "current" data ponter area.
@@ -479,18 +491,18 @@
*/
scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
}
-void
+static void
ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
{
scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL);
scb->hscb->dataptr = 0;
scb->hscb->datacnt = 0;
}
/************************** Memory mapping routines ***************************/
-void *
+static void *
ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
{
dma_addr_t sg_offset;
@@ -498,9 +510,9 @@
sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
return ((uint8_t *)scb->sg_list + sg_offset);
}
-uint32_t
+static uint32_t
ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
{
dma_addr_t sg_offset;
@@ -510,9 +522,9 @@
return (scb->sg_list_busaddr + sg_offset);
}
-void
+static void
ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
{
ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat,
scb->hscb_map->dmamap,
@@ -531,23 +543,25 @@
/*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
/*len*/ahd_sg_size(ahd) * scb->sg_count, op);
}
-void
+static void
ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
{
ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat,
scb->sense_map->dmamap,
/*offset*/scb->sense_busaddr,
/*len*/AHD_SENSE_BUFSIZE, op);
}
-uint32_t
+#ifdef AHD_TARGET_MODE
+static uint32_t
ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
{
return (((uint8_t *)&ahd->targetcmds[index])
- (uint8_t *)ahd->qoutfifo);
}
+#endif
/*********************** Miscelaneous Support Functions ***********************/
/*
* Return pointers to the transfer negotiation information
@@ -652,33 +666,37 @@
ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
}
-u_int
+#if 0 /* unused */
+static u_int
ahd_get_hnscb_qoff(struct ahd_softc *ahd)
{
return (ahd_inw_atomic(ahd, HNSCB_QOFF));
}
+#endif
-void
+static void
ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
{
ahd_outw_atomic(ahd, HNSCB_QOFF, value);
}
-u_int
+#if 0 /* unused */
+static u_int
ahd_get_hescb_qoff(struct ahd_softc *ahd)
{
return (ahd_inb(ahd, HESCB_QOFF));
}
+#endif
-void
+static void
ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
{
ahd_outb(ahd, HESCB_QOFF, value);
}
-u_int
+static u_int
ahd_get_snscb_qoff(struct ahd_softc *ahd)
{
u_int oldvalue;
@@ -687,37 +705,41 @@
ahd_outw(ahd, SNSCB_QOFF, oldvalue);
return (oldvalue);
}
-void
+static void
ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
{
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outw(ahd, SNSCB_QOFF, value);
}
-u_int
+#if 0 /* unused */
+static u_int
ahd_get_sescb_qoff(struct ahd_softc *ahd)
{
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
return (ahd_inb(ahd, SESCB_QOFF));
}
+#endif
-void
+static void
ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
{
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outb(ahd, SESCB_QOFF, value);
}
-u_int
+#if 0 /* unused */
+static u_int
ahd_get_sdscb_qoff(struct ahd_softc *ahd)
{
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
}
+#endif
-void
+static void
ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
{
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
@@ -755,16 +777,16 @@
return (ahd_inb_scbram(ahd, offset)
| (ahd_inb_scbram(ahd, offset+1) << 8));
}
-uint32_t
+static uint32_t
ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
{
return (ahd_inw_scbram(ahd, offset)
| (ahd_inw_scbram(ahd, offset+2) << 16));
}
-uint64_t
+static uint64_t
ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
{
return (ahd_inl_scbram(ahd, offset)
| ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
@@ -783,9 +805,9 @@
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
return (scb);
}
-void
+static void
ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
{
struct hardware_scb *q_hscb;
struct map_node *q_hscb_map;
@@ -868,17 +890,17 @@
ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
}
/************************** Interrupt Processing ******************************/
-void
+static void
ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
{
ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
/*offset*/0,
/*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
}
-void
+static void
ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
{
#ifdef AHD_TARGET_MODE
if ((ahd->flags & AHD_TARGETROLE) != 0) {
@@ -896,9 +918,9 @@
* into our in-core command complete fifos.
*/
#define AHD_RUN_QOUTFIFO 0x1
#define AHD_RUN_TQINFIFO 0x2
-u_int
+static u_int
ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
{
u_int retval;
@@ -1639,9 +1661,9 @@
* occurred with no errors and no residual. sg_status is
* a copy of the first byte (little endian) of the sgptr
* hscb field.
*/
-void
+static void
ahd_run_qoutfifo(struct ahd_softc *ahd)
{
struct ahd_completion *completion;
struct scb *scb;
@@ -1678,9 +1700,9 @@
ahd->flags &= ~AHD_RUNNING_QOUTFIFO;
}
/************************* Interrupt Handling *********************************/
-void
+static void
ahd_handle_hwerrint(struct ahd_softc *ahd)
{
/*
* Some catastrophic hardware error has occurred.
@@ -1752,9 +1774,9 @@
}
}
#endif /* AHD_DEBUG */
-void
+static void
ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat)
{
u_int seqintcode;
@@ -2364,9 +2386,9 @@
*/
ahd_unpause(ahd);
}
-void
+static void
ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
{
struct scb *scb;
u_int status0;
@@ -8130,9 +8152,9 @@
return (wrap_qinfifonext
+ ARRAY_SIZE(ahd->qinfifo) - wrap_qinpos);
}
-void
+static void
ahd_reset_cmds_pending(struct ahd_softc *ahd)
{
struct scb *scb;
ahd_mode_state saved_modes;
@@ -9655,9 +9677,9 @@
return (last_probe);
}
int
-ahd_print_register(ahd_reg_parse_entry_t *table, u_int num_entries,
+ahd_print_register(const ahd_reg_parse_entry_t *table, u_int num_entries,
const char *name, u_int address, u_int value,
u_int *cur_column, u_int wrap_point)
{
int printed;
@@ -10646,9 +10668,9 @@
ahd_outb(ahd, SCSIID, scsiid);
#endif
}
-void
+static void
ahd_run_tqinfifo(struct ahd_softc *ahd, int paused)
{
struct target_cmd *cmd;
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_inline.h Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_inline.h Thu Apr 24 07:51:53 2008
@@ -65,12 +65,8 @@
ahd_mode *src, ahd_mode *dst);
void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src,
ahd_mode dst);
-void ahd_update_modes(struct ahd_softc *ahd);
-void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
- ahd_mode dstmode, const char *file,
- int line);
ahd_mode_state ahd_save_modes(struct ahd_softc *ahd);
void ahd_restore_modes(struct ahd_softc *ahd,
ahd_mode_state state);
int ahd_is_paused(struct ahd_softc *ahd);
@@ -103,35 +99,14 @@
/*********************** Scatter Gather List Handling *************************/
void *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
void *sgptr, dma_addr_t addr,
bus_size_t len, int last);
-void ahd_setup_scb_common(struct ahd_softc *ahd,
- struct scb *scb);
-void ahd_setup_data_scb(struct ahd_softc *ahd,
- struct scb *scb);
-void ahd_setup_noxfer_scb(struct ahd_softc *ahd,
- struct scb *scb);
/************************** Memory mapping routines ***************************/
static __inline size_t ahd_sg_size(struct ahd_softc *ahd);
-void *
- ahd_sg_bus_to_virt(struct ahd_softc *ahd,
- struct scb *scb,
- uint32_t sg_busaddr);
-uint32_t
- ahd_sg_virt_to_bus(struct ahd_softc *ahd,
- struct scb *scb,
- void *sg);
-void ahd_sync_scb(struct ahd_softc *ahd,
- struct scb *scb, int op);
void ahd_sync_sglist(struct ahd_softc *ahd,
struct scb *scb, int op);
-void ahd_sync_sense(struct ahd_softc *ahd,
- struct scb *scb, int op);
-uint32_t
- ahd_targetcmd_offset(struct ahd_softc *ahd,
- u_int index);
static __inline size_t
ahd_sg_size(struct ahd_softc *ahd)
{
@@ -159,28 +134,12 @@
void ahd_outq(struct ahd_softc *ahd, u_int port,
uint64_t value);
u_int ahd_get_scbptr(struct ahd_softc *ahd);
void ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr);
-u_int ahd_get_hnscb_qoff(struct ahd_softc *ahd);
-void ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value);
-u_int ahd_get_hescb_qoff(struct ahd_softc *ahd);
-void ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value);
-u_int ahd_get_snscb_qoff(struct ahd_softc *ahd);
-void ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value);
-u_int ahd_get_sescb_qoff(struct ahd_softc *ahd);
-void ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value);
-u_int ahd_get_sdscb_qoff(struct ahd_softc *ahd);
-void ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value);
u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
-uint32_t
- ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
-uint64_t
- ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
struct scb *
ahd_lookup_scb(struct ahd_softc *ahd, u_int tag);
-void ahd_swap_with_next_hscb(struct ahd_softc *ahd,
- struct scb *scb);
void ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb);
static __inline uint8_t *
ahd_get_sense_buf(struct ahd_softc *ahd,
@@ -211,10 +170,7 @@
return (scb->sense_busaddr);
}
/************************** Interrupt Processing ******************************/
-void ahd_sync_qoutfifo(struct ahd_softc *ahd, int op);
-void ahd_sync_tqinfifo(struct ahd_softc *ahd, int op);
-u_int ahd_check_cmdcmpltqueues(struct ahd_softc *ahd);
int ahd_intr(struct ahd_softc *ahd);
#endif /* _AIC79XX_INLINE_H_ */
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_osm.c Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_osm.c Thu Apr 24 07:51:53 2008
@@ -387,9 +387,8 @@
/***************************** Low Level I/O **********************************/
uint8_t ahd_inb(struct ahd_softc * ahd, long port);
-uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
void ahd_outw_atomic(struct ahd_softc * ahd,
long port, uint16_t val);
void ahd_outsb(struct ahd_softc * ahd, long port,
@@ -410,9 +409,10 @@
mb();
return (x);
}
-uint16_t
+#if 0 /* unused */
+static uint16_t
ahd_inw_atomic(struct ahd_softc * ahd, long port)
{
uint8_t x;
@@ -423,8 +423,9 @@
}
mb();
return (x);
}
+#endif
void
ahd_outb(struct ahd_softc * ahd, long port, uint8_t val)
{
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_osm.h Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_osm.h Thu Apr 24 07:51:53 2008
@@ -373,9 +373,8 @@
void ahd_delay(long);
/***************************** Low Level I/O **********************************/
uint8_t ahd_inb(struct ahd_softc * ahd, long port);
-uint16_t ahd_inw_atomic(struct ahd_softc * ahd, long port);
void ahd_outb(struct ahd_softc * ahd, long port, uint8_t val);
void ahd_outw_atomic(struct ahd_softc * ahd,
long port, uint16_t val);
void ahd_outsb(struct ahd_softc * ahd, long port,
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic79xx_pci.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_pci.c Thu Apr 24 07:51:53 2008
@@ -96,9 +96,9 @@
static ahd_device_setup_t ahd_aic7901A_setup;
static ahd_device_setup_t ahd_aic7902_setup;
static ahd_device_setup_t ahd_aic790X_setup;
-static struct ahd_pci_identity ahd_pci_ident_table [] =
+static struct ahd_pci_identity ahd_pci_ident_table[] =
{
/* aic7901 based controllers */
{
ID_AHA_29320A,
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx.h Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx.h Thu Apr 24 07:51:53 2008
@@ -735,9 +735,9 @@
#define ULTRA_SXFR 0x100 /* Rate Requires Ultra Mode set */
#define ST_SXFR 0x010 /* Rate Single Transition Only */
#define DT_SXFR 0x040 /* Rate Double Transition Only */
uint8_t period; /* Period to send to SCSI target */
- char *rate;
+ const char *rate;
};
/* Safe and valid period for async negotiations. */
#define AHC_ASYNC_XFER_PERIOD 0x45
@@ -1132,12 +1132,8 @@
#define AHC_EISA_IOSIZE 0x100
/*************************** Function Declarations ****************************/
/******************************************************************************/
-u_int ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl);
-void ahc_unbusy_tcl(struct ahc_softc *ahc, u_int tcl);
-void ahc_busy_tcl(struct ahc_softc *ahc,
- u_int tcl, u_int busyid);
/***************************** PCI Front End *********************************/
struct ahc_pci_identity *ahc_find_pci_device(ahc_dev_softc_t);
int ahc_pci_config(struct ahc_softc *,
@@ -1154,11 +1150,8 @@
u_int port);
/************************** SCB and SCB queue management **********************/
int ahc_probe_scbs(struct ahc_softc *);
-void ahc_run_untagged_queues(struct ahc_softc *ahc);
-void ahc_run_untagged_queue(struct ahc_softc *ahc,
- struct scb_tailq *queue);
void ahc_qinfifo_requeue_tail(struct ahc_softc *ahc,
struct scb *scb);
int ahc_match_scb(struct ahc_softc *ahc, struct scb *scb,
int target, char channel, int lun,
@@ -1177,25 +1170,11 @@
int ahc_resume(struct ahc_softc *ahc);
#endif
void ahc_set_unit(struct ahc_softc *, int);
void ahc_set_name(struct ahc_softc *, char *);
-void ahc_alloc_scbs(struct ahc_softc *ahc);
void ahc_free(struct ahc_softc *ahc);
int ahc_reset(struct ahc_softc *ahc, int reinit);
-void ahc_shutdown(void *arg);
-/*************************** Interrupt Services *******************************/
-void ahc_clear_intstat(struct ahc_softc *ahc);
-void ahc_run_qoutfifo(struct ahc_softc *ahc);
-#ifdef AHC_TARGET_MODE
-void ahc_run_tqinfifo(struct ahc_softc *ahc, int paused);
-#endif
-void ahc_handle_brkadrint(struct ahc_softc *ahc);
-void ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat);
-void ahc_handle_scsiint(struct ahc_softc *ahc,
- u_int intstat);
-void ahc_clear_critical_section(struct ahc_softc *ahc);
-
/***************************** Error Recovery *********************************/
typedef enum {
SEARCH_COMPLETE,
SEARCH_COUNT,
@@ -1213,38 +1192,21 @@
int ahc_search_disc_list(struct ahc_softc *ahc, int target,
char channel, int lun, u_int tag,
int stop_on_first, int remove,
int save_state);
-void ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
int ahc_reset_channel(struct ahc_softc *ahc, char channel,
int initiate_reset);
-int ahc_abort_scbs(struct ahc_softc *ahc, int target,
- char channel, int lun, u_int tag,
- role_t role, uint32_t status);
-void ahc_restart(struct ahc_softc *ahc);
-void ahc_calc_residual(struct ahc_softc *ahc,
- struct scb *scb);
+
/*************************** Utility Functions ********************************/
-struct ahc_phase_table_entry*
- ahc_lookup_phase_entry(int phase);
void ahc_compile_devinfo(struct ahc_devinfo *devinfo,
u_int our_id, u_int target,
u_int lun, char channel,
role_t role);
/************************** Transfer Negotiation ******************************/
-struct ahc_syncrate* ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
+const struct ahc_syncrate* ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
u_int *ppr_options, u_int maxsync);
u_int ahc_find_period(struct ahc_softc *ahc,
u_int scsirate, u_int maxsync);
-void ahc_validate_offset(struct ahc_softc *ahc,
- struct ahc_initiator_tinfo *tinfo,
- struct ahc_syncrate *syncrate,
- u_int *offset, int wide,
- role_t role);
-void ahc_validate_width(struct ahc_softc *ahc,
- struct ahc_initiator_tinfo *tinfo,
- u_int *bus_width,
- role_t role);
/*
* Negotiation types. These are used to qualify if we should renegotiate
* even if our goal and current transport parameters are identical.
*/
@@ -1262,9 +1224,9 @@
struct ahc_devinfo *devinfo,
u_int width, u_int type, int paused);
void ahc_set_syncrate(struct ahc_softc *ahc,
struct ahc_devinfo *devinfo,
- struct ahc_syncrate *syncrate,
+ const struct ahc_syncrate *syncrate,
u_int period, u_int offset,
u_int ppr_options,
u_int type, int paused);
typedef enum {
@@ -1304,13 +1266,12 @@
#define AHC_SHOW_TQIN 0x0800
#define AHC_SHOW_MASKED_ERRORS 0x1000
#define AHC_DEBUG_SEQUENCER 0x2000
#endif
-void ahc_print_scb(struct scb *scb);
void ahc_print_devinfo(struct ahc_softc *ahc,
struct ahc_devinfo *dev);
void ahc_dump_card_state(struct ahc_softc *ahc);
-int ahc_print_register(ahc_reg_parse_entry_t *table,
+int ahc_print_register(const ahc_reg_parse_entry_t *table,
u_int num_entries,
const char *name,
u_int address,
u_int value,
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_core.c Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_core.c Thu Apr 24 07:51:53 2008
@@ -50,10 +50,9 @@
#include <dev/aic7xxx/aicasm/aicasm_insformat.h>
#endif
/***************************** Lookup Tables **********************************/
-char *ahc_chip_names[] =
-{
+static const char *const ahc_chip_names[] = {
"NONE",
"aic7770",
"aic7850",
"aic7855",
@@ -74,12 +73,12 @@
* Hardware error codes.
*/
struct ahc_hard_error_entry {
uint8_t errno;
- char *errmesg;
+ const char *errmesg;
};
-static struct ahc_hard_error_entry ahc_hard_errors[] = {
+static const struct ahc_hard_error_entry ahc_hard_errors[] = {
{ ILLHADDR, "Illegal Host Access" },
{ ILLSADDR, "Illegal Sequencer Address referrenced" },
{ ILLOPCODE, "Illegal Opcode in sequencer program" },
{ SQPARERR, "Sequencer Parity Error" },
@@ -89,9 +88,9 @@
{ CIOPARERR, "CIOBUS Parity Error" },
};
static const u_int num_errors = ARRAY_SIZE(ahc_hard_errors);
-static struct ahc_phase_table_entry ahc_phase_table[] =
+static const struct ahc_phase_table_entry ahc_phase_table[] =
{
{ P_DATAOUT, MSG_NOOP, "in Data-out phase" },
{ P_DATAIN, MSG_INITIATOR_DET_ERR, "in Data-in phase" },
{ P_DATAOUT_DT, MSG_NOOP, "in DT Data-out phase" },
@@ -114,9 +113,9 @@
* Valid SCSIRATE values. (p. 3-17)
* Provides a mapping of tranfer periods in ns to the proper value to
* stick in the scsixfer reg.
*/
-static struct ahc_syncrate ahc_syncrates[] =
+static const struct ahc_syncrate ahc_syncrates[] =
{
/* ultra2 fast/ultra period rate */
{ 0x42, 0x000, 9, "80.0" },
{ 0x03, 0x000, 10, "40.0" },
@@ -147,9 +146,9 @@
#ifdef AHC_TARGET_MODE
static void ahc_free_tstate(struct ahc_softc *ahc,
u_int scsi_id, char channel, int force);
#endif
-static struct ahc_syncrate*
+static const struct ahc_syncrate*
ahc_devlimited_syncrate(struct ahc_softc *ahc,
struct ahc_initiator_tinfo *,
u_int *period,
u_int *ppr_options,
@@ -203,11 +202,11 @@
struct scb *scb);
#endif
static bus_dmamap_callback_t ahc_dmamap_cb;
-static void ahc_build_free_scb_list(struct ahc_softc *ahc);
-static int ahc_init_scbdata(struct ahc_softc *ahc);
-static void ahc_fini_scbdata(struct ahc_softc *ahc);
+static void ahc_build_free_scb_list(struct ahc_softc *ahc);
+static int ahc_init_scbdata(struct ahc_softc *ahc);
+static void ahc_fini_scbdata(struct ahc_softc *ahc);
static void ahc_qinfifo_requeue(struct ahc_softc *ahc,
struct scb *prev_scb,
struct scb *scb);
static int ahc_qinfifo_count(struct ahc_softc *ahc);
@@ -237,8 +236,73 @@
static int ahc_handle_target_cmd(struct ahc_softc *ahc,
struct target_cmd *cmd);
#endif
+static u_int ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl);
+static void ahc_unbusy_tcl(struct ahc_softc *ahc, u_int tcl);
+static void ahc_busy_tcl(struct ahc_softc *ahc,
+ u_int tcl, u_int busyid);
+
+/************************** SCB and SCB queue management **********************/
+static void ahc_run_untagged_queues(struct ahc_softc *ahc);
+static void ahc_run_untagged_queue(struct ahc_softc *ahc,
+ struct scb_tailq *queue);
+
+/****************************** Initialization ********************************/
+static void ahc_alloc_scbs(struct ahc_softc *ahc);
+static void ahc_shutdown(void *arg);
+
+/*************************** Interrupt Services *******************************/
+static void ahc_clear_intstat(struct ahc_softc *ahc);
+static void ahc_run_qoutfifo(struct ahc_softc *ahc);
+#ifdef AHC_TARGET_MODE
+static void ahc_run_tqinfifo(struct ahc_softc *ahc, int paused);
+#endif
+static void ahc_handle_brkadrint(struct ahc_softc *ahc);
+static void ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat);
+static void ahc_handle_scsiint(struct ahc_softc *ahc,
+ u_int intstat);
+static void ahc_clear_critical_section(struct ahc_softc *ahc);
+
+/***************************** Error Recovery *********************************/
+static void ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
+static int ahc_abort_scbs(struct ahc_softc *ahc, int target,
+ char channel, int lun, u_int tag,
+ role_t role, uint32_t status);
+static void ahc_calc_residual(struct ahc_softc *ahc,
+ struct scb *scb);
+
+/*********************** Untagged Transaction Routines ************************/
+static inline void ahc_freeze_untagged_queues(struct ahc_softc *ahc);
+static inline void ahc_release_untagged_queues(struct ahc_softc *ahc);
+
+/*
+ * Block our completion routine from starting the next untagged
+ * transaction for this target or target lun.
+ */
+static inline void
+ahc_freeze_untagged_queues(struct ahc_softc *ahc)
+{
+ if ((ahc->flags & AHC_SCB_BTT) == 0)
+ ahc->untagged_queue_lock++;
+}
+
+/*
+ * Allow the next untagged transaction for this target or target lun
+ * to be executed. We use a counting semaphore to allow the lock
+ * to be acquired recursively. Once the count drops to zero, the
+ * transaction queues will be run.
+ */
+static inline void
+ahc_release_untagged_queues(struct ahc_softc *ahc)
+{
+ if ((ahc->flags & AHC_SCB_BTT) == 0) {
+ ahc->untagged_queue_lock--;
+ if (ahc->untagged_queue_lock == 0)
+ ahc_run_untagged_queues(ahc);
+ }
+}
+
/************************* Sequencer Execution Control ************************/
/*
* Work around any chip bugs related to halting sequencer execution.
* On Ultra2 controllers, we must clear the CIOBUS stretch signal by
@@ -246,9 +310,9 @@
* Without this workaround, if the chip is paused, by an interrupt or
* manual pause while accessing scb ram, accesses to certain registers
* will hang the system (infinite pci retries).
*/
-void
+static void
ahc_pause_bug_fix(struct ahc_softc *ahc)
{
if ((ahc->features & AHC_ULTRA2) != 0)
(void)ahc_inb(ahc, CCSCBCTL);
@@ -303,9 +367,9 @@
ahc_outb(ahc, HCNTRL, ahc->unpause);
}
/************************** Memory mapping routines ***************************/
-struct ahc_dma_seg *
+static struct ahc_dma_seg *
ahc_sg_bus_to_virt(struct scb *scb, uint32_t sg_busaddr)
{
int sg_index;
@@ -315,9 +379,9 @@
return (&scb->sg_list[sg_index]);
}
-uint32_t
+static uint32_t
ahc_sg_virt_to_bus(struct scb *scb, struct ahc_dma_seg *sg)
{
int sg_index;
@@ -326,16 +390,16 @@
return (scb->sg_list_phys + (sg_index * sizeof(*scb->sg_list)));
}
-uint32_t
+static uint32_t
ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index)
{
return (ahc->scb_data->hscb_busaddr
+ (sizeof(struct hardware_scb) * index));
}
-void
+static void
ahc_sync_scb(struct ahc_softc *ahc, struct scb *scb, int op)
{
ahc_dmamap_sync(ahc, ahc->scb_data->hscb_dmat,
ahc->scb_data->hscb_dmamap,
@@ -354,20 +418,22 @@
* sizeof(struct ahc_dma_seg),
/*len*/sizeof(struct ahc_dma_seg) * scb->sg_count, op);
}
-uint32_t
+#ifdef AHC_TARGET_MODE
+static uint32_t
ahc_targetcmd_offset(struct ahc_softc *ahc, u_int index)
{
return (((uint8_t *)&ahc->targetcmds[index]) - ahc->qoutfifo);
}
+#endif
/*********************** Miscelaneous Support Functions ***********************/
/*
* Determine whether the sequencer reported a residual
* for this SCB/transaction.
*/
-void
+static void
ahc_update_residual(struct ahc_softc *ahc, struct scb *scb)
{
uint32_t sgptr;
@@ -503,9 +569,9 @@
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
return (scb);
}
-void
+static void
ahc_swap_with_next_hscb(struct ahc_softc *ahc, struct scb *scb)
{
struct hardware_scb *q_hscb;
u_int saved_tag;
@@ -592,9 +658,9 @@
offset = scb - ahc->scb_data->scbarray;
return (&ahc->scb_data->sense[offset]);
}
-uint32_t
+static uint32_t
ahc_get_sense_bufaddr(struct ahc_softc *ahc, struct scb *scb)
{
int offset;
@@ -603,16 +669,16 @@
+ (offset * sizeof(struct scsi_sense_data)));
}
/************************** Interrupt Processing ******************************/
-void
+static void
ahc_sync_qoutfifo(struct ahc_softc *ahc, int op)
{
ahc_dmamap_sync(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
/*offset*/0, /*len*/256, op);
}
-void
+static void
ahc_sync_tqinfifo(struct ahc_softc *ahc, int op)
{
#ifdef AHC_TARGET_MODE
if ((ahc->flags & AHC_TARGETROLE) != 0) {
@@ -630,9 +696,9 @@
* into our in-core command complete fifos.
*/
#define AHC_RUN_QOUTFIFO 0x1
#define AHC_RUN_TQINFIFO 0x2
-u_int
+static u_int
ahc_check_cmdcmpltqueues(struct ahc_softc *ahc)
{
u_int retval;
@@ -744,9 +810,9 @@
/************************* Sequencer Execution Control ************************/
/*
* Restart the sequencer program from address zero
*/
-void
+static void
ahc_restart(struct ahc_softc *ahc)
{
ahc_pause(ahc);
@@ -805,9 +871,9 @@
ahc_unpause(ahc);
}
/************************* Input/Output Queues ********************************/
-void
+static void
ahc_run_qoutfifo(struct ahc_softc *ahc)
{
struct scb *scb;
u_int scb_index;
@@ -852,18 +918,18 @@
ahc_done(ahc, scb);
}
}
-void
+static void
ahc_run_untagged_queues(struct ahc_softc *ahc)
{
int i;
for (i = 0; i < 16; i++)
ahc_run_untagged_queue(ahc, &ahc->untagged_queues[i]);
}
-void
+static void
ahc_run_untagged_queue(struct ahc_softc *ahc, struct scb_tailq *queue)
{
struct scb *scb;
@@ -877,9 +943,9 @@
}
}
/************************* Interrupt Handling *********************************/
-void
+static void
ahc_handle_brkadrint(struct ahc_softc *ahc)
{
/*
* We upset the sequencer :-(
@@ -906,9 +972,9 @@
/* Disable all interrupt sources by resetting the controller */
ahc_shutdown(ahc);
}
-void
+static void
ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
{
struct scb *scb;
struct ahc_devinfo devinfo;
@@ -1457,9 +1523,9 @@
*/
ahc_unpause(ahc);
}
-void
+static void
ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
{
u_int scb_index;
u_int status0;
@@ -1910,9 +1976,9 @@
targ_info, AHC_NEG_IF_NON_ASYNC);
}
#define AHC_MAX_STEPS 2000
-void
+static void
ahc_clear_critical_section(struct ahc_softc *ahc)
{
int stepping;
int steps;
@@ -2003,9 +2069,9 @@
/*
* Clear any pending interrupt status.
*/
-void
+static void
ahc_clear_intstat(struct ahc_softc *ahc)
{
/* Clear any interrupt conditions this may have caused */
ahc_outb(ahc, CLRSINT1, CLRSELTIMEO|CLRATNO|CLRSCSIRSTI
@@ -2022,9 +2088,10 @@
#ifdef AHC_DEBUG
uint32_t ahc_debug = AHC_DEBUG_OPTS;
#endif
-void
+#if 0 /* unused */
+static void
ahc_print_scb(struct scb *scb)
{
int i;
@@ -2054,8 +2121,9 @@
ahc_le32toh(scb->sg_list[i].len));
}
}
}
+#endif
/************************* Transfer Negotiation *******************************/
/*
* Allocate per target mode instance (ID we respond to as a target)
@@ -2137,9 +2205,9 @@
* this function finds the nearest syncrate to the input period limited
* by the capabilities of the bus connectivity of and sync settings for
* the target.
*/
-struct ahc_syncrate *
+const struct ahc_syncrate *
ahc_devlimited_syncrate(struct ahc_softc *ahc,
struct ahc_initiator_tinfo *tinfo,
u_int *period, u_int *ppr_options, role_t role)
{
@@ -2192,13 +2260,13 @@
* Look up the valid period to SCSIRATE conversion in our table.
* Return the period and offset that should be sent to the target
* if this was the beginning of an SDTR.
*/
-struct ahc_syncrate *
+const struct ahc_syncrate *
ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
u_int *ppr_options, u_int maxsync)
{
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
if ((ahc->features & AHC_DT) == 0)
*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
@@ -2271,9 +2339,9 @@
*/
u_int
ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)
{
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
if ((ahc->features & AHC_ULTRA2) != 0)
scsirate &= SXFR_ULTRA2;
else
@@ -2309,12 +2377,12 @@
/*
* Truncate the given synchronous offset to a value the
* current adapter type and syncrate are capable of.
*/
-void
+static void
ahc_validate_offset(struct ahc_softc *ahc,
struct ahc_initiator_tinfo *tinfo,
- struct ahc_syncrate *syncrate,
+ const struct ahc_syncrate *syncrate,
u_int *offset, int wide, role_t role)
{
u_int maxoffset;
@@ -2341,9 +2409,9 @@
/*
* Truncate the given transfer width parameter to a value the
* current adapter type is capable of.
*/
-void
+static void
ahc_validate_width(struct ahc_softc *ahc, struct ahc_initiator_tinfo *tinfo,
u_int *bus_width, role_t role)
{
switch (*bus_width) {
@@ -2416,9 +2484,9 @@
* immediately.
*/
void
ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
- struct ahc_syncrate *syncrate, u_int period,
+ const struct ahc_syncrate *syncrate, u_int period,
u_int offset, u_int ppr_options, u_int type, int paused)
{
struct ahc_initiator_tinfo *tinfo;
struct ahc_tmode_tstate *tstate;
@@ -2723,13 +2791,13 @@
SCSIID_CHANNEL(ahc, saved_scsiid),
role);
}
-struct ahc_phase_table_entry*
+static const struct ahc_phase_table_entry*
ahc_lookup_phase_entry(int phase)
{
- struct ahc_phase_table_entry *entry;
- struct ahc_phase_table_entry *last_entry;
+ const struct ahc_phase_table_entry *entry;
+ const struct ahc_phase_table_entry *last_entry;
/*
* num_phases doesn't include the default entry which
* will be returned if the phase doesn't match.
@@ -2893,9 +2961,9 @@
* we want to renegotiate due to a check condition.
*/
struct ahc_initiator_tinfo *tinfo;
struct ahc_tmode_tstate *tstate;
- struct ahc_syncrate *rate;
+ const struct ahc_syncrate *rate;
int dowide;
int dosync;
int doppr;
u_int period;
@@ -3559,9 +3627,9 @@
break;
switch (ahc->msgin_buf[2]) {
case MSG_EXT_SDTR:
{
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
u_int period;
u_int ppr_options;
u_int offset;
u_int saved_offset;
@@ -3734,9 +3802,9 @@
break;
}
case MSG_EXT_PPR:
{
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
u_int period;
u_int offset;
u_int bus_width;
u_int ppr_options;
@@ -4487,9 +4555,9 @@
#endif
return;
}
-void
+static void
ahc_shutdown(void *arg)
{
struct ahc_softc *ahc;
int i;
@@ -4891,9 +4959,9 @@
if (scb_data->scbarray != NULL)
free(scb_data->scbarray, M_DEVBUF);
}
-void
+static void
ahc_alloc_scbs(struct ahc_softc *ahc)
{
struct scb_data *scb_data;
struct scb *next_scb;
@@ -5624,9 +5692,9 @@
/*
* Return the untagged transaction id for a given target/channel lun.
* Optionally, clear the entry.
*/
-u_int
+static u_int
ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl)
{
u_int scbid;
u_int target_offset;
@@ -5645,9 +5713,9 @@
return (scbid);
}
-void
+static void
ahc_unbusy_tcl(struct ahc_softc *ahc, u_int tcl)
{
u_int target_offset;
@@ -5663,9 +5731,9 @@
ahc_outb(ahc, BUSY_TARGETS + target_offset, SCB_LIST_NULL);
}
}
-void
+static void
ahc_busy_tcl(struct ahc_softc *ahc, u_int tcl, u_int scbid)
{
u_int target_offset;
@@ -5718,9 +5786,9 @@
return match;
}
-void
+static void
ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
{
int target;
char channel;
@@ -6259,9 +6327,9 @@
* setting their status to the passed in status if the status has not already
* been modified from CAM_REQ_INPROG. This routine assumes that the sequencer
* is paused before it is called.
*/
-int
+static int
ahc_abort_scbs(struct ahc_softc *ahc, int target, char channel,
int lun, u_int tag, role_t role, uint32_t status)
{
struct scb *scbp;
@@ -6581,9 +6649,9 @@
/***************************** Residual Processing ****************************/
/*
* Calculate the residual for a just completed SCB.
*/
-void
+static void
ahc_calc_residual(struct ahc_softc *ahc, struct scb *scb)
{
struct hardware_scb *hscb;
struct status_pkt *spkt;
@@ -7048,9 +7116,9 @@
}
}
int
-ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
+ahc_print_register(const ahc_reg_parse_entry_t *table, u_int num_entries,
const char *name, u_int address, u_int value,
u_int *cur_column, u_int wrap_point)
{
int printed;
@@ -7732,9 +7800,9 @@
else
ahc_outb(ahc, SCSIID, scsiid);
}
-void
+static void
ahc_run_tqinfifo(struct ahc_softc *ahc, int paused)
{
struct target_cmd *cmd;
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_inline.h Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_inline.h Thu Apr 24 07:51:53 2008
@@ -45,60 +45,15 @@
#ifndef _AIC7XXX_INLINE_H_
#define _AIC7XXX_INLINE_H_
/************************* Sequencer Execution Control ************************/
-void ahc_pause_bug_fix(struct ahc_softc *ahc);
int ahc_is_paused(struct ahc_softc *ahc);
void ahc_pause(struct ahc_softc *ahc);
void ahc_unpause(struct ahc_softc *ahc);
-/*********************** Untagged Transaction Routines ************************/
-static __inline void ahc_freeze_untagged_queues(struct ahc_softc *ahc);
-static __inline void ahc_release_untagged_queues(struct ahc_softc *ahc);
-
-/*
- * Block our completion routine from starting the next untagged
- * transaction for this target or target lun.
- */
-static __inline void
-ahc_freeze_untagged_queues(struct ahc_softc *ahc)
-{
- if ((ahc->flags & AHC_SCB_BTT) == 0)
- ahc->untagged_queue_lock++;
-}
-
-/*
- * Allow the next untagged transaction for this target or target lun
- * to be executed. We use a counting semaphore to allow the lock
- * to be acquired recursively. Once the count drops to zero, the
- * transaction queues will be run.
- */
-static __inline void
-ahc_release_untagged_queues(struct ahc_softc *ahc)
-{
- if ((ahc->flags & AHC_SCB_BTT) == 0) {
- ahc->untagged_queue_lock--;
- if (ahc->untagged_queue_lock == 0)
- ahc_run_untagged_queues(ahc);
- }
-}
-
/************************** Memory mapping routines ***************************/
-struct ahc_dma_seg *
- ahc_sg_bus_to_virt(struct scb *scb,
- uint32_t sg_busaddr);
-uint32_t
- ahc_sg_virt_to_bus(struct scb *scb,
- struct ahc_dma_seg *sg);
-uint32_t
- ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index);
-void ahc_sync_scb(struct ahc_softc *ahc,
- struct scb *scb, int op);
void ahc_sync_sglist(struct ahc_softc *ahc,
struct scb *scb, int op);
-uint32_t
- ahc_targetcmd_offset(struct ahc_softc *ahc,
- u_int index);
/******************************** Debugging ***********************************/
static __inline char *ahc_name(struct ahc_softc *ahc);
@@ -109,10 +64,8 @@
}
/*********************** Miscellaneous Support Functions ***********************/
-void ahc_update_residual(struct ahc_softc *ahc,
- struct scb *scb);
struct ahc_initiator_tinfo *
ahc_fetch_transinfo(struct ahc_softc *ahc,
char channel, u_int our_id,
u_int remote_id,
@@ -133,21 +86,13 @@
ahc_get_scb(struct ahc_softc *ahc);
void ahc_free_scb(struct ahc_softc *ahc, struct scb *scb);
struct scb *
ahc_lookup_scb(struct ahc_softc *ahc, u_int tag);
-void ahc_swap_with_next_hscb(struct ahc_softc *ahc,
- struct scb *scb);
void ahc_queue_scb(struct ahc_softc *ahc, struct scb *scb);
struct scsi_sense_data *
ahc_get_sense_buf(struct ahc_softc *ahc,
struct scb *scb);
-uint32_t
- ahc_get_sense_bufaddr(struct ahc_softc *ahc,
- struct scb *scb);
/************************** Interrupt Processing ******************************/
-void ahc_sync_qoutfifo(struct ahc_softc *ahc, int op);
-void ahc_sync_tqinfifo(struct ahc_softc *ahc, int op);
-u_int ahc_check_cmdcmpltqueues(struct ahc_softc *ahc);
int ahc_intr(struct ahc_softc *ahc);
#endif /* _AIC7XXX_INLINE_H_ */
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_osm.c Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_osm.c Thu Apr 24 07:51:53 2008
@@ -2385,9 +2385,9 @@
struct ahc_devinfo devinfo;
unsigned int ppr_options = tinfo->goal.ppr_options;
unsigned long flags;
unsigned long offset = tinfo->goal.offset;
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
if (offset == 0)
offset = MAX_OFFSET;
@@ -2429,9 +2429,9 @@
struct ahc_devinfo devinfo;
unsigned int ppr_options = 0;
unsigned int period = 0;
unsigned long flags;
- struct ahc_syncrate *syncrate = NULL;
+ const struct ahc_syncrate *syncrate = NULL;
ahc_compile_devinfo(&devinfo, shost->this_id, starget->id, 0,
starget->channel + 'A', ROLE_INITIATOR);
if (offset != 0) {
@@ -2459,9 +2459,9 @@
& ~MSG_EXT_PPR_DT_REQ;
unsigned int period = tinfo->goal.period;
unsigned int width = tinfo->goal.width;
unsigned long flags;
- struct ahc_syncrate *syncrate;
+ const struct ahc_syncrate *syncrate;
if (dt && spi_max_width(starget)) {
ppr_options |= MSG_EXT_PPR_DT_REQ;
if (!width)
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_osm.h Thu Apr 24 07:48:32 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_osm.h Thu Apr 24 07:51:53 2008
@@ -397,11 +397,8 @@
off_t offset;
int pos;
};
-void ahc_format_transinfo(struct info_str *info,
- struct ahc_transinfo *tinfo);
-
/******************************** Locking *************************************/
/* Lock protecting internal data structures */
static __inline void
--- scsi-misc-2.6-2008_04_15.p1/drivers/scsi/aic7xxx/aic7xxx_proc.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_proc.c Thu Apr 24 07:51:53 2008
@@ -136,9 +136,9 @@
copy_mem_info(info, buf, len);
return (len);
}
-void
+static void
ahc_format_transinfo(struct info_str *info, struct ahc_transinfo *tinfo)
{
u_int speed;
u_int freq;
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 3/5] aic7xxx: add const
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
@ 2008-04-25 2:36 ` Denys Vlasenko
2008-04-25 2:41 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Denys Vlasenko
2008-04-25 12:47 ` [PATCH 3/5] aic7xxx: add const Hannes Reinecke
2008-04-25 12:46 ` [PATCH 2/5] aic7xxx: add static Hannes Reinecke
1 sibling, 2 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-25 2:36 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 120 bytes --]
This patch adds more const keywords where appropriate.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
--
vda
[-- Attachment #2: aic_debloat_3.diff --]
[-- Type: text/x-diff, Size: 17563 bytes --]
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx.h Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx.h Thu Apr 24 07:54:17 2008
@@ -814,9 +814,9 @@
*/
struct ahd_phase_table_entry {
uint8_t phase;
uint8_t mesg_out; /* Message response to parity errors */
- char *phasemsg;
+ const char *phasemsg;
};
/************************** Serial EEPROM Format ******************************/
@@ -1334,11 +1334,11 @@
/*************************** Function Declarations ****************************/
/******************************************************************************/
/***************************** PCI Front End *********************************/
-struct ahd_pci_identity *ahd_find_pci_device(ahd_dev_softc_t);
+const struct ahd_pci_identity *ahd_find_pci_device(ahd_dev_softc_t);
int ahd_pci_config(struct ahd_softc *,
- struct ahd_pci_identity *);
+ const struct ahd_pci_identity *);
int ahd_pci_test_register_access(struct ahd_softc *);
#ifdef CONFIG_PM
void ahd_pci_suspend(struct ahd_softc *);
void ahd_pci_resume(struct ahd_softc *);
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_core.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx_core.c Thu Apr 24 07:54:17 2008
@@ -51,9 +51,9 @@
#endif
/***************************** Lookup Tables **********************************/
-static char *ahd_chip_names[] =
+static const char *const ahd_chip_names[] =
{
"NONE",
"aic7901",
"aic7902",
@@ -65,12 +65,12 @@
* Hardware error codes.
*/
struct ahd_hard_error_entry {
uint8_t errno;
- char *errmesg;
+ const char *errmesg;
};
-static struct ahd_hard_error_entry ahd_hard_errors[] = {
+static const struct ahd_hard_error_entry ahd_hard_errors[] = {
{ DSCTMOUT, "Discard Timer has timed out" },
{ ILLOPCODE, "Illegal Opcode in sequencer program" },
{ SQPARERR, "Sequencer Parity Error" },
{ DPARERR, "Data-path Parity Error" },
@@ -78,9 +78,9 @@
{ CIOPARERR, "CIOBUS Parity Error" },
};
static const u_int num_errors = ARRAY_SIZE(ahd_hard_errors);
-static struct ahd_phase_table_entry ahd_phase_table[] =
+static const struct ahd_phase_table_entry ahd_phase_table[] =
{
{ P_DATAOUT, MSG_NOOP, "in Data-out phase" },
{ P_DATAIN, MSG_INITIATOR_DET_ERR, "in Data-in phase" },
{ P_DATAOUT_DT, MSG_NOOP, "in DT Data-out phase" },
@@ -212,9 +212,9 @@
static void ahd_dumpseq(struct ahd_softc *ahd);
#endif
static void ahd_loadseq(struct ahd_softc *ahd);
static int ahd_check_patch(struct ahd_softc *ahd,
- struct patch **start_patch,
+ const struct patch **start_patch,
u_int start_instr, u_int *skip_addr);
static u_int ahd_resolve_seqaddr(struct ahd_softc *ahd,
u_int address);
static void ahd_download_instr(struct ahd_softc *ahd,
@@ -253,9 +253,9 @@
static void ahd_freeze_devq(struct ahd_softc *ahd,
struct scb *scb);
static void ahd_handle_scb_status(struct ahd_softc *ahd,
struct scb *scb);
-static struct ahd_phase_table_entry* ahd_lookup_phase_entry(int phase);
+static const struct ahd_phase_table_entry* ahd_lookup_phase_entry(int phase);
static void ahd_shutdown(void *arg);
static void ahd_update_coalescing_values(struct ahd_softc *ahd,
u_int timer,
u_int maxcmds,
@@ -4336,13 +4336,13 @@
printf("%s:%c:%d:%d: ", ahd_name(ahd), 'A',
devinfo->target, devinfo->lun);
}
-static struct ahd_phase_table_entry*
+static const struct ahd_phase_table_entry*
ahd_lookup_phase_entry(int phase)
{
- struct ahd_phase_table_entry *entry;
- struct ahd_phase_table_entry *last_entry;
+ const struct ahd_phase_table_entry *entry;
+ const struct ahd_phase_table_entry *last_entry;
/*
* num_phases doesn't include the default entry which
* will be returned if the phase doesn't match.
@@ -9353,9 +9353,9 @@
{
struct cs cs_table[num_critical_sections];
u_int begin_set[num_critical_sections];
u_int end_set[num_critical_sections];
- struct patch *cur_patch;
+ const struct patch *cur_patch;
u_int cs_count;
u_int cur_cs;
u_int i;
int downloaded;
@@ -9508,13 +9508,13 @@
}
}
static int
-ahd_check_patch(struct ahd_softc *ahd, struct patch **start_patch,
+ahd_check_patch(struct ahd_softc *ahd, const struct patch **start_patch,
u_int start_instr, u_int *skip_addr)
{
- struct patch *cur_patch;
- struct patch *last_patch;
+ const struct patch *cur_patch;
+ const struct patch *last_patch;
u_int num_patches;
num_patches = ARRAY_SIZE(patches);
last_patch = &patches[num_patches];
@@ -9546,9 +9546,9 @@
static u_int
ahd_resolve_seqaddr(struct ahd_softc *ahd, u_int address)
{
- struct patch *cur_patch;
+ const struct patch *cur_patch;
int address_offset;
u_int skip_addr;
u_int i;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_osm.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx_osm.c Thu Apr 24 07:54:17 2008
@@ -192,9 +192,9 @@
}
#define AIC79XX_PRECOMP_INDEX 0
#define AIC79XX_SLEWRATE_INDEX 1
#define AIC79XX_AMPLITUDE_INDEX 2
-static struct ahd_linux_iocell_opts aic79xx_iocell_info[] =
+static const struct ahd_linux_iocell_opts aic79xx_iocell_info[] =
{
AIC79XX_DEFAULT_IOOPTS,
AIC79XX_DEFAULT_IOOPTS,
AIC79XX_DEFAULT_IOOPTS,
@@ -556,15 +556,13 @@
bp = &buffer[0];
ahd = *(struct ahd_softc **)host->hostdata;
memset(bp, 0, sizeof(buffer));
- strcpy(bp, "Adaptec AIC79XX PCI-X SCSI HBA DRIVER, Rev ");
- strcat(bp, AIC79XX_DRIVER_VERSION);
- strcat(bp, "\n");
- strcat(bp, " <");
+ strcpy(bp, "Adaptec AIC79XX PCI-X SCSI HBA DRIVER, Rev " AIC79XX_DRIVER_VERSION "\n"
+ " <");
strcat(bp, ahd->description);
- strcat(bp, ">\n");
- strcat(bp, " ");
+ strcat(bp, ">\n"
+ " ");
ahd_controller_info(ahd, ahd_info);
strcat(bp, ahd_info);
return (bp);
@@ -1147,9 +1145,9 @@
int i, n;
char *p;
char *end;
- static struct {
+ static const struct {
const char *name;
uint32_t *flag;
} options[] = {
{ "extended", &aic79xx_extended },
@@ -1379,9 +1377,9 @@
/*
* Lookup and commit any modified IO Cell options.
*/
if (ahd->unit < ARRAY_SIZE(aic79xx_iocell_info)) {
- struct ahd_linux_iocell_opts *iocell_opts;
+ const struct ahd_linux_iocell_opts *iocell_opts;
iocell_opts = &aic79xx_iocell_info[ahd->unit];
if (iocell_opts->precomp != AIC79XX_DEFAULT_PRECOMP)
AHD_SET_PRECOMP(ahd, iocell_opts->precomp);
@@ -2769,9 +2767,9 @@
if (pcomp && spi_max_width(starget)) {
uint8_t precomp;
if (ahd->unit < ARRAY_SIZE(aic79xx_iocell_info)) {
- struct ahd_linux_iocell_opts *iocell_opts;
+ const struct ahd_linux_iocell_opts *iocell_opts;
iocell_opts = &aic79xx_iocell_info[ahd->unit];
precomp = iocell_opts->precomp;
} else {
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_osm_pci.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx_osm_pci.c Thu Apr 24 07:54:17 2008
@@ -48,9 +48,9 @@
#define ID(x) \
ID2C(x), \
ID2C(IDIROC(x))
-static struct pci_device_id ahd_linux_pci_id_table[] = {
+static const struct pci_device_id ahd_linux_pci_id_table[] = {
/* aic7901 based controllers */
ID(ID_AHA_29320A),
ID(ID_AHA_29320ALP),
ID(ID_AHA_29320LPE),
@@ -158,9 +158,9 @@
{
char buf[80];
struct ahd_softc *ahd;
ahd_dev_softc_t pci;
- struct ahd_pci_identity *entry;
+ const struct ahd_pci_identity *entry;
char *name;
int error;
struct device *dev = &pdev->dev;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_pci.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx_pci.c Thu Apr 24 07:54:17 2008
@@ -96,9 +96,9 @@
static ahd_device_setup_t ahd_aic7901A_setup;
static ahd_device_setup_t ahd_aic7902_setup;
static ahd_device_setup_t ahd_aic790X_setup;
-static struct ahd_pci_identity ahd_pci_ident_table[] =
+static const struct ahd_pci_identity ahd_pci_ident_table[] =
{
/* aic7901 based controllers */
{
ID_AHA_29320A,
@@ -252,17 +252,17 @@
u_int adapter_control);
static void ahd_pci_split_intr(struct ahd_softc *ahd, u_int intstat);
static void ahd_pci_intr(struct ahd_softc *ahd);
-struct ahd_pci_identity *
+const struct ahd_pci_identity *
ahd_find_pci_device(ahd_dev_softc_t pci)
{
uint64_t full_id;
uint16_t device;
uint16_t vendor;
uint16_t subdevice;
uint16_t subvendor;
- struct ahd_pci_identity *entry;
+ const struct ahd_pci_identity *entry;
u_int i;
vendor = ahd_pci_read_config(pci, PCIR_DEVVENDOR, /*bytes*/2);
device = ahd_pci_read_config(pci, PCIR_DEVICE, /*bytes*/2);
@@ -291,9 +291,9 @@
return (NULL);
}
int
-ahd_pci_config(struct ahd_softc *ahd, struct ahd_pci_identity *entry)
+ahd_pci_config(struct ahd_softc *ahd, const struct ahd_pci_identity *entry)
{
struct scb_data *shared_scb_data;
u_int command;
uint32_t devconfig;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic79xx_proc.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx_proc.c Thu Apr 24 07:54:17 2008
@@ -56,9 +56,9 @@
/*
* Table of syncrates that don't follow the "divisible by 4"
* rule. This table will be expanded in future SCSI specs.
*/
-static struct {
+static const struct {
u_int period_factor;
u_int period; /* in 100ths of ns */
} scsi_syncrates[] = {
{ 0x08, 625 }, /* FAST-160 */
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx.h Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx.h Thu Apr 24 07:54:17 2008
@@ -1113,9 +1113,9 @@
struct ahc_pci_identity {
uint64_t full_id;
uint64_t id_mask;
- char *name;
+ const char *name;
ahc_device_setup_t *setup;
};
/***************************** VL/EISA Declarations ***************************/
@@ -1134,11 +1134,11 @@
/*************************** Function Declarations ****************************/
/******************************************************************************/
/***************************** PCI Front End *********************************/
-struct ahc_pci_identity *ahc_find_pci_device(ahc_dev_softc_t);
+const struct ahc_pci_identity *ahc_find_pci_device(ahc_dev_softc_t);
int ahc_pci_config(struct ahc_softc *,
- struct ahc_pci_identity *);
+ const struct ahc_pci_identity *);
int ahc_pci_test_register_access(struct ahc_softc *);
#ifdef CONFIG_PM
void ahc_pci_resume(struct ahc_softc *ahc);
#endif
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_93cx6.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_93cx6.c Thu Apr 24 07:54:17 2008
@@ -83,18 +83,18 @@
uint8_t bits[11];
};
/* Short opcodes for the c46 */
-static struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
-static struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
+static const struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
+static const struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
/* Long opcodes for the C56/C66 */
-static struct seeprom_cmd seeprom_long_ewen = {11, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
-static struct seeprom_cmd seeprom_long_ewds = {11, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
+static const struct seeprom_cmd seeprom_long_ewen = {11, {1, 0, 0, 1, 1, 0, 0, 0, 0}};
+static const struct seeprom_cmd seeprom_long_ewds = {11, {1, 0, 0, 0, 0, 0, 0, 0, 0}};
/* Common opcodes */
-static struct seeprom_cmd seeprom_write = {3, {1, 0, 1}};
-static struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
+static const struct seeprom_cmd seeprom_write = {3, {1, 0, 1}};
+static const struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
/*
* Wait for the SEERDY to go high; about 800 ns.
*/
@@ -107,9 +107,9 @@
/*
* Send a START condition and the given command
*/
static void
-send_seeprom_cmd(struct seeprom_descriptor *sd, struct seeprom_cmd *cmd)
+send_seeprom_cmd(struct seeprom_descriptor *sd, const struct seeprom_cmd *cmd)
{
uint8_t temp;
int i = 0;
@@ -226,9 +226,9 @@
int
ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,
u_int start_addr, u_int count)
{
- struct seeprom_cmd *ewen, *ewds;
+ const struct seeprom_cmd *ewen, *ewds;
uint16_t v;
uint8_t temp;
int i, k;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_core.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_core.c Thu Apr 24 07:54:17 2008
@@ -220,9 +220,9 @@
static void ahc_dumpseq(struct ahc_softc *ahc);
#endif
static int ahc_loadseq(struct ahc_softc *ahc);
static int ahc_check_patch(struct ahc_softc *ahc,
- struct patch **start_patch,
+ const struct patch **start_patch,
u_int start_instr, u_int *skip_addr);
static void ahc_download_instr(struct ahc_softc *ahc,
u_int instrptr, uint8_t *dconsts);
#ifdef AHC_TARGET_MODE
@@ -6850,9 +6850,9 @@
{
struct cs cs_table[num_critical_sections];
u_int begin_set[num_critical_sections];
u_int end_set[num_critical_sections];
- struct patch *cur_patch;
+ const struct patch *cur_patch;
u_int cs_count;
u_int cur_cs;
u_int i;
u_int skip_addr;
@@ -6955,13 +6955,13 @@
return (0);
}
static int
-ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
+ahc_check_patch(struct ahc_softc *ahc, const struct patch **start_patch,
u_int start_instr, u_int *skip_addr)
{
- struct patch *cur_patch;
- struct patch *last_patch;
+ const struct patch *cur_patch;
+ const struct patch *last_patch;
u_int num_patches;
num_patches = ARRAY_SIZE(patches);
last_patch = &patches[num_patches];
@@ -7018,9 +7018,9 @@
case AIC_OP_JNZ:
case AIC_OP_JE:
case AIC_OP_JZ:
{
- struct patch *cur_patch;
+ const struct patch *cur_patch;
int address_offset;
u_int address;
u_int skip_addr;
u_int i;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_osm.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_osm.c Thu Apr 24 07:54:17 2008
@@ -510,15 +510,13 @@
bp = &buffer[0];
ahc = *(struct ahc_softc **)host->hostdata;
memset(bp, 0, sizeof(buffer));
- strcpy(bp, "Adaptec AIC7XXX EISA/VLB/PCI SCSI HBA DRIVER, Rev ");
- strcat(bp, AIC7XXX_DRIVER_VERSION);
- strcat(bp, "\n");
- strcat(bp, " <");
+ strcpy(bp, "Adaptec AIC7XXX EISA/VLB/PCI SCSI HBA DRIVER, Rev " AIC7XXX_DRIVER_VERSION "\n"
+ " <");
strcat(bp, ahc->description);
- strcat(bp, ">\n");
- strcat(bp, " ");
+ strcat(bp, ">\n"
+ " ");
ahc_controller_info(ahc, ahc_info);
strcat(bp, ahc_info);
strcat(bp, "\n");
@@ -1032,9 +1030,9 @@
int i, n;
char *p;
char *end;
- static struct {
+ static const struct {
const char *name;
uint32_t *flag;
} options[] = {
{ "extended", &aic7xxx_extended },
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c Thu Apr 24 07:48:38 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c Thu Apr 24 07:54:17 2008
@@ -45,9 +45,9 @@
/* Define the macro locally since it's different for different class of chips.
*/
#define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI)
-static struct pci_device_id ahc_linux_pci_id_table[] = {
+static const struct pci_device_id ahc_linux_pci_id_table[] = {
/* aic7850 based controllers */
ID(ID_AHA_2902_04_10_15_20C_30C),
/* aic7860 based controllers */
ID(ID_AHA_2930CU),
@@ -205,9 +205,9 @@
char buf[80];
const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
struct ahc_softc *ahc;
ahc_dev_softc_t pci;
- struct ahc_pci_identity *entry;
+ const struct ahc_pci_identity *entry;
char *name;
int error;
struct device *dev = &pdev->dev;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_pci.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_pci.c Thu Apr 24 07:54:17 2008
@@ -167,10 +167,9 @@
static ahc_device_setup_t ahc_aha394XX_setup;
static ahc_device_setup_t ahc_aha494XX_setup;
static ahc_device_setup_t ahc_aha398XX_setup;
-static struct ahc_pci_identity ahc_pci_ident_table [] =
-{
+static const struct ahc_pci_identity ahc_pci_ident_table[] = {
/* aic7850 based controllers */
{
ID_AHA_2902_04_10_15_20C_30C,
ID_ALL_MASK,
@@ -667,17 +666,17 @@
}
return (result);
}
-struct ahc_pci_identity *
+const struct ahc_pci_identity *
ahc_find_pci_device(ahc_dev_softc_t pci)
{
uint64_t full_id;
uint16_t device;
uint16_t vendor;
uint16_t subdevice;
uint16_t subvendor;
- struct ahc_pci_identity *entry;
+ const struct ahc_pci_identity *entry;
u_int i;
vendor = ahc_pci_read_config(pci, PCIR_DEVVENDOR, /*bytes*/2);
device = ahc_pci_read_config(pci, PCIR_DEVICE, /*bytes*/2);
@@ -709,9 +708,9 @@
return (NULL);
}
int
-ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
+ahc_pci_config(struct ahc_softc *ahc, const struct ahc_pci_identity *entry)
{
u_int command;
u_int our_id;
u_int sxfrctl1;
--- scsi-misc-2.6-2008_04_15.p2/drivers/scsi/aic7xxx/aic7xxx_proc.c Thu Apr 24 07:51:53 2008
+++ scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx_proc.c Thu Apr 24 07:54:17 2008
@@ -57,9 +57,9 @@
/*
* Table of syncrates that don't follow the "divisible by 4"
* rule. This table will be expanded in future SCSI specs.
*/
-static struct {
+static const struct {
u_int period_factor;
u_int period; /* in 100ths of ns */
} scsi_syncrates[] = {
{ 0x08, 625 }, /* FAST-160 */
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-25 2:36 ` [PATCH 3/5] aic7xxx: add const Denys Vlasenko
@ 2008-04-25 2:41 ` Denys Vlasenko
2008-04-25 2:44 ` [PATCH 5/5] aic7xxx: update shipped files Denys Vlasenko
2008-04-25 13:01 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Hannes Reinecke
2008-04-25 12:47 ` [PATCH 3/5] aic7xxx: add const Hannes Reinecke
1 sibling, 2 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-25 2:41 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 370 bytes --]
Add "dont_generate_debug_code" syntax handling to aicasm_gram.y
aic79xx.reg, aic7xxx.reg: add dont_generate_debug_code keyword
for registers which are never referenced by the driver.
aicasm.c, aicasm_symbol.[ch]: don't emit code for those regs;
also add "const" keyword to generated code in few places.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
--
vda
[-- Attachment #2: aic_debloat_4.diff --]
[-- Type: text/x-diff, Size: 54124 bytes --]
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic79xx.reg Thu Apr 24 07:48:38 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic79xx.reg Fri Apr 25 04:23:56 2008
@@ -79,8 +79,14 @@
mvi SEQINTCODE, code; \
}
/*
+ * Registers marked "dont_generate_debug_code" are not (yet) referenced
+ * from the driver code, and this keyword inhibit generation
+ * of debug code for them.
+ */
+
+/*
* Mode Pointer
* Controls which of the 5, 512byte, address spaces should be used
* as the source and destination of any register accesses in our
* register window.
@@ -90,8 +96,9 @@
access_mode RW
field DST_MODE 0x70
field SRC_MODE 0x07
mode_pointer
+ dont_generate_debug_code
}
const SRC_MODE_SHIFT 0
const DST_MODE_SHIFT 4
@@ -189,8 +196,9 @@
TRACEPOINT3,
SAW_HWERR,
BAD_SCB_STATUS
}
+ dont_generate_debug_code
}
/*
* Clear Host Interrupt
@@ -205,8 +213,9 @@
field CLRSCSIINT 0x08
field CLRSEQINT 0x04
field CLRCMDINT 0x02
field CLRSPLTINT 0x01
+ dont_generate_debug_code
}
/*
* Error Register
@@ -220,8 +229,9 @@
field DPARERR 0x10
field SQPARERR 0x08
field ILLOPCODE 0x04
field DSCTMOUT 0x02
+ dont_generate_debug_code
}
/*
* Clear Error
@@ -235,8 +245,9 @@
field CLRDPARERR 0x10
field CLRSQPARERR 0x08
field CLRILLOPCODE 0x04
field CLRDSCTMOUT 0x02
+ dont_generate_debug_code
}
/*
* Host Control Register
@@ -252,8 +263,9 @@
field PAUSE 0x04
field INTEN 0x02
field CHIPRST 0x01
field CHIPRSTACK 0x01
+ dont_generate_debug_code
}
/*
* Host New SCB Queue Offset
@@ -261,16 +273,18 @@
register HNSCB_QOFF {
address 0x006
access_mode RW
size 2
+ dont_generate_debug_code
}
/*
* Host Empty SCB Queue Offset
*/
register HESCB_QOFF {
address 0x008
access_mode RW
+ dont_generate_debug_code
}
/*
* Host Mailbox
@@ -305,8 +319,9 @@
field CLRSEQ_SEQINT 0x08
field CLRSEQ_SCSIINT 0x04
field CLRSEQ_PCIINT 0x02
field CLRSEQ_SPLTINT 0x01
+ dont_generate_debug_code
}
/*
* Software Timer
@@ -314,8 +329,9 @@
register SWTIMER {
address 0x00E
access_mode RW
size 2
+ dont_generate_debug_code
}
/*
* SEQ New SCB Queue Offset
@@ -324,8 +340,9 @@
address 0x010
access_mode RW
size 2
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* SEQ Empty SCB Queue Offset
@@ -333,8 +350,9 @@
register SESCB_QOFF {
address 0x012
access_mode RW
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* SEQ Done SCB Queue Offset
@@ -343,8 +361,9 @@
address 0x014
access_mode RW
modes M_CCHAN
size 2
+ dont_generate_debug_code
}
/*
* Queue Offset Control & Status
@@ -371,8 +390,9 @@
SCB_QSIZE_4096,
SCB_QSIZE_8192,
SCB_QSIZE_16384
}
+ dont_generate_debug_code
}
/*
* Interrupt Control
@@ -422,8 +442,9 @@
field MPARCKEN 0x20 /* Memory Parity Check Enable */
field EXTREQLCK 0x10 /* External Request Lock */
field DISABLE_TWATE 0x02 /* Rev B or greater */
field CIOPARCKEN 0x01 /* Internal bus parity error enable */
+ dont_generate_debug_code
}
/*
* Data FIFO Status
@@ -450,8 +471,9 @@
modes M_DFF0, M_DFF1
field SG_ADDR_MASK 0xf8
field ODD_SEG 0x04
field LAST_SEG 0x02
+ dont_generate_debug_code
}
register SG_CACHE_SHADOW {
address 0x01B
@@ -472,8 +494,9 @@
modes M_CFG
field RESET_HARB 0x80
field RETRY_SWEN 0x08
field USE_TIME 0x07
+ dont_generate_debug_code
}
/*
* Data Channel Host Address
@@ -482,8 +505,9 @@
address 0x070
access_mode RW
size 8
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Host Overlay DMA Address
@@ -492,8 +516,9 @@
address 0x070
access_mode RW
size 8
modes M_SCSI
+ dont_generate_debug_code
}
/*
* PCI PLL Delay.
@@ -503,8 +528,9 @@
access_mode RW
size 1
modes M_CFG
field SPLIT_DROP_REQ 0x80
+ dont_generate_debug_code
}
/*
* Data Channel Host Count
@@ -513,8 +539,9 @@
address 0x078
access_mode RW
size 3
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Host Overlay DMA Count
@@ -523,8 +550,9 @@
address 0x078
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Host Overlay DMA Enable
@@ -532,8 +560,9 @@
register HODMAEN {
address 0x07A
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Scatter/Gather Host Address
@@ -542,8 +571,9 @@
address 0x07C
access_mode RW
size 8
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* SCB Host Address
@@ -552,8 +582,9 @@
address 0x07C
access_mode RW
size 8
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* Scatter/Gather Host Count
@@ -561,8 +592,9 @@
register SGHCNT {
address 0x084
access_mode RW
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* SCB Host Count
@@ -570,8 +602,9 @@
register SCBHCNT {
address 0x084
access_mode RW
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* Data FIFO Threshold
@@ -599,8 +632,9 @@
RD_DFTHRSH_85,
RD_DFTHRSH_90,
RD_DFTHRSH_MAX
}
+ dont_generate_debug_code
}
/*
* ROM Address
@@ -608,8 +642,9 @@
register ROMADDR {
address 0x08A
access_mode RW
size 3
+ dont_generate_debug_code
}
/*
* ROM Control
@@ -620,16 +655,18 @@
field ROMOP 0xE0
field ROMSPD 0x18
field REPEAT 0x02
field RDY 0x01
+ dont_generate_debug_code
}
/*
* ROM Data
*/
register ROMDATA {
address 0x08E
access_mode RW
+ dont_generate_debug_code
}
/*
* Data Channel Receive Message 0
@@ -639,8 +676,9 @@
access_mode RO
modes M_DFF0, M_DFF1
field CDNUM 0xF8
field CFNUM 0x07
+ dont_generate_debug_code
}
/*
* CMC Recieve Message 0
@@ -650,8 +688,9 @@
access_mode RO
modes M_CCHAN
field CDNUM 0xF8
field CFNUM 0x07
+ dont_generate_debug_code
}
/*
* Overlay Recieve Message 0
@@ -661,8 +700,9 @@
access_mode RO
modes M_SCSI
field CDNUM 0xF8
field CFNUM 0x07
+ dont_generate_debug_code
}
/*
* Relaxed Order Enable
@@ -676,8 +716,9 @@
field CMCROEN 0x08
field SGROEN 0x04
field DCH1ROEN 0x02
field DCH0ROEN 0x01
+ dont_generate_debug_code
}
/*
* Data Channel Receive Message 1
@@ -686,8 +727,9 @@
address 0x091
access_mode RO
modes M_DFF0, M_DFF1
field CBNUM 0xFF
+ dont_generate_debug_code
}
/*
* CMC Recieve Message 1
@@ -696,8 +738,9 @@
address 0x091
access_mode RO
modes M_CCHAN
field CBNUM 0xFF
+ dont_generate_debug_code
}
/*
* Overlay Recieve Message 1
@@ -706,8 +749,9 @@
address 0x091
access_mode RO
modes M_SCSI
field CBNUM 0xFF
+ dont_generate_debug_code
}
/*
* No Snoop Enable
@@ -721,8 +765,9 @@
field CMCNSEN 0x08
field SGNSEN 0x04
field DCH1NSEN 0x02
field DCH0NSEN 0x01
+ dont_generate_debug_code
}
/*
* Data Channel Receive Message 2
@@ -731,8 +776,9 @@
address 0x092
access_mode RO
modes M_DFF0, M_DFF1
field MINDEX 0xFF
+ dont_generate_debug_code
}
/*
* CMC Recieve Message 2
@@ -741,8 +787,9 @@
address 0x092
access_mode RO
modes M_CCHAN
field MINDEX 0xFF
+ dont_generate_debug_code
}
/*
* Overlay Recieve Message 2
@@ -751,8 +798,9 @@
address 0x092
access_mode RO
modes M_SCSI
field MINDEX 0xFF
+ dont_generate_debug_code
}
/*
* Outstanding Split Transactions
@@ -760,8 +808,9 @@
register OST {
address 0x092
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data Channel Receive Message 3
@@ -770,8 +819,9 @@
address 0x093
access_mode RO
modes M_DFF0, M_DFF1
field MCLASS 0x0F
+ dont_generate_debug_code
}
/*
* CMC Recieve Message 3
@@ -780,8 +830,9 @@
address 0x093
access_mode RO
modes M_CCHAN
field MCLASS 0x0F
+ dont_generate_debug_code
}
/*
* Overlay Recieve Message 3
@@ -790,8 +841,9 @@
address 0x093
access_mode RO
modes M_SCSI
field MCLASS 0x0F
+ dont_generate_debug_code
}
/*
* PCI-X Control
@@ -806,8 +858,9 @@
field SPLTSTADIS 0x08
field SRSPDPEEN 0x04
field TSCSERREN 0x02
field CMPABCDIS 0x01
+ dont_generate_debug_code
}
/*
* CMC Sequencer Byte Count
@@ -815,8 +868,9 @@
register CMCSEQBCNT {
address 0x094
access_mode RO
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* Overlay Sequencer Byte Count
@@ -824,8 +878,9 @@
register OVLYSEQBCNT {
address 0x094
access_mode RO
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Data Channel Sequencer Byte Count
@@ -834,8 +889,9 @@
address 0x094
access_mode RO
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Data Channel Split Status 0
@@ -851,8 +907,9 @@
field CNTNOTCMPLT 0x08
field RXOVRUN 0x04
field RXSCEMSG 0x02
field RXSPLTRSP 0x01
+ dont_generate_debug_code
}
/*
* CMC Split Status 0
@@ -868,8 +925,9 @@
field CNTNOTCMPLT 0x08
field RXOVRUN 0x04
field RXSCEMSG 0x02
field RXSPLTRSP 0x01
+ dont_generate_debug_code
}
/*
* Overlay Split Status 0
@@ -885,8 +943,9 @@
field CNTNOTCMPLT 0x08
field RXOVRUN 0x04
field RXSCEMSG 0x02
field RXSPLTRSP 0x01
+ dont_generate_debug_code
}
/*
* Data Channel Split Status 1
@@ -895,8 +954,9 @@
address 0x097
access_mode RW
modes M_DFF0, M_DFF1
field RXDATABUCKET 0x01
+ dont_generate_debug_code
}
/*
* CMC Split Status 1
@@ -905,8 +965,9 @@
address 0x097
access_mode RW
modes M_CCHAN
field RXDATABUCKET 0x01
+ dont_generate_debug_code
}
/*
* Overlay Split Status 1
@@ -915,8 +976,9 @@
address 0x097
access_mode RW
modes M_SCSI
field RXDATABUCKET 0x01
+ dont_generate_debug_code
}
/*
* S/G Receive Message 0
@@ -926,8 +988,9 @@
access_mode RO
modes M_DFF0, M_DFF1
field CDNUM 0xF8
field CFNUM 0x07
+ dont_generate_debug_code
}
/*
* S/G Receive Message 1
@@ -936,8 +999,9 @@
address 0x099
access_mode RO
modes M_DFF0, M_DFF1
field CBNUM 0xFF
+ dont_generate_debug_code
}
/*
* S/G Receive Message 2
@@ -946,8 +1010,9 @@
address 0x09A
access_mode RO
modes M_DFF0, M_DFF1
field MINDEX 0xFF
+ dont_generate_debug_code
}
/*
* S/G Receive Message 3
@@ -956,8 +1021,9 @@
address 0x09B
access_mode RO
modes M_DFF0, M_DFF1
field MCLASS 0x0F
+ dont_generate_debug_code
}
/*
* Slave Split Out Address 0
@@ -966,8 +1032,9 @@
address 0x098
access_mode RO
modes M_SCSI
field LOWER_ADDR 0x7F
+ dont_generate_debug_code
}
/*
* Slave Split Out Address 1
@@ -977,8 +1044,9 @@
access_mode RO
modes M_SCSI
field REQ_DNUM 0xF8
field REQ_FNUM 0x07
+ dont_generate_debug_code
}
/*
* Slave Split Out Address 2
@@ -987,8 +1055,9 @@
address 0x09A
access_mode RO
modes M_SCSI
field REQ_BNUM 0xFF
+ dont_generate_debug_code
}
/*
* Slave Split Out Address 3
@@ -998,8 +1067,9 @@
access_mode RO
modes M_SCSI
field RLXORD 020
field TAG_NUM 0x1F
+ dont_generate_debug_code
}
/*
* SG Sequencer Byte Count
@@ -1007,8 +1077,9 @@
register SGSEQBCNT {
address 0x09C
access_mode RO
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Slave Split Out Attribute 0
@@ -1017,8 +1088,9 @@
address 0x09C
access_mode RO
modes M_SCSI
field LOWER_BCNT 0xFF
+ dont_generate_debug_code
}
/*
* Slave Split Out Attribute 1
@@ -1028,8 +1100,9 @@
access_mode RO
modes M_SCSI
field CMPLT_DNUM 0xF8
field CMPLT_FNUM 0x07
+ dont_generate_debug_code
}
/*
* Slave Split Out Attribute 2
@@ -1039,8 +1112,9 @@
access_mode RO
size 2
modes M_SCSI
field CMPLT_BNUM 0xFF
+ dont_generate_debug_code
}
/*
* S/G Split Status 0
*/
@@ -1055,8 +1129,9 @@
field CNTNOTCMPLT 0x08
field RXOVRUN 0x04
field RXSCEMSG 0x02
field RXSPLTRSP 0x01
+ dont_generate_debug_code
}
/*
* S/G Split Status 1
@@ -1065,8 +1140,9 @@
address 0x09F
access_mode RW
modes M_DFF0, M_DFF1
field RXDATABUCKET 0x01
+ dont_generate_debug_code
}
/*
* Special Function
@@ -1076,8 +1152,9 @@
access_mode RW
modes M_CFG
field TEST_GROUP 0xF0
field TEST_NUM 0x0F
+ dont_generate_debug_code
}
/*
* Data FIFO 0 PCI Status
@@ -1093,8 +1170,9 @@
field SCAAPERR 0x08
field RDPERR 0x04
field TWATERR 0x02
field DPR 0x01
+ dont_generate_debug_code
}
/*
* Data FIFO 1 PCI Status
@@ -1110,8 +1188,9 @@
field SCAAPERR 0x08
field RDPERR 0x04
field TWATERR 0x02
field DPR 0x01
+ dont_generate_debug_code
}
/*
* S/G PCI Status
@@ -1126,8 +1205,9 @@
field RTA 0x10
field SCAAPERR 0x08
field RDPERR 0x04
field DPR 0x01
+ dont_generate_debug_code
}
/*
* CMC PCI Status
@@ -1143,8 +1223,9 @@
field SCAAPERR 0x08
field RDPERR 0x04
field TWATERR 0x02
field DPR 0x01
+ dont_generate_debug_code
}
/*
* Overlay PCI Status
@@ -1159,8 +1240,9 @@
field RTA 0x10
field SCAAPERR 0x08
field RDPERR 0x04
field DPR 0x01
+ dont_generate_debug_code
}
/*
* PCI Status for MSI Master DMA Transfer
@@ -1174,8 +1256,9 @@
field RTA 0x10
field CLRPENDMSI 0x08
field TWATERR 0x02
field DPR 0x01
+ dont_generate_debug_code
}
/*
* PCI Status for Target
@@ -1187,8 +1270,9 @@
field DPE 0x80
field SSE 0x40
field STA 0x08
field TWATERR 0x02
+ dont_generate_debug_code
}
/*
* LQ Packet In
@@ -1198,8 +1282,9 @@
address 0x020
access_mode RW
size 20
modes M_DFF0, M_DFF1, M_SCSI
+ dont_generate_debug_code
}
/*
* SCB Type Pointer
@@ -1208,8 +1293,9 @@
register TYPEPTR {
address 0x020
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Queue Tag Pointer
@@ -1218,8 +1304,9 @@
register TAGPTR {
address 0x021
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Logical Unit Number Pointer
@@ -1228,8 +1315,9 @@
register LUNPTR {
address 0x022
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data Length Pointer
@@ -1238,8 +1326,9 @@
register DATALENPTR {
address 0x023
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Status Length Pointer
@@ -1248,8 +1337,9 @@
register STATLENPTR {
address 0x024
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Command Length Pointer
@@ -1258,8 +1348,9 @@
register CMDLENPTR {
address 0x025
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Task Attribute Pointer
@@ -1269,8 +1360,9 @@
register ATTRPTR {
address 0x026
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Task Management Flags Pointer
@@ -1280,8 +1372,9 @@
register FLAGPTR {
address 0x027
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Command Pointer
@@ -1290,8 +1383,9 @@
register CMDPTR {
address 0x028
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Queue Next Pointer
@@ -1300,8 +1394,9 @@
register QNEXTPTR {
address 0x029
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* SCSI ID Pointer
@@ -1311,8 +1406,9 @@
register IDPTR {
address 0x02A
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Command Aborted Byte Pointer
@@ -1322,8 +1418,9 @@
register ABRTBYTEPTR {
address 0x02B
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Command Aborted Bit Pointer
@@ -1332,8 +1429,9 @@
register ABRTBITPTR {
address 0x02C
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Rev B or greater.
@@ -1341,8 +1439,9 @@
register MAXCMDBYTES {
address 0x02D
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Rev B or greater.
@@ -1350,8 +1449,9 @@
register MAXCMD2RCV {
address 0x02E
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Rev B or greater.
@@ -1359,8 +1459,9 @@
register SHORTTHRESH {
address 0x02F
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Logical Unit Number Length
@@ -1371,8 +1472,9 @@
access_mode RW
modes M_CFG
mask ILUNLEN 0x0F
mask TLUNLEN 0xF0
+ dont_generate_debug_code
}
const LUNLEN_SINGLE_LEVEL_LUN 0xF
/*
@@ -1382,8 +1484,9 @@
register CDBLIMIT {
address 0x031
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Maximum Commands
@@ -1393,8 +1496,9 @@
register MAXCMD {
address 0x032
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* Maximum Command Counter
@@ -1403,8 +1507,9 @@
register MAXCMDCNT {
address 0x033
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* LQ Packet Reserved Bytes
@@ -1414,18 +1519,21 @@
register LQRSVD01 {
address 0x034
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
register LQRSVD16 {
address 0x035
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
register LQRSVD17 {
address 0x036
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Command Reserved 0
@@ -1435,8 +1543,9 @@
register CMDRSVD0 {
address 0x037
access_mode RW
modes M_CFG
+ dont_generate_debug_code
}
/*
* LQ Manager Control 0
@@ -1448,8 +1557,9 @@
field LQITARGCLT 0xC0
field LQIINITGCLT 0x30
field LQ0TARGCLT 0x0C
field LQ0INITGCLT 0x03
+ dont_generate_debug_code
}
/*
* LQ Manager Control 1
@@ -1460,8 +1570,9 @@
modes M_DFF0, M_DFF1, M_SCSI
field PCI2PCI 0x04
field SINGLECMD 0x02
field ABORTPENDING 0x01
+ dont_generate_debug_code
}
/*
* LQ Manager Control 2
@@ -1477,8 +1588,9 @@
field LQORETRY 0x08
field LQOCONTINUE 0x04
field LQOTOIDLE 0x02
field LQOPAUSE 0x01
+ dont_generate_debug_code
}
/*
* SCSI RAM BIST0
@@ -1492,8 +1604,9 @@
field GSBISTRUN 0x10
field OSBISTERR 0x04
field OSBISTDONE 0x02
field OSBISTRUN 0x01
+ dont_generate_debug_code
}
/*
* SCSI Sequence Control0
@@ -1518,8 +1631,9 @@
modes M_CFG
field NTBISTERR 0x04
field NTBISTDONE 0x02
field NTBISTRUN 0x01
+ dont_generate_debug_code
}
/*
* SCSI Sequence Control 1
@@ -1546,8 +1660,9 @@
field DFON 0x80
field DFPEXP 0x40
field BIOSCANCELEN 0x10
field SPIOEN 0x08
+ dont_generate_debug_code
}
/*
* SCSI Transfer Control 1
@@ -1562,8 +1677,9 @@
field STIMESEL 0x18
field ENSTIMER 0x04
field ACTNEGEN 0x02
field STPWEN 0x01
+ dont_generate_debug_code
}
/*
* SCSI Transfer Control 2
@@ -1574,8 +1690,9 @@
modes M_SCSI
field AUTORSTDIS 0x10
field CMDDMAEN 0x08
field ASU 0x07
+ dont_generate_debug_code
}
/*
* SCSI Bus Initiator IDs
@@ -1585,8 +1702,9 @@
address 0x03C
access_mode RW
modes M_CFG
size 2
+ dont_generate_debug_code
}
/*
* Data Length Counters
@@ -1596,8 +1714,9 @@
address 0x03C
access_mode RW
modes M_DFF0, M_DFF1
size 3
+ dont_generate_debug_code
}
/*
* Data FIFO Status
@@ -1634,8 +1753,9 @@
address 0x03E
access_mode RW
modes M_CFG
size 2
+ dont_generate_debug_code
}
/*
* SCSI Control Signal Out
@@ -1664,8 +1784,9 @@
P_MESGOUT CDO|MSGO,
P_STATUS CDO|IOO,
P_MESGIN CDO|IOO|MSGO
}
+ dont_generate_debug_code
}
register SCSISIGI {
address 0x041
@@ -1702,8 +1823,9 @@
address 0x040
access_mode RW
modes M_CFG
size 2
+ dont_generate_debug_code
}
/*
* SCSI Phase
@@ -1728,8 +1850,9 @@
register SCSIDAT0_IMG {
address 0x043
access_mode RW
modes M_DFF0, M_DFF1, M_SCSI
+ dont_generate_debug_code
}
/*
* SCSI Latched Data
@@ -1738,8 +1861,9 @@
address 0x044
access_mode RW
modes M_DFF0, M_DFF1, M_SCSI
size 2
+ dont_generate_debug_code
}
/*
* SCSI Data Bus
@@ -1759,8 +1883,9 @@
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
field CLKOUT 0x80
field TARGID 0x0F
+ dont_generate_debug_code
}
/*
* Selection/Reselection ID
@@ -1788,8 +1913,9 @@
field DIAGLEDON 0x40
field ENAB40 0x08 /* LVD transceiver active */
field ENAB20 0x04 /* SE/HVD transceiver active */
field SELWIDE 0x02
+ dont_generate_debug_code
}
/*
* Option Mode
@@ -1804,8 +1930,9 @@
field BUSFREEREV 0x10
field ENDGFORMCHK 0x04
field AUTO_MSGOUT_DE 0x02
mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE
+ dont_generate_debug_code
}
/*
* SCSI Status 0
@@ -1838,8 +1965,9 @@
field CLRIOERR 0x08
field CLROVERRUN 0x04
field CLRSPIORDY 0x02
field CLRARBDO 0x01
+ dont_generate_debug_code
}
/*
* SCSI Interrupt Mode 0
@@ -1890,8 +2018,9 @@
field CLRBUSFREE 0x08
field CLRSCSIPERR 0x04
field CLRSTRB2FAST 0x02
field CLRREQINIT 0x01
+ dont_generate_debug_code
}
/*
* SCSI Status 2
@@ -1923,8 +2052,9 @@
field CLRNONPACKREQ 0x20
field CLRWIDE_RES 0x04 /* Modes 0 and 1 only */
field CLRSDONE 0x02 /* Modes 0 and 1 only */
field CLRDMADONE 0x01 /* Modes 0 and 1 only */
+ dont_generate_debug_code
}
/*
* SCSI Interrupt Mode 2
@@ -1935,8 +2065,9 @@
modes M_CFG
field ENWIDE_RES 0x04
field ENSDONE 0x02
field ENDMADONE 0x01
+ dont_generate_debug_code
}
/*
* Physical Error Diagnosis
@@ -1961,8 +2092,9 @@
register LQISTATE {
address 0x04E
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* SCSI Offset Count
@@ -1979,8 +2111,9 @@
register LQOSTATE {
address 0x04F
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* LQI Manager Status
@@ -2009,8 +2142,9 @@
field CLRLQICRCT2 0x08
field CLRLQIBADLQT 0x04
field CLRLQIATNLQ 0x02
field CLRLQIATNCMD 0x01
+ dont_generate_debug_code
}
/*
* LQI Manager Interrupt Mode 0
@@ -2024,8 +2158,9 @@
field ENLQICRCT2 0x08
field ENLQIBADLQT 0x04
field ENLQIATNLQ 0x02
field ENLQIATNCMD 0x01
+ dont_generate_debug_code
}
/*
* LQI Manager Status 1
@@ -2058,8 +2193,9 @@
field CLRLQICRCI_NLQ 0x08
field CLRLQIBADLQI 0x04
field CLRLQIOVERI_LQ 0x02
field CLRLQIOVERI_NLQ 0x01
+ dont_generate_debug_code
}
/*
* LQI Manager Interrupt Mode 1
@@ -2075,8 +2211,9 @@
field ENLQICRCI_NLQ 0x08 /* LQICRCI2 */
field ENLQIBADLQI 0x04
field ENLQIOVERI_LQ 0x02 /* LQIOVERI1 */
field ENLQIOVERI_NLQ 0x01 /* LQIOVERI2 */
+ dont_generate_debug_code
}
/*
* LQI Manager Status 2
@@ -2114,8 +2251,9 @@
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
field CLRNTRAMPERR 0x02
field CLROSRAMPERR 0x01
+ dont_generate_debug_code
}
/*
* SCSI Interrupt Mode 3
@@ -2125,8 +2263,9 @@
access_mode RW
modes M_CFG
field ENNTRAMPERR 0x02
field ENOSRAMPERR 0x01
+ dont_generate_debug_code
}
/*
* LQO Manager Status 0
@@ -2153,8 +2292,9 @@
field CLRLQOSTOPT2 0x08
field CLRLQOATNLQ 0x04
field CLRLQOATNPKT 0x02
field CLRLQOTCRC 0x01
+ dont_generate_debug_code
}
/*
* LQO Manager Interrupt Mode 0
@@ -2167,8 +2307,9 @@
field ENLQOSTOPT2 0x08
field ENLQOATNLQ 0x04
field ENLQOATNPKT 0x02
field ENLQOTCRC 0x01
+ dont_generate_debug_code
}
/*
* LQO Manager Status 1
@@ -2195,8 +2336,9 @@
field CLRLQOSTOPI2 0x08
field CLRLQOBADQAS 0x04
field CLRLQOBUSFREE 0x02
field CLRLQOPHACHGINPKT 0x01
+ dont_generate_debug_code
}
/*
* LQO Manager Interrupt Mode 1
@@ -2209,8 +2351,9 @@
field ENLQOSTOPI2 0x08
field ENLQOBADQAS 0x04
field ENLQOBUSFREE 0x02
field ENLQOPHACHGINPKT 0x01
+ dont_generate_debug_code
}
/*
* LQO Manager Status 2
@@ -2231,8 +2374,9 @@
register OS_SPACE_CNT {
address 0x056
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* SCSI Interrupt Mode 1
@@ -2260,8 +2404,9 @@
address 0x058
access_mode RO
size 2
modes M_DFF0, M_DFF1, M_SCSI
+ dont_generate_debug_code
}
/*
* Data FIFO SCSI Transfer Control
@@ -2283,8 +2428,9 @@
address 0x05A
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/* Rev B only. */
register LQOSCSCTL {
@@ -2293,8 +2439,9 @@
size 1
modes M_CFG
field LQOH2A_VERSION 0x80
field LQONOCHKOVER 0x01
+ dont_generate_debug_code
}
/*
* SEQ Interrupts
@@ -2325,8 +2472,9 @@
field CLRCFG4ISTAT 0x08
field CLRCFG4TSTAT 0x04
field CLRCFG4ICMD 0x02
field CLRCFG4TCMD 0x01
+ dont_generate_debug_code
}
/*
* SEQ Interrupt Enabled (Shared)
@@ -2351,8 +2499,9 @@
address 0x05C
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Data FIFO Status
@@ -2377,8 +2526,9 @@
address 0x05d
access_mode RW
modes M_CFG
field CRCVALCHKEN 0x40
+ dont_generate_debug_code
}
/*
* SCSI Test Control
@@ -2388,8 +2538,9 @@
access_mode RW
modes M_CFG
field CNTRTEST 0x08
field SEL_TXPLL_DEBUG 0x04
+ dont_generate_debug_code
}
/*
* Data FIFO Queue Tag
@@ -2398,8 +2549,9 @@
address 0x05E
access_mode RW
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Last SCSI Control Block
@@ -2408,8 +2560,9 @@
address 0x05E
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* SCSI I/O Cell Power-down Control
@@ -2420,8 +2573,9 @@
modes M_CFG
field DISABLE_OE 0x80
field PDN_IDIST 0x04
field PDN_DIFFSENSE 0x01
+ dont_generate_debug_code
}
/*
* Shaddow Host Address.
@@ -2430,8 +2584,9 @@
address 0x060
access_mode RO
size 8
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Data Group CRC Interval.
@@ -2440,8 +2595,9 @@
address 0x060
access_mode RW
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data Transfer Negotiation Address
@@ -2449,8 +2605,9 @@
register NEGOADDR {
address 0x060
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Data Transfer Negotiation Data - Period Byte
@@ -2458,8 +2615,9 @@
register NEGPERIOD {
address 0x061
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Packetized CRC Interval
@@ -2468,8 +2626,9 @@
address 0x062
access_mode RW
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data Transfer Negotiation Data - Offset Byte
@@ -2477,8 +2636,9 @@
register NEGOFFSET {
address 0x062
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Data Transfer Negotiation Data - PPR Options
@@ -2490,8 +2650,9 @@
field PPROPT_PACE 0x08
field PPROPT_QAS 0x04
field PPROPT_DT 0x02
field PPROPT_IUT 0x01
+ dont_generate_debug_code
}
/*
* Data Transfer Negotiation Data - Connection Options
@@ -2506,8 +2667,9 @@
field ENSLOWCRC 0x08
field ENAUTOATNI 0x04
field ENAUTOATNO 0x02
field WIDEXFER 0x01
+ dont_generate_debug_code
}
/*
* Negotiation Table Annex Column Index.
@@ -2515,8 +2677,9 @@
register ANNEXCOL {
address 0x065
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
register SCSCHKN {
address 0x066
@@ -2528,8 +2691,9 @@
field SDONEMSKDIS 0x08
field DFFACTCLR 0x04
field SHVALIDSTDIS 0x02
field LSTSGCLRDIS 0x01
+ dont_generate_debug_code
}
const AHD_ANNEXCOL_PER_DEV0 4
const AHD_NUM_PER_DEV_ANNEXCOLS 4
@@ -2560,8 +2724,9 @@
register ANNEXDAT {
address 0x066
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Initiator's Own Id.
@@ -2570,8 +2735,9 @@
register IOWNID {
address 0x067
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* 960MHz Phase-Locked Loop Control 0
@@ -2586,8 +2752,9 @@
field PLL_ENLUD 0x08
field PLL_ENLPF 0x04
field PLL_DLPF 0x02
field PLL_ENFBM 0x01
+ dont_generate_debug_code
}
/*
* Target Own Id
@@ -2595,8 +2762,9 @@
register TOWNID {
address 0x069
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* 960MHz Phase-Locked Loop Control 1
@@ -2607,8 +2775,9 @@
modes M_CFG
field PLL_CNTEN 0x80
field PLL_CNTCLR 0x40
field PLL_RST 0x01
+ dont_generate_debug_code
}
/*
* Expander Signature
@@ -2616,8 +2785,9 @@
register XSIG {
address 0x06A
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Shadow Byte Count
@@ -2626,8 +2796,9 @@
address 0x068
access_mode RW
size 3
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Selection Out ID
@@ -2645,8 +2816,9 @@
address 0x06A
access_mode RO
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* 400-MHz Phase-Locked Loop Control 0
@@ -2661,8 +2833,9 @@
field PLL_ENLUD 0x08
field PLL_ENLPF 0x04
field PLL_DLPF 0x02
field PLL_ENFBM 0x01
+ dont_generate_debug_code
}
/*
* Arbitration Fairness
@@ -2671,8 +2844,9 @@
address 0x06C
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* 400-MHz Phase-Locked Loop Control 1
@@ -2683,8 +2857,9 @@
modes M_CFG
field PLL_CNTEN 0x80
field PLL_CNTCLR 0x40
field PLL_RST 0x01
+ dont_generate_debug_code
}
/*
* Arbitration Unfairness
@@ -2693,8 +2868,9 @@
address 0x06E
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* 400-MHz Phase-Locked Loop Test Count
@@ -2703,8 +2879,9 @@
address 0x06E
access_mode RO
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* SCB Page Pointer
@@ -2713,8 +2890,9 @@
address 0x0A8
access_mode RW
size 2
modes M_DFF0, M_DFF1, M_CCHAN, M_SCSI
+ dont_generate_debug_code
}
/*
* CMC SCB Array Count
@@ -2724,8 +2902,9 @@
register CCSCBACNT {
address 0x0AB
access_mode RW
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* SCB Autopointer
@@ -2739,8 +2918,9 @@
modes M_CFG
field AUSCBPTR_EN 0x80
field SCBPTR_ADDR 0x38
field SCBPTR_OFF 0x07
+ dont_generate_debug_code
}
/*
* CMC SG Ram Address Pointer
@@ -2748,8 +2928,9 @@
register CCSGADDR {
address 0x0AC
access_mode RW
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* CMC SCB RAM Address Pointer
@@ -2757,8 +2938,9 @@
register CCSCBADDR {
address 0x0AC
access_mode RW
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* CMC SCB Ram Back-up Address Pointer
@@ -2768,8 +2950,9 @@
register CCSCBADR_BK {
address 0x0AC
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* CMC SG Control
@@ -2813,8 +2996,9 @@
field SG_BIST_FAIL 0x20
field SG_BIST_EN 0x10
field CMC_BUFFER_BIST_FAIL 0x02
field CMC_BUFFER_BIST_EN 0x01
+ dont_generate_debug_code
}
/*
* CMC SG RAM Data Port
@@ -2822,8 +3006,9 @@
register CCSGRAM {
address 0x0B0
access_mode RW
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* CMC SCB RAM Data Port
@@ -2831,8 +3016,9 @@
register CCSCBRAM {
address 0x0B0
access_mode RW
modes M_CCHAN
+ dont_generate_debug_code
}
/*
* Flex DMA Address.
@@ -2841,8 +3027,9 @@
address 0x0B0
access_mode RW
size 3
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Flex DMA Byte Count
@@ -2851,8 +3038,9 @@
address 0x0B3
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Flex DMA Status
@@ -2862,8 +3050,9 @@
access_mode RW
modes M_SCSI
field FLEXDMAERR 0x02
field FLEXDMADONE 0x01
+ dont_generate_debug_code
}
/*
* Flex DMA Data Port
@@ -2871,8 +3060,9 @@
register FLEXDATA {
address 0x0B6
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Board Data
@@ -2880,8 +3070,9 @@
register BRDDAT {
address 0x0B8
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Board Control
@@ -2895,8 +3086,9 @@
field BRDADDR 0x38
field BRDEN 0x04
field BRDRW 0x02
field BRDSTB 0x01
+ dont_generate_debug_code
}
/*
* Serial EEPROM Address
@@ -2904,8 +3096,9 @@
register SEEADR {
address 0x0BA
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Serial EEPROM Data
@@ -2914,8 +3107,9 @@
address 0x0BC
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Serial EEPROM Status
@@ -2929,8 +3123,9 @@
field LDALTID_L 0x08
field SEEARBACK 0x04
field SEEBUSY 0x02
field SEESTART 0x01
+ dont_generate_debug_code
}
/*
* Serial EEPROM Control
@@ -2953,8 +3148,9 @@
mask SEEOP_WALL 0x40
mask SEEOP_EWDS 0x40
field SEERST 0x02
field SEESTART 0x01
+ dont_generate_debug_code
}
const SEEOP_ERAL_ADDR 0x80
const SEEOP_EWEN_ADDR 0xC0
@@ -2967,8 +3163,9 @@
register SCBCNT {
address 0x0BF
access_mode RW
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Data FIFO Write Address
@@ -2978,8 +3175,9 @@
address 0x0C0
access_mode RW
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* DSP Filter Control
@@ -2990,8 +3188,9 @@
modes M_CFG
field FLTRDISABLE 0x20
field EDGESENSE 0x10
field DSPFCNTSEL 0x0F
+ dont_generate_debug_code
}
/*
* DSP Data Channel Control
@@ -3003,8 +3202,9 @@
field BYPASSENAB 0x80
field DESQDIS 0x10
field RCVROFFSTDIS 0x04
field XMITOFFSTDIS 0x02
+ dont_generate_debug_code
}
/*
* Data FIFO Read Address
@@ -3014,8 +3214,9 @@
address 0x0C2
access_mode RW
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* DSP REQ Control
@@ -3025,8 +3226,9 @@
access_mode RW
modes M_CFG
field MANREQCTL 0xC0
field MANREQDLY 0x3F
+ dont_generate_debug_code
}
/*
* DSP ACK Control
@@ -3036,8 +3238,9 @@
access_mode RW
modes M_CFG
field MANACKCTL 0xC0
field MANACKDLY 0x3F
+ dont_generate_debug_code
}
/*
* Data FIFO Data
@@ -3048,8 +3251,9 @@
register DFDAT {
address 0x0C4
access_mode RW
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* DSP Channel Select
@@ -3059,8 +3263,9 @@
access_mode RW
modes M_CFG
field AUTOINCEN 0x80
field DSPSEL 0x1F
+ dont_generate_debug_code
}
const NUMDSPS 0x14
@@ -3072,8 +3277,9 @@
access_mode WO
modes M_CFG
field AUTOXBCDIS 0x80
field XMITMANVAL 0x3F
+ dont_generate_debug_code
}
/*
* Currently the WRTBIASCTL is the same as the default.
@@ -3088,8 +3294,9 @@
access_mode WO
modes M_CFG
field AUTORBCDIS 0x80
field RCVRMANVAL 0x3F
+ dont_generate_debug_code
}
/*
* Write Bias Calculator
@@ -3097,8 +3304,9 @@
register WRTBIASCALC {
address 0x0C7
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data FIFO Pointers
@@ -3108,8 +3316,9 @@
register DFPTRS {
address 0x0C8
access_mode RW
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Receiver Bias Calculator
@@ -3117,8 +3326,9 @@
register RCVRBIASCALC {
address 0x0C8
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data FIFO Backup Read Pointer
@@ -3129,8 +3339,9 @@
address 0x0C9
access_mode RW
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Skew Calculator
@@ -3138,8 +3349,9 @@
register SKEWCALC {
address 0x0C9
access_mode RO
modes M_CFG
+ dont_generate_debug_code
}
/*
* Data FIFO Debug Control
@@ -3153,8 +3365,9 @@
field DFF_DIR_ERR 0x08
field DFF_RAMBIST_FAIL 0x04
field DFF_RAMBIST_DONE 0x02
field DFF_RAMBIST_EN 0x01
+ dont_generate_debug_code
}
/*
* Data FIFO Space Count
@@ -3164,8 +3377,9 @@
address 0x0CC
access_mode RO
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Data FIFO Byte Count
@@ -3175,8 +3389,9 @@
address 0x0CE
access_mode RO
size 2
modes M_DFF0, M_DFF1
+ dont_generate_debug_code
}
/*
* Sequencer Program Overlay Address.
@@ -3186,8 +3401,9 @@
address 0x0D4
modes M_SCSI
size 2
access_mode RW
+ dont_generate_debug_code
}
/*
* Sequencer Control 0
@@ -3217,8 +3433,9 @@
field OVRLAY_DATA_CHK 0x08
field RAMBIST_DONE 0x04
field RAMBIST_FAIL 0x02
field RAMBIST_EN 0x01
+ dont_generate_debug_code
}
/*
* Sequencer Flags
@@ -3228,8 +3445,9 @@
address 0x0D8
access_mode RO
field ZERO 0x02
field CARRY 0x01
+ dont_generate_debug_code
}
/*
* Sequencer Interrupt Control
@@ -3255,8 +3473,9 @@
*/
register SEQRAM {
address 0x0DA
access_mode RW
+ dont_generate_debug_code
}
/*
* Sequencer Program Counter
@@ -3265,8 +3484,9 @@
register PRGMCNT {
address 0x0DE
access_mode RW
size 2
+ dont_generate_debug_code
}
/*
* Accumulator
@@ -3274,8 +3494,9 @@
register ACCUM {
address 0x0E0
access_mode RW
accumulator
+ dont_generate_debug_code
}
/*
* Source Index Register
@@ -3290,8 +3511,9 @@
address 0x0E2
access_mode RW
size 2
sindex
+ dont_generate_debug_code
}
/*
* Destination Index Register
@@ -3300,8 +3522,9 @@
register DINDEX {
address 0x0E4
access_mode RW
size 2
+ dont_generate_debug_code
}
/*
* Break Address
@@ -3309,14 +3532,16 @@
*/
register BRKADDR0 {
address 0x0E6
access_mode RW
+ dont_generate_debug_code
}
register BRKADDR1 {
address 0x0E6
access_mode RW
field BRKDIS 0x80 /* Disable Breakpoint */
+ dont_generate_debug_code
}
/*
* All Ones
@@ -3325,8 +3550,9 @@
register ALLONES {
address 0x0E8
access_mode RO
allones
+ dont_generate_debug_code
}
/*
* All Zeros
@@ -3335,8 +3561,9 @@
register ALLZEROS {
address 0x0EA
access_mode RO
allzeros
+ dont_generate_debug_code
}
/*
* No Destination
@@ -3345,8 +3572,9 @@
register NONE {
address 0x0EA
access_mode WO
none
+ dont_generate_debug_code
}
/*
* Source Index Indirect
@@ -3355,8 +3583,9 @@
*/
register SINDIR {
address 0x0EC
access_mode RO
+ dont_generate_debug_code
}
/*
* Destination Index Indirect
@@ -3365,8 +3594,9 @@
*/
register DINDIR {
address 0x0ED
access_mode WO
+ dont_generate_debug_code
}
/*
* Function One
@@ -3379,8 +3609,9 @@
*/
register FUNCTION1 {
address 0x0F0
access_mode RW
+ dont_generate_debug_code
}
/*
* Stack
@@ -3389,8 +3620,9 @@
*/
register STACK {
address 0x0F2
access_mode RW
+ dont_generate_debug_code
}
/*
* Interrupt Vector 1 Address
@@ -3400,8 +3632,9 @@
address 0x0F4
access_mode RW
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* Current Address
@@ -3411,8 +3644,9 @@
address 0x0F4
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
/*
* Interrupt Vector 2 Address
@@ -3422,8 +3656,9 @@
address 0x0F6
access_mode RW
size 2
modes M_CFG
+ dont_generate_debug_code
}
/*
* Last Address
@@ -3433,15 +3668,17 @@
address 0x0F6
access_mode RW
size 2
modes M_SCSI
+ dont_generate_debug_code
}
register AHD_PCI_CONFIG_BASE {
address 0x100
access_mode RW
size 256
modes M_CFG
+ dont_generate_debug_code
}
/* ---------------------- Scratch RAM Offsets ------------------------- */
scratch_ram {
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aic7xxx.reg Thu Apr 24 07:48:38 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic7xxx.reg Fri Apr 25 04:24:14 2008
@@ -50,8 +50,14 @@
* Adaptec's Technical Documents Department 1-800-934-2766
*/
/*
+ * Registers marked "dont_generate_debug_code" are not (yet) referenced
+ * from the driver code, and this keyword inhibit generation
+ * of debug code for them.
+ */
+
+/*
* SCSI Sequence Control (p. 3-11).
* Each bit, when set starts a specific SCSI sequence on the bus
*/
register SCSISEQ {
@@ -96,8 +102,9 @@
mask STIMESEL 0x18
field ENSTIMER 0x04
field ACTNEGEN 0x02
field STPWEN 0x01 /* Powered Termination */
+ dont_generate_debug_code
}
/*
* SCSI Control Signal Read Register (p. 3-15).
@@ -154,8 +161,9 @@
mask P_COMMAND CDI
mask P_MESGOUT CDI|MSGI
mask P_STATUS CDI|IOI
mask P_MESGIN CDI|IOI|MSGI
+ dont_generate_debug_code
}
/*
* SCSI Rate Control (p. 3-17).
@@ -193,8 +201,9 @@
* and narrow mode.
*/
alias SCSIOFFSET
mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */
+ dont_generate_debug_code
}
/*
* SCSI Latched Data (p. 3-19).
@@ -204,13 +213,15 @@
*/
register SCSIDATL {
address 0x006
access_mode RW
+ dont_generate_debug_code
}
register SCSIDATH {
address 0x007
access_mode RW
+ dont_generate_debug_code
}
/*
* SCSI Transfer Count (pp. 3-19,20)
@@ -222,8 +233,9 @@
register STCNT {
address 0x008
size 3
access_mode RW
+ dont_generate_debug_code
}
/* ALT_MODE registers (Ultra2 and Ultra160 chips) */
register SXFRCTL2 {
@@ -231,8 +243,9 @@
access_mode RW
field AUTORSTDIS 0x10
field CMDDMAEN 0x08
mask ASYNC_SETUP 0x07
+ dont_generate_debug_code
}
/* ALT_MODE register on Ultra160 chips */
register OPTIONMODE {
@@ -246,15 +259,17 @@
field SCSIDATL_IMGEN 0x04
field AUTO_MSGOUT_DE 0x02
field DIS_MSGIN_DUALEDGE 0x01
mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE
+ dont_generate_debug_code
}
/* ALT_MODE register on Ultra160 chips */
register TARGCRCCNT {
address 0x00a
size 2
access_mode RW
+ dont_generate_debug_code
}
/*
* Clear SCSI Interrupt 0 (p. 3-20)
@@ -268,8 +283,9 @@
field CLRSELINGO 0x10
field CLRSWRAP 0x08
field CLRIOERR 0x08 /* Ultra2 Only */
field CLRSPIORDY 0x02
+ dont_generate_debug_code
}
/*
* SCSI Status 0 (p. 3-21)
@@ -303,8 +319,9 @@
field CLRBUSFREE 0x08
field CLRSCSIPERR 0x04
field CLRPHASECHG 0x02
field CLRREQINIT 0x01
+ dont_generate_debug_code
}
/*
* SCSI Status 1 (p. 3-24)
@@ -356,8 +373,9 @@
address 0x00f
access_mode RW
mask TID 0xf0 /* Target ID mask */
mask OID 0x0f /* Our ID mask */
+ dont_generate_debug_code
}
/*
* SCSI Interrupt Mode 1 (p. 3-28)
@@ -406,8 +424,9 @@
register SCSIBUSH {
address 0x013
access_mode RW
+ dont_generate_debug_code
}
/*
* SCSI/Host Address (p. 3-30)
@@ -420,8 +439,9 @@
register SHADDR {
address 0x014
size 4
access_mode RO
+ dont_generate_debug_code
}
/*
* Selection Timeout Timer (p. 3-30)
@@ -435,8 +455,9 @@
field STAGE3 0x04
field STAGE2 0x02
field STAGE1 0x01
alias TARGIDIN
+ dont_generate_debug_code
}
/*
* Selection/Reselection ID (p. 3-31)
@@ -447,8 +468,9 @@
address 0x019
access_mode RW
mask SELID_MASK 0xf0
field ONEBIT 0x08
+ dont_generate_debug_code
}
register SCAMCTL {
address 0x01a
@@ -457,8 +479,9 @@
field CLRSCAMSELID 0x40
field ALTSTIM 0x20
field DFLTTID 0x10
mask SCAMLVL 0x03
+ dont_generate_debug_code
}
/*
* Target Mode Selecting in ID bitmask (aic7890/91/96/97)
@@ -466,8 +489,9 @@
register TARGID {
address 0x01b
size 2
access_mode RW
+ dont_generate_debug_code
}
/*
* Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
@@ -487,8 +511,9 @@
field SEEPROM 0x08 /* External serial eeprom logic */
field EEPROM 0x04 /* Writable external BIOS ROM */
field ROM 0x02 /* Logic for accessing external ROM */
field SSPIOCPS 0x01 /* Termination and cable detection */
+ dont_generate_debug_code
}
register BRDCTL {
address 0x01d
@@ -505,8 +530,9 @@
field BRDDAT3 0x08
field BRDDAT2 0x04
field BRDRW_ULTRA2 0x02
field BRDSTB_ULTRA2 0x01
+ dont_generate_debug_code
}
/*
* Serial EEPROM Control (p. 4-92 in 7870 Databook)
@@ -541,8 +567,9 @@
field SEECS 0x08
field SEECK 0x04
field SEEDO 0x02
field SEEDI 0x01
+ dont_generate_debug_code
}
/*
* SCSI Block Control (p. 3-32)
* Controls Bus type and channel selection. In a twin channel configuration
@@ -589,8 +616,9 @@
*/
register SEQRAM {
address 0x061
access_mode RW
+ dont_generate_debug_code
}
/*
* Sequencer Address Registers (p. 3-35)
@@ -598,14 +626,16 @@
*/
register SEQADDR0 {
address 0x062
access_mode RW
+ dont_generate_debug_code
}
register SEQADDR1 {
address 0x063
access_mode RW
mask SEQADDR1_MASK 0x01
+ dont_generate_debug_code
}
/*
* Accumulator
@@ -614,64 +644,76 @@
register ACCUM {
address 0x064
access_mode RW
accumulator
+ dont_generate_debug_code
+ dont_generate_debug_code
}
register SINDEX {
address 0x065
access_mode RW
sindex
+ dont_generate_debug_code
}
register DINDEX {
address 0x066
access_mode RW
+ dont_generate_debug_code
}
register ALLONES {
address 0x069
access_mode RO
allones
+ dont_generate_debug_code
}
register ALLZEROS {
address 0x06a
access_mode RO
allzeros
+ dont_generate_debug_code
}
register NONE {
address 0x06a
access_mode WO
none
+ dont_generate_debug_code
}
register FLAGS {
address 0x06b
access_mode RO
field ZERO 0x02
field CARRY 0x01
+ dont_generate_debug_code
}
register SINDIR {
address 0x06c
access_mode RO
+ dont_generate_debug_code
}
register DINDIR {
address 0x06d
access_mode WO
+ dont_generate_debug_code
}
register FUNCTION1 {
address 0x06e
access_mode RW
+ dont_generate_debug_code
}
register STACK {
address 0x06f
access_mode RO
+ dont_generate_debug_code
}
const STACK_SIZE 4
@@ -682,8 +724,9 @@
address 0x084
access_mode RW
field ACE 0x08
field ENABLE 0x01
+ dont_generate_debug_code
}
/*
* On the aic78X0 chips, Board Control is replaced by the DSCommand
@@ -700,16 +743,18 @@
field INTSCBRAMSEL 0x08 /* Internal SCB RAM Select */
field RAMPS 0x04 /* External SCB RAM Present */
field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */
field CIOPARCKEN 0x01 /* Internal bus parity error enable */
+ dont_generate_debug_code
}
register DSCOMMAND1 {
address 0x085
access_mode RW
mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */
field HADDLDSEL1 0x02 /* Host Address Load Select Bits */
field HADDLDSEL0 0x01
+ dont_generate_debug_code
}
/*
* Bus On/Off Time (p. 3-44) aic7770 only
@@ -718,8 +763,9 @@
address 0x085
access_mode RW
mask BOFF 0xf0
mask BON 0x0f
+ dont_generate_debug_code
}
/*
* Bus Speed (p. 3-45) aic7770 only
@@ -731,22 +777,25 @@
mask STBOFF 0x38
mask STBON 0x07
mask DFTHRSH_100 0xc0
mask DFTHRSH_75 0x80
+ dont_generate_debug_code
}
/* aic7850/55/60/70/80/95 only */
register DSPCISTATUS {
address 0x086
mask DFTHRSH_100 0xc0
+ dont_generate_debug_code
}
/* aic7890/91/96/97 only */
register HS_MAILBOX {
address 0x086
mask HOST_MAILBOX 0xF0
mask SEQ_MAILBOX 0x0F
mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
+ dont_generate_debug_code
}
const HOST_MAILBOX_SHIFT 4
const SEQ_MAILBOX_SHIFT 0
@@ -764,8 +813,9 @@
field PAUSE 0x04
field INTEN 0x02
field CHIPRST 0x01
field CHIPRSTACK 0x01
+ dont_generate_debug_code
}
/*
* Host Address (p. 3-48)
@@ -775,14 +825,16 @@
register HADDR {
address 0x088
size 4
access_mode RW
+ dont_generate_debug_code
}
register HCNT {
address 0x08c
size 3
access_mode RW
+ dont_generate_debug_code
}
/*
* SCB Pointer (p. 3-49)
@@ -790,8 +842,9 @@
*/
register SCBPTR {
address 0x090
access_mode RW
+ dont_generate_debug_code
}
/*
* Interrupt Status (p. 3-50)
@@ -858,8 +911,9 @@
mask OUT_OF_RANGE 0xe0|SEQINT
mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */
mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT)
+ dont_generate_debug_code
}
/*
* Hard Error (p. 3-53)
@@ -889,8 +943,9 @@
field CLRBRKADRINT 0x08
field CLRSCSIINT 0x04
field CLRCMDINT 0x02
field CLRSEQINT 0x01
+ dont_generate_debug_code
}
register DFCNTRL {
address 0x093
@@ -922,18 +977,21 @@
register DFWADDR {
address 0x95
access_mode RW
+ dont_generate_debug_code
}
register DFRADDR {
address 0x97
access_mode RW
+ dont_generate_debug_code
}
register DFDAT {
address 0x099
access_mode RW
+ dont_generate_debug_code
}
/*
* SCB Auto Increment (p. 3-59)
@@ -944,8 +1002,9 @@
address 0x09a
access_mode RW
field SCBAUTO 0x80
mask SCBCNT_MASK 0x1f
+ dont_generate_debug_code
}
/*
* Queue In FIFO (p. 3-60)
@@ -953,8 +1012,9 @@
*/
register QINFIFO {
address 0x09b
access_mode RW
+ dont_generate_debug_code
}
/*
* Queue In Count (p. 3-60)
@@ -962,8 +1022,9 @@
*/
register QINCNT {
address 0x09c
access_mode RO
+ dont_generate_debug_code
}
/*
* Queue Out FIFO (p. 3-61)
@@ -971,8 +1032,9 @@
*/
register QOUTFIFO {
address 0x09d
access_mode WO
+ dont_generate_debug_code
}
register CRCCONTROL1 {
address 0x09d
@@ -982,8 +1044,9 @@
field CRCENDCHKEN 0x20
field CRCREQCHKEN 0x10
field TARGCRCENDEN 0x08
field TARGCRCCNTEN 0x04
+ dont_generate_debug_code
}
/*
@@ -992,8 +1055,9 @@
*/
register QOUTCNT {
address 0x09e
access_mode RO
+ dont_generate_debug_code
}
register SCSIPHASE {
address 0x09e
@@ -1013,8 +1077,9 @@
register SFUNCT {
address 0x09f
access_mode RW
field ALT_MODE 0x80
+ dont_generate_debug_code
}
/*
* SCB Definition (p. 5-4)
@@ -1120,8 +1185,9 @@
access_mode RW
field CS_2840 0x04
field CK_2840 0x02
field DO_2840 0x01
+ dont_generate_debug_code
}
register STATUS_2840 {
address 0x0c1
@@ -1129,39 +1195,46 @@
field EEPROM_TF 0x80
mask BIOS_SEL 0x60
mask ADSEL 0x1e
field DI_2840 0x01
+ dont_generate_debug_code
}
/* --------------------- AIC-7870-only definitions -------------------- */
register CCHADDR {
address 0x0E0
size 8
+ dont_generate_debug_code
}
register CCHCNT {
address 0x0E8
+ dont_generate_debug_code
}
register CCSGRAM {
address 0x0E9
+ dont_generate_debug_code
}
register CCSGADDR {
address 0x0EA
+ dont_generate_debug_code
}
register CCSGCTL {
address 0x0EB
field CCSGDONE 0x80
field CCSGEN 0x08
field SG_FETCH_NEEDED 0x02 /* Bit used for software state */
field CCSGRESET 0x01
+ dont_generate_debug_code
}
register CCSCBCNT {
address 0xEF
+ dont_generate_debug_code
}
register CCSCBCTL {
address 0x0EE
@@ -1170,40 +1243,48 @@
field CCARREN 0x10
field CCSCBEN 0x08
field CCSCBDIR 0x04
field CCSCBRESET 0x01
+ dont_generate_debug_code
}
register CCSCBADDR {
address 0x0ED
+ dont_generate_debug_code
}
register CCSCBRAM {
address 0xEC
+ dont_generate_debug_code
}
/*
* SCB bank address (7895/7896/97 only)
*/
register SCBBADDR {
address 0x0F0
access_mode RW
+ dont_generate_debug_code
}
register CCSCBPTR {
address 0x0F1
+ dont_generate_debug_code
}
register HNSCB_QOFF {
address 0x0F4
+ dont_generate_debug_code
}
register SNSCB_QOFF {
address 0x0F6
+ dont_generate_debug_code
}
register SDSCB_QOFF {
address 0x0F8
+ dont_generate_debug_code
}
register QOFF_CTLSTA {
address 0x0FA
@@ -1211,8 +1292,9 @@
field SNSCB_ROLLOVER 0x20
field SDSCB_ROLLOVER 0x10
mask SCB_QSIZE 0x07
mask SCB_QSIZE_256 0x06
+ dont_generate_debug_code
}
register DFF_THRSH {
address 0x0FB
@@ -1233,24 +1315,27 @@
mask WR_DFTHRSH_75 0x40
mask WR_DFTHRSH_85 0x50
mask WR_DFTHRSH_90 0x60
mask WR_DFTHRSH_MAX 0x70
+ dont_generate_debug_code
}
register SG_CACHE_PRE {
access_mode WO
address 0x0fc
mask SG_ADDR_MASK 0xf8
field LAST_SEG 0x02
field LAST_SEG_DONE 0x01
+ dont_generate_debug_code
}
register SG_CACHE_SHADOW {
access_mode RO
address 0x0fc
mask SG_ADDR_MASK 0xf8
field LAST_SEG 0x02
field LAST_SEG_DONE 0x01
+ dont_generate_debug_code
}
/* ---------------------- Scratch RAM Offsets ------------------------- */
/* These offsets are either to values that are initialized by the board's
* BIOS or are specified by the sequencer code.
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aicasm/aicasm.c Fri Apr 25 04:14:19 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aicasm/aicasm.c Thu Apr 24 08:11:47 2008
@@ -361,9 +361,9 @@
" * from the following source files:\n"
" *\n"
"%s */\n", versions);
- fprintf(ofile, "static uint8_t seqprog[] = {\n");
+ fprintf(ofile, "static const uint8_t seqprog[] = {\n");
for (cur_instr = STAILQ_FIRST(&seq_program);
cur_instr != NULL;
cur_instr = STAILQ_NEXT(cur_instr, links)) {
@@ -414,9 +414,9 @@
cur_node->symbol->name);
}
fprintf(ofile,
-"static struct patch {\n"
+"static const struct patch {\n"
" %spatch_func_t *patch_func;\n"
" uint32_t begin :10,\n"
" skip_instr :10,\n"
" skip_patch :12;\n"
@@ -434,9 +434,9 @@
fprintf(ofile, "\n};\n\n");
fprintf(ofile,
-"static struct cs {\n"
+"static const struct cs {\n"
" uint16_t begin;\n"
" uint16_t end;\n"
"} critical_sections[] = {\n");
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y Fri Apr 25 02:49:37 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y Fri Apr 25 01:29:31 2008
@@ -144,8 +144,10 @@
%token <value> T_ADDRESS
%token T_ACCESS_MODE
+%token T_DONT_GENERATE_DEBUG_CODE
+
%token T_MODES
%token T_DEFINE
@@ -353,8 +355,9 @@
reg_attribute:
reg_address
| size
| access_mode
+| dont_generate_debug_code
| modes
| field_defn
| enum_defn
| mask_defn
@@ -396,8 +399,15 @@
access_mode:
T_ACCESS_MODE T_MODE
{
cur_symbol->info.rinfo->mode = $2;
+ }
+;
+
+dont_generate_debug_code:
+ T_DONT_GENERATE_DEBUG_CODE
+ {
+ cur_symbol->dont_generate_debug_code = 1;
}
;
modes:
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l Fri Apr 25 02:49:37 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l Fri Apr 25 01:34:51 2008
@@ -162,8 +162,9 @@
const { yylval.value = FALSE; return T_CONST; }
download { return T_DOWNLOAD; }
address { return T_ADDRESS; }
access_mode { return T_ACCESS_MODE; }
+dont_generate_debug_code { return T_DONT_GENERATE_DEBUG_CODE; }
modes { return T_MODES; }
RW|RO|WO {
if (strcmp(yytext, "RW") == 0)
yylval.value = RW;
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c Fri Apr 25 01:40:02 2008
@@ -369,9 +369,9 @@
if (dfile == NULL)
return;
fprintf(dfile,
-"static %sreg_parse_entry_t %s_parse_table[] = {\n",
+"static const %sreg_parse_entry_t %s_parse_table[] = {\n",
prefix,
regnode->symbol->name);
}
@@ -529,8 +529,11 @@
aic_print_reg_dump_types(ofile);
aic_print_file_prologue(dfile);
aic_print_include(dfile, stock_include_file);
SLIST_FOREACH(curnode, ®isters, links) {
+
+ if (curnode->symbol->dont_generate_debug_code)
+ continue;
switch(curnode->symbol->type) {
case REGISTER:
case SCBLOC:
--- scsi-misc-2.6-2008_04_15.p3/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h Fri Apr 25 01:30:02 2008
@@ -135,9 +135,10 @@
struct alias_info *ainfo;
struct label_info *linfo;
struct cond_info *condinfo;
struct macro_info *macroinfo;
- }info;
+ } info;
+ int dont_generate_debug_code;
} symbol_t;
typedef struct symbol_ref {
symbol_t *symbol;
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 5/5] aic7xxx: update shipped files
2008-04-25 2:41 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Denys Vlasenko
@ 2008-04-25 2:44 ` Denys Vlasenko
2008-04-25 13:03 ` Hannes Reinecke
2008-04-25 13:01 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Hannes Reinecke
1 sibling, 1 reply; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-25 2:44 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 143 bytes --]
After previous patch shipped files are out of sync.
This patch updates them.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
--
vda
[-- Attachment #2: aic_debloat_5.diff --]
[-- Type: text/x-diff, Size: 196903 bytes --]
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped Fri Apr 25 02:34:36 2008
@@ -12,71 +12,15 @@
uint8_t mask;
} ahd_reg_parse_entry_t;
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_mode_ptr_print;
-#else
-#define ahd_mode_ptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MODE_PTR", 0x00, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intstat_print;
#else
#define ahd_intstat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seqintcode_print;
-#else
-#define ahd_seqintcode_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEQINTCODE", 0x02, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrint_print;
-#else
-#define ahd_clrint_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRINT", 0x03, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_error_print;
-#else
-#define ahd_error_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ERROR", 0x04, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrerr_print;
-#else
-#define ahd_clrerr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRERR", 0x04, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hcntrl_print;
-#else
-#define ahd_hcntrl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HCNTRL", 0x05, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hnscb_qoff_print;
-#else
-#define ahd_hnscb_qoff_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HNSCB_QOFF", 0x06, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hescb_qoff_print;
-#else
-#define ahd_hescb_qoff_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HESCB_QOFF", 0x08, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hs_mailbox_print;
#else
#define ahd_hs_mailbox_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap)
@@ -89,50 +33,8 @@
ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrseqintstat_print;
-#else
-#define ahd_clrseqintstat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_swtimer_print;
-#else
-#define ahd_swtimer_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SWTIMER", 0x0e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_snscb_qoff_print;
-#else
-#define ahd_snscb_qoff_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SNSCB_QOFF", 0x10, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sescb_qoff_print;
-#else
-#define ahd_sescb_qoff_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SESCB_QOFF", 0x12, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sdscb_qoff_print;
-#else
-#define ahd_sdscb_qoff_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SDSCB_QOFF", 0x14, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_qoff_ctlsta_print;
-#else
-#define ahd_qoff_ctlsta_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "QOFF_CTLSTA", 0x16, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intctl_print;
#else
#define ahd_intctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap)
@@ -145,15 +47,8 @@
ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dscommand0_print;
-#else
-#define ahd_dscommand0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSCOMMAND0", 0x19, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dfstatus_print;
#else
#define ahd_dfstatus_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap)
@@ -166,232 +61,8 @@
ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_arbctl_print;
-#else
-#define ahd_arbctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ARBCTL", 0x1b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sg_cache_pre_print;
-#else
-#define ahd_sg_cache_pre_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SG_CACHE_PRE", 0x1b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqin_print;
-#else
-#define ahd_lqin_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQIN", 0x20, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_typeptr_print;
-#else
-#define ahd_typeptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TYPEPTR", 0x20, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_tagptr_print;
-#else
-#define ahd_tagptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TAGPTR", 0x21, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lunptr_print;
-#else
-#define ahd_lunptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LUNPTR", 0x22, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_datalenptr_print;
-#else
-#define ahd_datalenptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DATALENPTR", 0x23, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_statlenptr_print;
-#else
-#define ahd_statlenptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "STATLENPTR", 0x24, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmdlenptr_print;
-#else
-#define ahd_cmdlenptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMDLENPTR", 0x25, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_attrptr_print;
-#else
-#define ahd_attrptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ATTRPTR", 0x26, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flagptr_print;
-#else
-#define ahd_flagptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLAGPTR", 0x27, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmdptr_print;
-#else
-#define ahd_cmdptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMDPTR", 0x28, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_qnextptr_print;
-#else
-#define ahd_qnextptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "QNEXTPTR", 0x29, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_idptr_print;
-#else
-#define ahd_idptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "IDPTR", 0x2a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_abrtbyteptr_print;
-#else
-#define ahd_abrtbyteptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ABRTBYTEPTR", 0x2b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_abrtbitptr_print;
-#else
-#define ahd_abrtbitptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ABRTBITPTR", 0x2c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmdbytes_print;
-#else
-#define ahd_maxcmdbytes_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMDBYTES", 0x2d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmd2rcv_print;
-#else
-#define ahd_maxcmd2rcv_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMD2RCV", 0x2e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_shortthresh_print;
-#else
-#define ahd_shortthresh_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SHORTTHRESH", 0x2f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lunlen_print;
-#else
-#define ahd_lunlen_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LUNLEN", 0x30, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cdblimit_print;
-#else
-#define ahd_cdblimit_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CDBLIMIT", 0x31, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmd_print;
-#else
-#define ahd_maxcmd_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMD", 0x32, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmdcnt_print;
-#else
-#define ahd_maxcmdcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMDCNT", 0x33, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd01_print;
-#else
-#define ahd_lqrsvd01_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD01", 0x34, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd16_print;
-#else
-#define ahd_lqrsvd16_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD16", 0x35, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd17_print;
-#else
-#define ahd_lqrsvd17_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD17", 0x36, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmdrsvd0_print;
-#else
-#define ahd_cmdrsvd0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMDRSVD0", 0x37, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqctl0_print;
-#else
-#define ahd_lqctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQCTL0", 0x38, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqctl1_print;
-#else
-#define ahd_lqctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQCTL1", 0x38, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsbist0_print;
-#else
-#define ahd_scsbist0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSBIST0", 0x39, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqctl2_print;
-#else
-#define ahd_lqctl2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQCTL2", 0x39, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsbist1_print;
-#else
-#define ahd_scsbist1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSBIST1", 0x3a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsiseq0_print;
#else
#define ahd_scsiseq0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap)
@@ -404,71 +75,15 @@
ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sxfrctl0_print;
-#else
-#define ahd_sxfrctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SXFRCTL0", 0x3c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dlcount_print;
-#else
-#define ahd_dlcount_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DLCOUNT", 0x3c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_businitid_print;
-#else
-#define ahd_businitid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BUSINITID", 0x3c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sxfrctl1_print;
-#else
-#define ahd_sxfrctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SXFRCTL1", 0x3d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_bustargid_print;
-#else
-#define ahd_bustargid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BUSTARGID", 0x3e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sxfrctl2_print;
-#else
-#define ahd_sxfrctl2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SXFRCTL2", 0x3e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dffstat_print;
#else
#define ahd_dffstat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsisigo_print;
-#else
-#define ahd_scsisigo_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_multargid_print;
-#else
-#define ahd_multargid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MULTARGID", 0x40, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsisigi_print;
#else
#define ahd_scsisigi_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSISIGI", 0x41, regvalue, cur_col, wrap)
@@ -481,64 +96,22 @@
ahd_print_register(NULL, 0, "SCSIPHASE", 0x42, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsidat0_img_print;
-#else
-#define ahd_scsidat0_img_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSIDAT0_IMG", 0x43, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsidat_print;
-#else
-#define ahd_scsidat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSIDAT", 0x44, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsibus_print;
#else
#define ahd_scsibus_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSIBUS", 0x46, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_targidin_print;
-#else
-#define ahd_targidin_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TARGIDIN", 0x48, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_selid_print;
#else
#define ahd_selid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SELID", 0x49, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_optionmode_print;
-#else
-#define ahd_optionmode_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OPTIONMODE", 0x4a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sblkctl_print;
-#else
-#define ahd_sblkctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SBLKCTL", 0x4a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint0_print;
-#else
-#define ahd_clrsint0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT0", 0x4b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat0_print;
#else
#define ahd_sstat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap)
@@ -551,15 +124,8 @@
ahd_print_register(NULL, 0, "SIMODE0", 0x4b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint1_print;
-#else
-#define ahd_clrsint1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT1", 0x4c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat1_print;
#else
#define ahd_sstat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT1", 0x4c, regvalue, cur_col, wrap)
@@ -572,92 +138,36 @@
ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_simode2_print;
-#else
-#define ahd_simode2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SIMODE2", 0x4d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint2_print;
-#else
-#define ahd_clrsint2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT2", 0x4d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_perrdiag_print;
#else
#define ahd_perrdiag_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "PERRDIAG", 0x4e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqistate_print;
-#else
-#define ahd_lqistate_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQISTATE", 0x4e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_soffcnt_print;
#else
#define ahd_soffcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SOFFCNT", 0x4f, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqostate_print;
-#else
-#define ahd_lqostate_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQOSTATE", 0x4f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat0_print;
#else
#define ahd_lqistat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrlqiint0_print;
-#else
-#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqimode0_print;
-#else
-#define ahd_lqimode0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqimode1_print;
-#else
-#define ahd_lqimode1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQIMODE1", 0x51, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat1_print;
#else
#define ahd_lqistat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT1", 0x51, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrlqiint1_print;
-#else
-#define ahd_clrlqiint1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRLQIINT1", 0x51, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat2_print;
#else
#define ahd_lqistat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT2", 0x52, regvalue, cur_col, wrap)
@@ -670,134 +180,50 @@
ahd_print_register(NULL, 0, "SSTAT3", 0x53, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_simode3_print;
-#else
-#define ahd_simode3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SIMODE3", 0x53, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint3_print;
-#else
-#define ahd_clrsint3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT3", 0x53, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat0_print;
#else
#define ahd_lqostat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT0", 0x54, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrlqoint0_print;
-#else
-#define ahd_clrlqoint0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRLQOINT0", 0x54, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqomode0_print;
-#else
-#define ahd_lqomode0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQOMODE0", 0x54, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqomode1_print;
-#else
-#define ahd_lqomode1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQOMODE1", 0x55, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat1_print;
#else
#define ahd_lqostat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT1", 0x55, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrlqoint1_print;
-#else
-#define ahd_clrlqoint1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRLQOINT1", 0x55, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat2_print;
#else
#define ahd_lqostat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT2", 0x56, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_os_space_cnt_print;
-#else
-#define ahd_os_space_cnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OS_SPACE_CNT", 0x56, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_simode1_print;
#else
#define ahd_simode1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SIMODE1", 0x57, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_gsfifo_print;
-#else
-#define ahd_gsfifo_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "GSFIFO", 0x58, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dffsxfrctl_print;
#else
#define ahd_dffsxfrctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqoscsctl_print;
-#else
-#define ahd_lqoscsctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQOSCSCTL", 0x5a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_nextscb_print;
-#else
-#define ahd_nextscb_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEXTSCB", 0x5a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrseqintsrc_print;
-#else
-#define ahd_clrseqintsrc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSEQINTSRC", 0x5b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintsrc_print;
#else
#define ahd_seqintsrc_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQINTSRC", 0x5b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_currscb_print;
-#else
-#define ahd_currscb_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqimode_print;
#else
#define ahd_seqimode_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap)
@@ -810,638 +236,29 @@
ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_crccontrol_print;
-#else
-#define ahd_crccontrol_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CRCCONTROL", 0x5d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfftag_print;
-#else
-#define ahd_dfftag_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFFTAG", 0x5e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lastscb_print;
-#else
-#define ahd_lastscb_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LASTSCB", 0x5e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsitest_print;
-#else
-#define ahd_scsitest_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSITEST", 0x5e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_iopdnctl_print;
-#else
-#define ahd_iopdnctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "IOPDNCTL", 0x5f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_shaddr_print;
-#else
-#define ahd_shaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SHADDR", 0x60, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_negoaddr_print;
-#else
-#define ahd_negoaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEGOADDR", 0x60, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dgrpcrci_print;
-#else
-#define ahd_dgrpcrci_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DGRPCRCI", 0x60, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_negperiod_print;
-#else
-#define ahd_negperiod_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEGPERIOD", 0x61, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_packcrci_print;
-#else
-#define ahd_packcrci_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PACKCRCI", 0x62, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_negoffset_print;
-#else
-#define ahd_negoffset_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEGOFFSET", 0x62, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_negppropts_print;
-#else
-#define ahd_negppropts_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEGPPROPTS", 0x63, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_negconopts_print;
-#else
-#define ahd_negconopts_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NEGCONOPTS", 0x64, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_annexcol_print;
-#else
-#define ahd_annexcol_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ANNEXCOL", 0x65, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_annexdat_print;
-#else
-#define ahd_annexdat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ANNEXDAT", 0x66, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scschkn_print;
-#else
-#define ahd_scschkn_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSCHKN", 0x66, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_iownid_print;
-#else
-#define ahd_iownid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "IOWNID", 0x67, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960ctl0_print;
-#else
-#define ahd_pll960ctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CTL0", 0x68, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_shcnt_print;
-#else
-#define ahd_shcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SHCNT", 0x68, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_townid_print;
-#else
-#define ahd_townid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TOWNID", 0x69, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960ctl1_print;
-#else
-#define ahd_pll960ctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CTL1", 0x69, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960cnt0_print;
-#else
-#define ahd_pll960cnt0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CNT0", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_xsig_print;
-#else
-#define ahd_xsig_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "XSIG", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seloid_print;
#else
#define ahd_seloid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SELOID", 0x6b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400ctl0_print;
-#else
-#define ahd_pll400ctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CTL0", 0x6c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_fairness_print;
-#else
-#define ahd_fairness_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FAIRNESS", 0x6c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400ctl1_print;
-#else
-#define ahd_pll400ctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CTL1", 0x6d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_unfairness_print;
-#else
-#define ahd_unfairness_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "UNFAIRNESS", 0x6e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400cnt0_print;
-#else
-#define ahd_pll400cnt0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CNT0", 0x6e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_haddr_print;
-#else
-#define ahd_haddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_plldelay_print;
-#else
-#define ahd_plldelay_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLLDELAY", 0x70, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmaadr_print;
-#else
-#define ahd_hodmaadr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMAADR", 0x70, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmacnt_print;
-#else
-#define ahd_hodmacnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMACNT", 0x78, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hcnt_print;
-#else
-#define ahd_hcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HCNT", 0x78, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmaen_print;
-#else
-#define ahd_hodmaen_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMAEN", 0x7a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbhaddr_print;
-#else
-#define ahd_scbhaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBHADDR", 0x7c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghaddr_print;
-#else
-#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbhcnt_print;
-#else
-#define ahd_scbhcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBHCNT", 0x84, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghcnt_print;
-#else
-#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dff_thrsh_print;
-#else
-#define ahd_dff_thrsh_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFF_THRSH", 0x88, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romaddr_print;
-#else
-#define ahd_romaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMADDR", 0x8a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romcntrl_print;
-#else
-#define ahd_romcntrl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMCNTRL", 0x8d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romdata_print;
-#else
-#define ahd_romdata_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMDATA", 0x8e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg0_print;
-#else
-#define ahd_cmcrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_roenable_print;
-#else
-#define ahd_roenable_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROENABLE", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg0_print;
-#else
-#define ahd_ovlyrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg0_print;
-#else
-#define ahd_dchrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg1_print;
-#else
-#define ahd_ovlyrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_nsenable_print;
-#else
-#define ahd_nsenable_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NSENABLE", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg1_print;
-#else
-#define ahd_cmcrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg1_print;
-#else
-#define ahd_dchrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg2_print;
-#else
-#define ahd_dchrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg2_print;
-#else
-#define ahd_cmcrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ost_print;
-#else
-#define ahd_ost_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OST", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg2_print;
-#else
-#define ahd_ovlyrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg3_print;
-#else
-#define ahd_dchrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg3_print;
-#else
-#define ahd_ovlyrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg3_print;
-#else
-#define ahd_cmcrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pcixctl_print;
-#else
-#define ahd_pcixctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PCIXCTL", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyseqbcnt_print;
-#else
-#define ahd_ovlyseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchseqbcnt_print;
-#else
-#define ahd_dchseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcseqbcnt_print;
-#else
-#define ahd_cmcseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcspltstat0_print;
-#else
-#define ahd_cmcspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchspltstat0_print;
-#else
-#define ahd_dchspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyspltstat0_print;
-#else
-#define ahd_ovlyspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcspltstat1_print;
-#else
-#define ahd_cmcspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyspltstat1_print;
-#else
-#define ahd_ovlyspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchspltstat1_print;
-#else
-#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg0_print;
-#else
-#define ahd_sgrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG0", 0x98, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr0_print;
-#else
-#define ahd_slvspltoutadr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR0", 0x98, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg1_print;
-#else
-#define ahd_sgrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG1", 0x99, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr1_print;
-#else
-#define ahd_slvspltoutadr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR1", 0x99, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg2_print;
-#else
-#define ahd_sgrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG2", 0x9a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr2_print;
-#else
-#define ahd_slvspltoutadr2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR2", 0x9a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg3_print;
-#else
-#define ahd_sgrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG3", 0x9b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr3_print;
-#else
-#define ahd_slvspltoutadr3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR3", 0x9b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgseqbcnt_print;
-#else
-#define ahd_sgseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGSEQBCNT", 0x9c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr0_print;
-#else
-#define ahd_slvspltoutattr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR0", 0x9c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr1_print;
-#else
-#define ahd_slvspltoutattr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR1", 0x9d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr2_print;
-#else
-#define ahd_slvspltoutattr2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR2", 0x9e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgspltstat0_print;
-#else
-#define ahd_sgspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGSPLTSTAT0", 0x9e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgspltstat1_print;
-#else
-#define ahd_sgspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGSPLTSTAT1", 0x9f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sfunct_print;
-#else
-#define ahd_sfunct_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_df0pcistat_print;
-#else
-#define ahd_df0pcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DF0PCISTAT", 0xa0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg0_print;
#else
#define ahd_reg0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "REG0", 0xa0, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_df1pcistat_print;
-#else
-#define ahd_df1pcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DF1PCISTAT", 0xa1, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgpcistat_print;
-#else
-#define ahd_sgpcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGPCISTAT", 0xa2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg1_print;
#else
#define ahd_reg1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "REG1", 0xa2, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcpcistat_print;
-#else
-#define ahd_cmcpcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCPCISTAT", 0xa3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlypcistat_print;
-#else
-#define ahd_ovlypcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYPCISTAT", 0xa4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg_isr_print;
#else
#define ahd_reg_isr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "REG_ISR", 0xa4, regvalue, cur_col, wrap)
@@ -1454,78 +271,15 @@
ahd_print_register(NULL, 0, "SG_STATE", 0xa6, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_msipcistat_print;
-#else
-#define ahd_msipcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MSIPCISTAT", 0xa6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_targpcistat_print;
-#else
-#define ahd_targpcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TARGPCISTAT", 0xa7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_data_count_odd_print;
#else
#define ahd_data_count_odd_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DATA_COUNT_ODD", 0xa7, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbptr_print;
-#else
-#define ahd_scbptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBPTR", 0xa8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbacnt_print;
-#else
-#define ahd_ccscbacnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBACNT", 0xab, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbautoptr_print;
-#else
-#define ahd_scbautoptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBAUTOPTR", 0xab, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccsgaddr_print;
-#else
-#define ahd_ccsgaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSGADDR", 0xac, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbadr_bk_print;
-#else
-#define ahd_ccscbadr_bk_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBADR_BK", 0xac, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbaddr_print;
-#else
-#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBADDR", 0xac, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmc_rambist_print;
-#else
-#define ahd_cmc_rambist_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMC_RAMBIST", 0xad, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbctl_print;
#else
#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap)
@@ -1538,386 +292,22 @@
ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccsgram_print;
-#else
-#define ahd_ccsgram_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSGRAM", 0xb0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexadr_print;
-#else
-#define ahd_flexadr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXADR", 0xb0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbram_print;
-#else
-#define ahd_ccscbram_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBRAM", 0xb0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexcnt_print;
-#else
-#define ahd_flexcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXCNT", 0xb3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexdmastat_print;
-#else
-#define ahd_flexdmastat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXDMASTAT", 0xb5, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexdata_print;
-#else
-#define ahd_flexdata_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXDATA", 0xb6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brddat_print;
-#else
-#define ahd_brddat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRDDAT", 0xb8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brdctl_print;
-#else
-#define ahd_brdctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRDCTL", 0xb9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seeadr_print;
-#else
-#define ahd_seeadr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEEADR", 0xba, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seedat_print;
-#else
-#define ahd_seedat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEEDAT", 0xbc, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seectl_print;
-#else
-#define ahd_seectl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEECTL", 0xbe, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seestat_print;
-#else
-#define ahd_seestat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEESTAT", 0xbe, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbcnt_print;
-#else
-#define ahd_scbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBCNT", 0xbf, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfwaddr_print;
-#else
-#define ahd_dfwaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFWADDR", 0xc0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspfltrctl_print;
-#else
-#define ahd_dspfltrctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPFLTRCTL", 0xc0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspdatactl_print;
-#else
-#define ahd_dspdatactl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPDATACTL", 0xc1, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfraddr_print;
-#else
-#define ahd_dfraddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFRADDR", 0xc2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspreqctl_print;
-#else
-#define ahd_dspreqctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPREQCTL", 0xc2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspackctl_print;
-#else
-#define ahd_dspackctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPACKCTL", 0xc3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfdat_print;
-#else
-#define ahd_dfdat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFDAT", 0xc4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspselect_print;
-#else
-#define ahd_dspselect_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPSELECT", 0xc4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_wrtbiasctl_print;
-#else
-#define ahd_wrtbiasctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "WRTBIASCTL", 0xc5, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_rcvrbiosctl_print;
-#else
-#define ahd_rcvrbiosctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "RCVRBIOSCTL", 0xc6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_wrtbiascalc_print;
-#else
-#define ahd_wrtbiascalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "WRTBIASCALC", 0xc7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_rcvrbiascalc_print;
-#else
-#define ahd_rcvrbiascalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "RCVRBIASCALC", 0xc8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfptrs_print;
-#else
-#define ahd_dfptrs_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFPTRS", 0xc8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_skewcalc_print;
-#else
-#define ahd_skewcalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SKEWCALC", 0xc9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfbkptr_print;
-#else
-#define ahd_dfbkptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFBKPTR", 0xc9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfdbctl_print;
-#else
-#define ahd_dfdbctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFDBCTL", 0xcb, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfscnt_print;
-#else
-#define ahd_dfscnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFSCNT", 0xcc, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfbcnt_print;
-#else
-#define ahd_dfbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFBCNT", 0xce, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyaddr_print;
-#else
-#define ahd_ovlyaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYADDR", 0xd4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqctl0_print;
#else
#define ahd_seqctl0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQCTL0", 0xd6, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seqctl1_print;
-#else
-#define ahd_seqctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEQCTL1", 0xd7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flags_print;
-#else
-#define ahd_flags_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLAGS", 0xd8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintctl_print;
#else
#define ahd_seqintctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQINTCTL", 0xd9, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seqram_print;
-#else
-#define ahd_seqram_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEQRAM", 0xda, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_prgmcnt_print;
-#else
-#define ahd_prgmcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PRGMCNT", 0xde, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_accum_print;
-#else
-#define ahd_accum_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ACCUM", 0xe0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sindex_print;
-#else
-#define ahd_sindex_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SINDEX", 0xe2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dindex_print;
-#else
-#define ahd_dindex_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DINDEX", 0xe4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr0_print;
-#else
-#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr1_print;
-#else
-#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_allones_print;
-#else
-#define ahd_allones_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ALLONES", 0xe8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_allzeros_print;
-#else
-#define ahd_allzeros_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ALLZEROS", 0xea, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_none_print;
-#else
-#define ahd_none_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NONE", 0xea, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sindir_print;
-#else
-#define ahd_sindir_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SINDIR", 0xec, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dindir_print;
-#else
-#define ahd_dindir_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DINDIR", 0xed, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_function1_print;
-#else
-#define ahd_function1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FUNCTION1", 0xf0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_stack_print;
-#else
-#define ahd_stack_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "STACK", 0xf2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_intvec1_addr_print;
-#else
-#define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "INTVEC1_ADDR", 0xf4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_curaddr_print;
-#else
-#define ahd_curaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lastaddr_print;
-#else
-#define ahd_lastaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LASTADDR", 0xf6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_intvec2_addr_print;
-#else
-#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_longjmp_addr_print;
#else
#define ahd_longjmp_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LONGJMP_ADDR", 0xf8, regvalue, cur_col, wrap)
@@ -1934,15 +324,8 @@
ahd_reg_print_t ahd_waiting_scb_tails_print;
#else
#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ahd_pci_config_base_print;
-#else
-#define ahd_ahd_pci_config_base_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE", 0x100, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sram_base_print;
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped Fri Apr 25 02:34:36 2008
@@ -7,21 +7,9 @@
*/
#include "aic79xx_osm.h"
-static ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
- { "SRC_MODE", 0x07, 0x07 },
- { "DST_MODE", 0x70, 0x70 }
-};
-
-int
-ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(MODE_PTR_parse_table, 2, "MODE_PTR",
- 0x00, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
{ "SPLTINT", 0x01, 0x01 },
{ "CMDCMPLT", 0x02, 0x02 },
{ "SEQINT", 0x04, 0x04 },
{ "SCSIINT", 0x08, 0x08 },
@@ -38,130 +26,9 @@
return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
0x01, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
- { "NO_SEQINT", 0x00, 0xff },
- { "BAD_PHASE", 0x01, 0xff },
- { "SEND_REJECT", 0x02, 0xff },
- { "PROTO_VIOLATION", 0x03, 0xff },
- { "NO_MATCH", 0x04, 0xff },
- { "IGN_WIDE_RES", 0x05, 0xff },
- { "PDATA_REINIT", 0x06, 0xff },
- { "HOST_MSG_LOOP", 0x07, 0xff },
- { "BAD_STATUS", 0x08, 0xff },
- { "DATA_OVERRUN", 0x09, 0xff },
- { "MKMSG_FAILED", 0x0a, 0xff },
- { "MISSED_BUSFREE", 0x0b, 0xff },
- { "DUMP_CARD_STATE", 0x0c, 0xff },
- { "ILLEGAL_PHASE", 0x0d, 0xff },
- { "INVALID_SEQINT", 0x0e, 0xff },
- { "CFG4ISTAT_INTR", 0x0f, 0xff },
- { "STATUS_OVERRUN", 0x10, 0xff },
- { "CFG4OVERRUN", 0x11, 0xff },
- { "ENTERING_NONPACK", 0x12, 0xff },
- { "TASKMGMT_FUNC_COMPLETE",0x13, 0xff },
- { "TASKMGMT_CMD_CMPLT_OKAY",0x14, 0xff },
- { "TRACEPOINT0", 0x15, 0xff },
- { "TRACEPOINT1", 0x16, 0xff },
- { "TRACEPOINT2", 0x17, 0xff },
- { "TRACEPOINT3", 0x18, 0xff },
- { "SAW_HWERR", 0x19, 0xff },
- { "BAD_SCB_STATUS", 0x1a, 0xff }
-};
-
-int
-ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SEQINTCODE_parse_table, 27, "SEQINTCODE",
- 0x02, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
- { "CLRSPLTINT", 0x01, 0x01 },
- { "CLRCMDINT", 0x02, 0x02 },
- { "CLRSEQINT", 0x04, 0x04 },
- { "CLRSCSIINT", 0x08, 0x08 },
- { "CLRPCIINT", 0x10, 0x10 },
- { "CLRSWTMINT", 0x20, 0x20 },
- { "CLRBRKADRINT", 0x40, 0x40 },
- { "CLRHWERRINT", 0x80, 0x80 }
-};
-
-int
-ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
- 0x03, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t ERROR_parse_table[] = {
- { "DSCTMOUT", 0x02, 0x02 },
- { "ILLOPCODE", 0x04, 0x04 },
- { "SQPARERR", 0x08, 0x08 },
- { "DPARERR", 0x10, 0x10 },
- { "MPARERR", 0x20, 0x20 },
- { "CIOACCESFAIL", 0x40, 0x40 },
- { "CIOPARERR", 0x80, 0x80 }
-};
-
-int
-ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ERROR_parse_table, 7, "ERROR",
- 0x04, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRERR_parse_table[] = {
- { "CLRDSCTMOUT", 0x02, 0x02 },
- { "CLRILLOPCODE", 0x04, 0x04 },
- { "CLRSQPARERR", 0x08, 0x08 },
- { "CLRDPARERR", 0x10, 0x10 },
- { "CLRMPARERR", 0x20, 0x20 },
- { "CLRCIOACCESFAIL", 0x40, 0x40 },
- { "CLRCIOPARERR", 0x80, 0x80 }
-};
-
-int
-ahd_clrerr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRERR_parse_table, 7, "CLRERR",
- 0x04, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
- { "CHIPRST", 0x01, 0x01 },
- { "CHIPRSTACK", 0x01, 0x01 },
- { "INTEN", 0x02, 0x02 },
- { "PAUSE", 0x04, 0x04 },
- { "SWTIMER_START_B", 0x08, 0x08 },
- { "SWINT", 0x10, 0x10 },
- { "POWRDN", 0x40, 0x40 },
- { "SEQ_RESET", 0x80, 0x80 }
-};
-
-int
-ahd_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(HCNTRL_parse_table, 8, "HCNTRL",
- 0x05, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HNSCB_QOFF",
- 0x06, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HESCB_QOFF",
- 0x08, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
+static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
{ "ENINT_COALESCE", 0x40, 0x40 },
{ "HOST_TQINPOS", 0x80, 0x80 }
};
@@ -171,9 +38,9 @@
return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
0x0b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
{ "SEQ_SPLTINT", 0x01, 0x01 },
{ "SEQ_PCIINT", 0x02, 0x02 },
{ "SEQ_SCSIINT", 0x04, 0x04 },
{ "SEQ_SEQINT", 0x08, 0x08 },
@@ -186,80 +53,9 @@
return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
0x0c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
- { "CLRSEQ_SPLTINT", 0x01, 0x01 },
- { "CLRSEQ_PCIINT", 0x02, 0x02 },
- { "CLRSEQ_SCSIINT", 0x04, 0x04 },
- { "CLRSEQ_SEQINT", 0x08, 0x08 },
- { "CLRSEQ_SWTMRTO", 0x10, 0x10 }
-};
-
-int
-ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
- 0x0c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SWTIMER",
- 0x0e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SNSCB_QOFF",
- 0x10, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SESCB_QOFF",
- 0x12, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SDSCB_QOFF",
- 0x14, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
- { "SCB_QSIZE_4", 0x00, 0x0f },
- { "SCB_QSIZE_8", 0x01, 0x0f },
- { "SCB_QSIZE_16", 0x02, 0x0f },
- { "SCB_QSIZE_32", 0x03, 0x0f },
- { "SCB_QSIZE_64", 0x04, 0x0f },
- { "SCB_QSIZE_128", 0x05, 0x0f },
- { "SCB_QSIZE_256", 0x06, 0x0f },
- { "SCB_QSIZE_512", 0x07, 0x0f },
- { "SCB_QSIZE_1024", 0x08, 0x0f },
- { "SCB_QSIZE_2048", 0x09, 0x0f },
- { "SCB_QSIZE_4096", 0x0a, 0x0f },
- { "SCB_QSIZE_8192", 0x0b, 0x0f },
- { "SCB_QSIZE_16384", 0x0c, 0x0f },
- { "SCB_QSIZE", 0x0f, 0x0f },
- { "HS_MAILBOX_ACT", 0x10, 0x10 },
- { "SDSCB_ROLLOVR", 0x20, 0x20 },
- { "NEW_SCB_AVAIL", 0x40, 0x40 },
- { "EMPTY_SCB_AVAIL", 0x80, 0x80 }
-};
-
-int
-ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(QOFF_CTLSTA_parse_table, 18, "QOFF_CTLSTA",
- 0x16, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t INTCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t INTCTL_parse_table[] = {
{ "SPLTINTEN", 0x01, 0x01 },
{ "SEQINTEN", 0x02, 0x02 },
{ "SCSIINTEN", 0x04, 0x04 },
{ "PCIINTEN", 0x08, 0x08 },
@@ -275,9 +71,9 @@
return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
0x18, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
+static const ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "DIRECTIONEN", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "FIFOFLUSHACK", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
@@ -296,25 +92,9 @@
return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
0x19, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
- { "CIOPARCKEN", 0x01, 0x01 },
- { "DISABLE_TWATE", 0x02, 0x02 },
- { "EXTREQLCK", 0x10, 0x10 },
- { "MPARCKEN", 0x20, 0x20 },
- { "DPARCKEN", 0x40, 0x40 },
- { "CACHETHEN", 0x80, 0x80 }
-};
-
-int
-ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSCOMMAND0_parse_table, 6, "DSCOMMAND0",
- 0x19, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
+static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
{ "FIFOEMP", 0x01, 0x01 },
{ "FIFOFULL", 0x02, 0x02 },
{ "DFTHRESH", 0x04, 0x04 },
{ "HDONE", 0x08, 0x08 },
@@ -329,9 +109,9 @@
return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
0x1a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
+static const ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
{ "LAST_SEG_DONE", 0x01, 0x01 },
{ "LAST_SEG", 0x02, 0x02 },
{ "ODD_SEG", 0x04, 0x04 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
@@ -343,289 +123,9 @@
return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
0x1b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t ARBCTL_parse_table[] = {
- { "USE_TIME", 0x07, 0x07 },
- { "RETRY_SWEN", 0x08, 0x08 },
- { "RESET_HARB", 0x80, 0x80 }
-};
-
-int
-ahd_arbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ARBCTL_parse_table, 3, "ARBCTL",
- 0x1b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
- { "LAST_SEG", 0x02, 0x02 },
- { "ODD_SEG", 0x04, 0x04 },
- { "SG_ADDR_MASK", 0xf8, 0xf8 }
-};
-
-int
-ahd_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
- 0x1b, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQIN",
- 0x20, regvalue, cur_col, wrap));
-}
-
-int
-ahd_typeptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "TYPEPTR",
- 0x20, regvalue, cur_col, wrap));
-}
-
-int
-ahd_tagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "TAGPTR",
- 0x21, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LUNPTR",
- 0x22, regvalue, cur_col, wrap));
-}
-
-int
-ahd_datalenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DATALENPTR",
- 0x23, regvalue, cur_col, wrap));
-}
-
-int
-ahd_statlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "STATLENPTR",
- 0x24, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMDLENPTR",
- 0x25, regvalue, cur_col, wrap));
-}
-
-int
-ahd_attrptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ATTRPTR",
- 0x26, regvalue, cur_col, wrap));
-}
-
-int
-ahd_flagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLAGPTR",
- 0x27, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmdptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMDPTR",
- 0x28, regvalue, cur_col, wrap));
-}
-
-int
-ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "QNEXTPTR",
- 0x29, regvalue, cur_col, wrap));
-}
-
-int
-ahd_idptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "IDPTR",
- 0x2a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
- 0x2b, regvalue, cur_col, wrap));
-}
-
-int
-ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ABRTBITPTR",
- 0x2c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_maxcmdbytes_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMDBYTES",
- 0x2d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_maxcmd2rcv_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMD2RCV",
- 0x2e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_shortthresh_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SHORTTHRESH",
- 0x2f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
- { "ILUNLEN", 0x0f, 0x0f },
- { "TLUNLEN", 0xf0, 0xf0 }
-};
-
-int
-ahd_lunlen_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LUNLEN_parse_table, 2, "LUNLEN",
- 0x30, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cdblimit_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CDBLIMIT",
- 0x31, regvalue, cur_col, wrap));
-}
-
-int
-ahd_maxcmd_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMD",
- 0x32, regvalue, cur_col, wrap));
-}
-
-int
-ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMDCNT",
- 0x33, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqrsvd01_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD01",
- 0x34, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqrsvd16_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD16",
- 0x35, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqrsvd17_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD17",
- 0x36, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmdrsvd0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMDRSVD0",
- 0x37, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL0_parse_table[] = {
- { "LQ0INITGCLT", 0x03, 0x03 },
- { "LQ0TARGCLT", 0x0c, 0x0c },
- { "LQIINITGCLT", 0x30, 0x30 },
- { "LQITARGCLT", 0xc0, 0xc0 }
-};
-
-int
-ahd_lqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQCTL0_parse_table, 4, "LQCTL0",
- 0x38, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
- { "ABORTPENDING", 0x01, 0x01 },
- { "SINGLECMD", 0x02, 0x02 },
- { "PCI2PCI", 0x04, 0x04 }
-};
-
-int
-ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQCTL1_parse_table, 3, "LQCTL1",
- 0x38, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSBIST0_parse_table[] = {
- { "OSBISTRUN", 0x01, 0x01 },
- { "OSBISTDONE", 0x02, 0x02 },
- { "OSBISTERR", 0x04, 0x04 },
- { "GSBISTRUN", 0x10, 0x10 },
- { "GSBISTDONE", 0x20, 0x20 },
- { "GSBISTERR", 0x40, 0x40 }
-};
-
-int
-ahd_scsbist0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSBIST0_parse_table, 6, "SCSBIST0",
- 0x39, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
- { "LQOPAUSE", 0x01, 0x01 },
- { "LQOTOIDLE", 0x02, 0x02 },
- { "LQOCONTINUE", 0x04, 0x04 },
- { "LQORETRY", 0x08, 0x08 },
- { "LQIPAUSE", 0x10, 0x10 },
- { "LQITOIDLE", 0x20, 0x20 },
- { "LQICONTINUE", 0x40, 0x40 },
- { "LQIRETRY", 0x80, 0x80 }
-};
-
-int
-ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQCTL2_parse_table, 8, "LQCTL2",
- 0x39, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSBIST1_parse_table[] = {
- { "NTBISTRUN", 0x01, 0x01 },
- { "NTBISTDONE", 0x02, 0x02 },
- { "NTBISTERR", 0x04, 0x04 }
-};
-
-int
-ahd_scsbist1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSBIST1_parse_table, 3, "SCSBIST1",
- 0x3a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
{ "SCSIRSTO", 0x01, 0x01 },
{ "FORCEBUSFREE", 0x10, 0x10 },
{ "ENARBO", 0x20, 0x20 },
{ "ENSELO", 0x40, 0x40 },
@@ -638,9 +138,9 @@
return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
0x3a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
{ "ALTSTIM", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "MANUALP", 0x0c, 0x0c },
{ "ENRSELI", 0x10, 0x10 },
@@ -654,74 +154,9 @@
return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
0x3b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
- { "SPIOEN", 0x08, 0x08 },
- { "BIOSCANCELEN", 0x10, 0x10 },
- { "DFPEXP", 0x40, 0x40 },
- { "DFON", 0x80, 0x80 }
-};
-
-int
-ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SXFRCTL0_parse_table, 4, "SXFRCTL0",
- 0x3c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DLCOUNT",
- 0x3c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BUSINITID",
- 0x3c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
- { "STPWEN", 0x01, 0x01 },
- { "ACTNEGEN", 0x02, 0x02 },
- { "ENSTIMER", 0x04, 0x04 },
- { "STIMESEL", 0x18, 0x18 },
- { "ENSPCHK", 0x20, 0x20 },
- { "ENSACHK", 0x40, 0x40 },
- { "BITBUCKET", 0x80, 0x80 }
-};
-
-int
-ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
- 0x3d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_bustargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BUSTARGID",
- 0x3e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SXFRCTL2_parse_table[] = {
- { "ASU", 0x07, 0x07 },
- { "CMDDMAEN", 0x08, 0x08 },
- { "AUTORSTDIS", 0x10, 0x10 }
-};
-
-int
-ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
- 0x3e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
{ "CURRFIFO_0", 0x00, 0x03 },
{ "CURRFIFO_1", 0x01, 0x03 },
{ "CURRFIFO_NONE", 0x03, 0x03 },
{ "FIFO0FREE", 0x10, 0x10 },
@@ -735,51 +170,17 @@
return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
0x3f, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
{ "P_DATAOUT", 0x00, 0xe0 },
{ "P_DATAOUT_DT", 0x20, 0xe0 },
{ "P_DATAIN", 0x40, 0xe0 },
{ "P_DATAIN_DT", 0x60, 0xe0 },
{ "P_COMMAND", 0x80, 0xe0 },
{ "P_MESGOUT", 0xa0, 0xe0 },
{ "P_STATUS", 0xc0, 0xe0 },
{ "P_MESGIN", 0xe0, 0xe0 },
- { "ACKO", 0x01, 0x01 },
- { "REQO", 0x02, 0x02 },
- { "BSYO", 0x04, 0x04 },
- { "SELO", 0x08, 0x08 },
- { "ATNO", 0x10, 0x10 },
- { "MSGO", 0x20, 0x20 },
- { "IOO", 0x40, 0x40 },
- { "CDO", 0x80, 0x80 },
- { "PHASE_MASK", 0xe0, 0xe0 }
-};
-
-int
-ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSISIGO_parse_table, 17, "SCSISIGO",
- 0x40, regvalue, cur_col, wrap));
-}
-
-int
-ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MULTARGID",
- 0x40, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
- { "P_DATAOUT", 0x00, 0xe0 },
- { "P_DATAOUT_DT", 0x20, 0xe0 },
- { "P_DATAIN", 0x40, 0xe0 },
- { "P_DATAIN_DT", 0x60, 0xe0 },
- { "P_COMMAND", 0x80, 0xe0 },
- { "P_MESGOUT", 0xa0, 0xe0 },
- { "P_STATUS", 0xc0, 0xe0 },
- { "P_MESGIN", 0xe0, 0xe0 },
{ "ACKI", 0x01, 0x01 },
{ "REQI", 0x02, 0x02 },
{ "BSYI", 0x04, 0x04 },
{ "SELI", 0x08, 0x08 },
@@ -796,9 +197,9 @@
return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
0x41, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
{ "DATA_OUT_PHASE", 0x01, 0x03 },
{ "DATA_IN_PHASE", 0x02, 0x03 },
{ "DATA_PHASE_MASK", 0x03, 0x03 },
{ "MSG_OUT_PHASE", 0x04, 0x04 },
@@ -814,41 +215,15 @@
0x42, regvalue, cur_col, wrap));
}
int
-ahd_scsidat0_img_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCSIDAT0_IMG",
- 0x43, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCSIDAT",
- 0x44, regvalue, cur_col, wrap));
-}
-
-int
ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SCSIBUS",
0x46, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
- { "TARGID", 0x0f, 0x0f },
- { "CLKOUT", 0x80, 0x80 }
-};
-
-int
-ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(TARGIDIN_parse_table, 2, "TARGIDIN",
- 0x48, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SELID_parse_table[] = {
+static const ahd_reg_parse_entry_t SELID_parse_table[] = {
{ "ONEBIT", 0x08, 0x08 },
{ "SELID_MASK", 0xf0, 0xf0 }
};
@@ -858,58 +233,9 @@
return (ahd_print_register(SELID_parse_table, 2, "SELID",
0x49, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
- { "AUTO_MSGOUT_DE", 0x02, 0x02 },
- { "ENDGFORMCHK", 0x04, 0x04 },
- { "BUSFREEREV", 0x10, 0x10 },
- { "BIASCANCTL", 0x20, 0x20 },
- { "AUTOACKEN", 0x40, 0x40 },
- { "BIOSCANCTL", 0x80, 0x80 },
- { "OPTIONMODE_DEFAULTS",0x02, 0x02 }
-};
-
-int
-ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OPTIONMODE_parse_table, 7, "OPTIONMODE",
- 0x4a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
- { "SELWIDE", 0x02, 0x02 },
- { "ENAB20", 0x04, 0x04 },
- { "ENAB40", 0x08, 0x08 },
- { "DIAGLEDON", 0x40, 0x40 },
- { "DIAGLEDEN", 0x80, 0x80 }
-};
-
-int
-ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
- 0x4a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
- { "CLRARBDO", 0x01, 0x01 },
- { "CLRSPIORDY", 0x02, 0x02 },
- { "CLROVERRUN", 0x04, 0x04 },
- { "CLRIOERR", 0x08, 0x08 },
- { "CLRSELINGO", 0x10, 0x10 },
- { "CLRSELDI", 0x20, 0x20 },
- { "CLRSELDO", 0x40, 0x40 }
-};
-
-int
-ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
- 0x4b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "ARBDO", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 },
{ "OVERRUN", 0x04, 0x04 },
{ "IOERR", 0x08, 0x08 },
@@ -925,9 +251,9 @@
return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
0x4b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
+static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENARBDO", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENOVERRUN", 0x04, 0x04 },
{ "ENIOERR", 0x08, 0x08 },
@@ -942,26 +268,9 @@
return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
0x4b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
- { "CLRREQINIT", 0x01, 0x01 },
- { "CLRSTRB2FAST", 0x02, 0x02 },
- { "CLRSCSIPERR", 0x04, 0x04 },
- { "CLRBUSFREE", 0x08, 0x08 },
- { "CLRSCSIRSTI", 0x20, 0x20 },
- { "CLRATNO", 0x40, 0x40 },
- { "CLRSELTIMEO", 0x80, 0x80 }
-};
-
-int
-ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
- 0x4c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 },
{ "STRB2FAST", 0x02, 0x02 },
{ "SCSIPERR", 0x04, 0x04 },
{ "BUSFREE", 0x08, 0x08 },
@@ -977,9 +286,9 @@
return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
0x4c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
{ "BUSFREE_LQO", 0x40, 0xc0 },
{ "BUSFREE_DFF0", 0x80, 0xc0 },
{ "BUSFREE_DFF1", 0xc0, 0xc0 },
{ "DMADONE", 0x01, 0x01 },
@@ -997,36 +306,9 @@
return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
0x4d, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
- { "ENDMADONE", 0x01, 0x01 },
- { "ENSDONE", 0x02, 0x02 },
- { "ENWIDE_RES", 0x04, 0x04 }
-};
-
-int
-ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
- 0x4d, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
- { "CLRDMADONE", 0x01, 0x01 },
- { "CLRSDONE", 0x02, 0x02 },
- { "CLRWIDE_RES", 0x04, 0x04 },
- { "CLRNONPACKREQ", 0x20, 0x20 }
-};
-
-int
-ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
- 0x4d, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
+static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
{ "DTERR", 0x01, 0x01 },
{ "DGFORMERR", 0x02, 0x02 },
{ "CRCERR", 0x04, 0x04 },
{ "AIPERR", 0x08, 0x08 },
@@ -1043,29 +325,15 @@
0x4e, regvalue, cur_col, wrap));
}
int
-ahd_lqistate_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQISTATE",
- 0x4e, regvalue, cur_col, wrap));
-}
-
-int
ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SOFFCNT",
0x4f, regvalue, cur_col, wrap));
}
-int
-ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQOSTATE",
- 0x4f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
{ "LQIATNCMD", 0x01, 0x01 },
{ "LQIATNLQ", 0x02, 0x02 },
{ "LQIBADLQT", 0x04, 0x04 },
{ "LQICRCT2", 0x08, 0x08 },
@@ -1079,59 +347,9 @@
return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
0x50, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
- { "CLRLQIATNCMD", 0x01, 0x01 },
- { "CLRLQIATNLQ", 0x02, 0x02 },
- { "CLRLQIBADLQT", 0x04, 0x04 },
- { "CLRLQICRCT2", 0x08, 0x08 },
- { "CLRLQICRCT1", 0x10, 0x10 },
- { "CLRLQIATNQAS", 0x20, 0x20 }
-};
-
-int
-ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
- 0x50, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
- { "ENLQIATNCMD", 0x01, 0x01 },
- { "ENLQIATNLQ", 0x02, 0x02 },
- { "ENLQIBADLQT", 0x04, 0x04 },
- { "ENLQICRCT2", 0x08, 0x08 },
- { "ENLQICRCT1", 0x10, 0x10 },
- { "ENLQIATNQASK", 0x20, 0x20 }
-};
-
-int
-ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQIMODE0_parse_table, 6, "LQIMODE0",
- 0x50, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
- { "ENLQIOVERI_NLQ", 0x01, 0x01 },
- { "ENLQIOVERI_LQ", 0x02, 0x02 },
- { "ENLQIBADLQI", 0x04, 0x04 },
- { "ENLQICRCI_NLQ", 0x08, 0x08 },
- { "ENLQICRCI_LQ", 0x10, 0x10 },
- { "ENLIQABORT", 0x20, 0x20 },
- { "ENLQIPHASE_NLQ", 0x40, 0x40 },
- { "ENLQIPHASE_LQ", 0x80, 0x80 }
-};
-
-int
-ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQIMODE1_parse_table, 8, "LQIMODE1",
- 0x51, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
{ "LQIOVERI_NLQ", 0x01, 0x01 },
{ "LQIOVERI_LQ", 0x02, 0x02 },
{ "LQIBADLQI", 0x04, 0x04 },
{ "LQICRCI_NLQ", 0x08, 0x08 },
@@ -1147,27 +365,9 @@
return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
0x51, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
- { "CLRLQIOVERI_NLQ", 0x01, 0x01 },
- { "CLRLQIOVERI_LQ", 0x02, 0x02 },
- { "CLRLQIBADLQI", 0x04, 0x04 },
- { "CLRLQICRCI_NLQ", 0x08, 0x08 },
- { "CLRLQICRCI_LQ", 0x10, 0x10 },
- { "CLRLIQABORT", 0x20, 0x20 },
- { "CLRLQIPHASE_NLQ", 0x40, 0x40 },
- { "CLRLQIPHASE_LQ", 0x80, 0x80 }
-};
-
-int
-ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRLQIINT1_parse_table, 8, "CLRLQIINT1",
- 0x51, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
{ "LQIGSAVAIL", 0x01, 0x01 },
{ "LQISTOPCMD", 0x02, 0x02 },
{ "LQISTOPLQ", 0x04, 0x04 },
{ "LQISTOPPKT", 0x08, 0x08 },
@@ -1183,9 +383,9 @@
return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
0x52, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
{ "OSRAMPERR", 0x01, 0x01 },
{ "NTRAMPERR", 0x02, 0x02 }
};
@@ -1195,33 +395,9 @@
return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
0x53, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
- { "ENOSRAMPERR", 0x01, 0x01 },
- { "ENNTRAMPERR", 0x02, 0x02 }
-};
-
-int
-ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SIMODE3_parse_table, 2, "SIMODE3",
- 0x53, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
- { "CLROSRAMPERR", 0x01, 0x01 },
- { "CLRNTRAMPERR", 0x02, 0x02 }
-};
-
-int
-ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSINT3_parse_table, 2, "CLRSINT3",
- 0x53, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
{ "LQOTCRC", 0x01, 0x01 },
{ "LQOATNPKT", 0x02, 0x02 },
{ "LQOATNLQ", 0x04, 0x04 },
{ "LQOSTOPT2", 0x08, 0x08 },
@@ -1234,54 +410,9 @@
return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
0x54, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
- { "CLRLQOTCRC", 0x01, 0x01 },
- { "CLRLQOATNPKT", 0x02, 0x02 },
- { "CLRLQOATNLQ", 0x04, 0x04 },
- { "CLRLQOSTOPT2", 0x08, 0x08 },
- { "CLRLQOTARGSCBPERR", 0x10, 0x10 }
-};
-
-int
-ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRLQOINT0_parse_table, 5, "CLRLQOINT0",
- 0x54, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
- { "ENLQOTCRC", 0x01, 0x01 },
- { "ENLQOATNPKT", 0x02, 0x02 },
- { "ENLQOATNLQ", 0x04, 0x04 },
- { "ENLQOSTOPT2", 0x08, 0x08 },
- { "ENLQOTARGSCBPERR", 0x10, 0x10 }
-};
-
-int
-ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
- 0x54, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
- { "ENLQOPHACHGINPKT", 0x01, 0x01 },
- { "ENLQOBUSFREE", 0x02, 0x02 },
- { "ENLQOBADQAS", 0x04, 0x04 },
- { "ENLQOSTOPI2", 0x08, 0x08 },
- { "ENLQOINITSCBPERR", 0x10, 0x10 }
-};
-
-int
-ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
- 0x55, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
{ "LQOPHACHGINPKT", 0x01, 0x01 },
{ "LQOBUSFREE", 0x02, 0x02 },
{ "LQOBADQAS", 0x04, 0x04 },
{ "LQOSTOPI2", 0x08, 0x08 },
@@ -1294,24 +425,9 @@
return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
0x55, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
- { "CLRLQOPHACHGINPKT", 0x01, 0x01 },
- { "CLRLQOBUSFREE", 0x02, 0x02 },
- { "CLRLQOBADQAS", 0x04, 0x04 },
- { "CLRLQOSTOPI2", 0x08, 0x08 },
- { "CLRLQOINITSCBPERR", 0x10, 0x10 }
-};
-
-int
-ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRLQOINT1_parse_table, 5, "CLRLQOINT1",
- 0x55, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
{ "LQOSTOP0", 0x01, 0x01 },
{ "LQOPHACHGOUTPKT", 0x02, 0x02 },
{ "LQOWAITFIFO", 0x10, 0x10 },
{ "LQOPKT", 0xe0, 0xe0 }
@@ -1323,16 +439,9 @@
return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
0x56, regvalue, cur_col, wrap));
}
-int
-ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OS_SPACE_CNT",
- 0x56, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
+static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
{ "ENREQINIT", 0x01, 0x01 },
{ "ENSTRB2FAST", 0x02, 0x02 },
{ "ENSCSIPERR", 0x04, 0x04 },
{ "ENBUSFREE", 0x08, 0x08 },
@@ -1348,16 +457,9 @@
return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
0x57, regvalue, cur_col, wrap));
}
-int
-ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "GSFIFO",
- 0x58, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
{ "RSTCHN", 0x01, 0x01 },
{ "CLRCHN", 0x02, 0x02 },
{ "CLRSHCNT", 0x04, 0x04 },
{ "DFFBITBUCKET", 0x08, 0x08 }
@@ -1369,45 +471,9 @@
return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
0x5a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
- { "LQONOCHKOVER", 0x01, 0x01 },
- { "LQOH2A_VERSION", 0x80, 0x80 }
-};
-
-int
-ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
- 0x5a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "NEXTSCB",
- 0x5a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
- { "CLRCFG4TCMD", 0x01, 0x01 },
- { "CLRCFG4ICMD", 0x02, 0x02 },
- { "CLRCFG4TSTAT", 0x04, 0x04 },
- { "CLRCFG4ISTAT", 0x08, 0x08 },
- { "CLRCFG4DATA", 0x10, 0x10 },
- { "CLRSAVEPTRS", 0x20, 0x20 },
- { "CLRCTXTDONE", 0x40, 0x40 }
-};
-
-int
-ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSEQINTSRC_parse_table, 7, "CLRSEQINTSRC",
- 0x5b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
{ "CFG4TCMD", 0x01, 0x01 },
{ "CFG4ICMD", 0x02, 0x02 },
{ "CFG4TSTAT", 0x04, 0x04 },
{ "CFG4ISTAT", 0x08, 0x08 },
@@ -1422,16 +488,9 @@
return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
0x5b, regvalue, cur_col, wrap));
}
-int
-ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CURRSCB",
- 0x5c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
{ "ENCFG4TCMD", 0x01, 0x01 },
{ "ENCFG4ICMD", 0x02, 0x02 },
{ "ENCFG4TSTAT", 0x04, 0x04 },
{ "ENCFG4ISTAT", 0x08, 0x08 },
@@ -1446,9 +505,9 @@
return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
0x5c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
{ "FIFOFREE", 0x01, 0x01 },
{ "DATAINFIFO", 0x02, 0x02 },
{ "DLZERO", 0x04, 0x04 },
{ "SHVALID", 0x08, 0x08 },
@@ -1463,997 +522,37 @@
return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
0x5d, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CRCCONTROL_parse_table[] = {
- { "CRCVALCHKEN", 0x40, 0x40 }
-};
-
int
-ahd_crccontrol_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CRCCONTROL_parse_table, 1, "CRCCONTROL",
- 0x5d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfftag_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFFTAG",
- 0x5e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LASTSCB",
- 0x5e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSITEST_parse_table[] = {
- { "SEL_TXPLL_DEBUG", 0x04, 0x04 },
- { "CNTRTEST", 0x08, 0x08 }
-};
-
-int
-ahd_scsitest_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSITEST_parse_table, 2, "SCSITEST",
- 0x5e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t IOPDNCTL_parse_table[] = {
- { "PDN_DIFFSENSE", 0x01, 0x01 },
- { "PDN_IDIST", 0x04, 0x04 },
- { "DISABLE_OE", 0x80, 0x80 }
-};
-
-int
-ahd_iopdnctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(IOPDNCTL_parse_table, 3, "IOPDNCTL",
- 0x5f, regvalue, cur_col, wrap));
-}
-
-int
-ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SHADDR",
- 0x60, regvalue, cur_col, wrap));
-}
-
-int
-ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "NEGOADDR",
- 0x60, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dgrpcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DGRPCRCI",
- 0x60, regvalue, cur_col, wrap));
-}
-
-int
-ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "NEGPERIOD",
- 0x61, regvalue, cur_col, wrap));
-}
-
-int
-ahd_packcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PACKCRCI",
- 0x62, regvalue, cur_col, wrap));
-}
-
-int
-ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "NEGOFFSET",
- 0x62, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
- { "PPROPT_IUT", 0x01, 0x01 },
- { "PPROPT_DT", 0x02, 0x02 },
- { "PPROPT_QAS", 0x04, 0x04 },
- { "PPROPT_PACE", 0x08, 0x08 }
-};
-
-int
-ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NEGPPROPTS_parse_table, 4, "NEGPPROPTS",
- 0x63, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
- { "WIDEXFER", 0x01, 0x01 },
- { "ENAUTOATNO", 0x02, 0x02 },
- { "ENAUTOATNI", 0x04, 0x04 },
- { "ENSLOWCRC", 0x08, 0x08 },
- { "RTI_OVRDTRN", 0x10, 0x10 },
- { "RTI_WRTDIS", 0x20, 0x20 },
- { "ENSNAPSHOT", 0x40, 0x40 }
-};
-
-int
-ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
- 0x64, regvalue, cur_col, wrap));
-}
-
-int
-ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ANNEXCOL",
- 0x65, regvalue, cur_col, wrap));
-}
-
-int
-ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ANNEXDAT",
- 0x66, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
- { "LSTSGCLRDIS", 0x01, 0x01 },
- { "SHVALIDSTDIS", 0x02, 0x02 },
- { "DFFACTCLR", 0x04, 0x04 },
- { "SDONEMSKDIS", 0x08, 0x08 },
- { "WIDERESEN", 0x10, 0x10 },
- { "CURRFIFODEF", 0x20, 0x20 },
- { "STSELSKIDDIS", 0x40, 0x40 }
-};
-
-int
-ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSCHKN_parse_table, 7, "SCSCHKN",
- 0x66, regvalue, cur_col, wrap));
-}
-
-int
-ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "IOWNID",
- 0x67, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PLL960CTL0_parse_table[] = {
- { "PLL_ENFBM", 0x01, 0x01 },
- { "PLL_DLPF", 0x02, 0x02 },
- { "PLL_ENLPF", 0x04, 0x04 },
- { "PLL_ENLUD", 0x08, 0x08 },
- { "PLL_NS", 0x30, 0x30 },
- { "PLL_PWDN", 0x40, 0x40 },
- { "PLL_VCOSEL", 0x80, 0x80 }
-};
-
-int
-ahd_pll960ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL960CTL0_parse_table, 7, "PLL960CTL0",
- 0x68, regvalue, cur_col, wrap));
-}
-
-int
-ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SHCNT",
- 0x68, regvalue, cur_col, wrap));
-}
-
-int
-ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "TOWNID",
- 0x69, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PLL960CTL1_parse_table[] = {
- { "PLL_RST", 0x01, 0x01 },
- { "PLL_CNTCLR", 0x40, 0x40 },
- { "PLL_CNTEN", 0x80, 0x80 }
-};
-
-int
-ahd_pll960ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL960CTL1_parse_table, 3, "PLL960CTL1",
- 0x69, regvalue, cur_col, wrap));
-}
-
-int
-ahd_pll960cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PLL960CNT0",
- 0x6a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_xsig_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "XSIG",
- 0x6a, regvalue, cur_col, wrap));
-}
-
-int
ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SELOID",
0x6b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PLL400CTL0_parse_table[] = {
- { "PLL_ENFBM", 0x01, 0x01 },
- { "PLL_DLPF", 0x02, 0x02 },
- { "PLL_ENLPF", 0x04, 0x04 },
- { "PLL_ENLUD", 0x08, 0x08 },
- { "PLL_NS", 0x30, 0x30 },
- { "PLL_PWDN", 0x40, 0x40 },
- { "PLL_VCOSEL", 0x80, 0x80 }
-};
-
int
-ahd_pll400ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL400CTL0_parse_table, 7, "PLL400CTL0",
- 0x6c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_fairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FAIRNESS",
- 0x6c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PLL400CTL1_parse_table[] = {
- { "PLL_RST", 0x01, 0x01 },
- { "PLL_CNTCLR", 0x40, 0x40 },
- { "PLL_CNTEN", 0x80, 0x80 }
-};
-
-int
-ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL400CTL1_parse_table, 3, "PLL400CTL1",
- 0x6d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "UNFAIRNESS",
- 0x6e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PLL400CNT0",
- 0x6e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HADDR",
- 0x70, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
- { "SPLIT_DROP_REQ", 0x80, 0x80 }
-};
-
-int
-ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
- 0x70, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HODMAADR",
- 0x70, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hodmacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HODMACNT",
- 0x78, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HCNT",
- 0x78, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HODMAEN",
- 0x7a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCBHADDR",
- 0x7c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SGHADDR",
- 0x7c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCBHCNT",
- 0x84, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SGHCNT",
- 0x84, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
- { "WR_DFTHRSH_MIN", 0x00, 0x70 },
- { "RD_DFTHRSH_MIN", 0x00, 0x07 },
- { "RD_DFTHRSH_25", 0x01, 0x07 },
- { "RD_DFTHRSH_50", 0x02, 0x07 },
- { "RD_DFTHRSH_63", 0x03, 0x07 },
- { "RD_DFTHRSH_75", 0x04, 0x07 },
- { "RD_DFTHRSH_85", 0x05, 0x07 },
- { "RD_DFTHRSH_90", 0x06, 0x07 },
- { "RD_DFTHRSH_MAX", 0x07, 0x07 },
- { "WR_DFTHRSH_25", 0x10, 0x70 },
- { "WR_DFTHRSH_50", 0x20, 0x70 },
- { "WR_DFTHRSH_63", 0x30, 0x70 },
- { "WR_DFTHRSH_75", 0x40, 0x70 },
- { "WR_DFTHRSH_85", 0x50, 0x70 },
- { "WR_DFTHRSH_90", 0x60, 0x70 },
- { "WR_DFTHRSH_MAX", 0x70, 0x70 },
- { "RD_DFTHRSH", 0x07, 0x07 },
- { "WR_DFTHRSH", 0x70, 0x70 }
-};
-
-int
-ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
- 0x88, regvalue, cur_col, wrap));
-}
-
-int
-ahd_romaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ROMADDR",
- 0x8a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t ROMCNTRL_parse_table[] = {
- { "RDY", 0x01, 0x01 },
- { "REPEAT", 0x02, 0x02 },
- { "ROMSPD", 0x18, 0x18 },
- { "ROMOP", 0xe0, 0xe0 }
-};
-
-int
-ahd_romcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ROMCNTRL_parse_table, 4, "ROMCNTRL",
- 0x8d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_romdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ROMDATA",
- 0x8e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_cmcrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG0_parse_table, 2, "CMCRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t ROENABLE_parse_table[] = {
- { "DCH0ROEN", 0x01, 0x01 },
- { "DCH1ROEN", 0x02, 0x02 },
- { "SGROEN", 0x04, 0x04 },
- { "CMCROEN", 0x08, 0x08 },
- { "OVLYROEN", 0x10, 0x10 },
- { "MSIROEN", 0x20, 0x20 }
-};
-
-int
-ahd_roenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ROENABLE_parse_table, 6, "ROENABLE",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_ovlyrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG0_parse_table, 2, "OVLYRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_dchrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG0_parse_table, 2, "DCHRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_ovlyrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG1_parse_table, 1, "OVLYRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t NSENABLE_parse_table[] = {
- { "DCH0NSEN", 0x01, 0x01 },
- { "DCH1NSEN", 0x02, 0x02 },
- { "SGNSEN", 0x04, 0x04 },
- { "CMCNSEN", 0x08, 0x08 },
- { "OVLYNSEN", 0x10, 0x10 },
- { "MSINSEN", 0x20, 0x20 }
-};
-
-int
-ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NSENABLE_parse_table, 6, "NSENABLE",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG2_parse_table, 1, "DCHRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_cmcrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG2_parse_table, 1, "CMCRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OST",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG3_parse_table, 1, "DCHRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_cmcrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG3_parse_table, 1, "CMCRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
- { "CMPABCDIS", 0x01, 0x01 },
- { "TSCSERREN", 0x02, 0x02 },
- { "SRSPDPEEN", 0x04, 0x04 },
- { "SPLTSTADIS", 0x08, 0x08 },
- { "SPLTSMADIS", 0x10, 0x10 },
- { "UNEXPSCIEN", 0x20, 0x20 },
- { "SERRPULSE", 0x80, 0x80 }
-};
-
-int
-ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PCIXCTL_parse_table, 7, "PCIXCTL",
- 0x93, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OVLYSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCSPLTSTAT0_parse_table, 8, "CMCSPLTSTAT0",
- 0x96, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
- 0x96, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
- 0x96, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
- 0x97, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
- 0x97, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
- 0x97, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_sgrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG0_parse_table, 2, "SGRXMSG0",
- 0x98, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR0_parse_table[] = {
- { "LOWER_ADDR", 0x7f, 0x7f }
-};
-
-int
-ahd_slvspltoutadr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR0_parse_table, 1, "SLVSPLTOUTADR0",
- 0x98, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_sgrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG1_parse_table, 1, "SGRXMSG1",
- 0x99, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR1_parse_table[] = {
- { "REQ_FNUM", 0x07, 0x07 },
- { "REQ_DNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_slvspltoutadr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR1_parse_table, 2, "SLVSPLTOUTADR1",
- 0x99, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_sgrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG2_parse_table, 1, "SGRXMSG2",
- 0x9a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR2_parse_table[] = {
- { "REQ_BNUM", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutadr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR2_parse_table, 1, "SLVSPLTOUTADR2",
- 0x9a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_sgrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG3_parse_table, 1, "SGRXMSG3",
- 0x9b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR3_parse_table[] = {
- { "RLXORD", 0x10, 0x10 },
- { "TAG_NUM", 0x1f, 0x1f }
-};
-
-int
-ahd_slvspltoutadr3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR3_parse_table, 2, "SLVSPLTOUTADR3",
- 0x9b, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sgseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SGSEQBCNT",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR0_parse_table[] = {
- { "LOWER_BCNT", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutattr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR0_parse_table, 1, "SLVSPLTOUTATTR0",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR1_parse_table[] = {
- { "CMPLT_FNUM", 0x07, 0x07 },
- { "CMPLT_DNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_slvspltoutattr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR1_parse_table, 2, "SLVSPLTOUTATTR1",
- 0x9d, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR2_parse_table[] = {
- { "CMPLT_BNUM", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutattr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR2_parse_table, 1, "SLVSPLTOUTATTR2",
- 0x9e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGSPLTSTAT0_parse_table, 8, "SGSPLTSTAT0",
- 0x9e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
- 0x9f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
- { "TEST_NUM", 0x0f, 0x0f },
- { "TEST_GROUP", 0xf0, 0xf0 }
-};
-
-int
-ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
- 0x9f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_df0pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DF0PCISTAT_parse_table, 8, "DF0PCISTAT",
- 0xa0, regvalue, cur_col, wrap));
-}
-
-int
ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "REG0",
0xa0, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DF1PCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
int
-ahd_df1pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DF1PCISTAT_parse_table, 8, "DF1PCISTAT",
- 0xa1, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_sgpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGPCISTAT_parse_table, 7, "SGPCISTAT",
- 0xa2, regvalue, cur_col, wrap));
-}
-
-int
ahd_reg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "REG1",
0xa2, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CMCPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
int
-ahd_cmcpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCPCISTAT_parse_table, 8, "CMCPCISTAT",
- 0xa3, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_ovlypcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYPCISTAT_parse_table, 7, "OVLYPCISTAT",
- 0xa4, regvalue, cur_col, wrap));
-}
-
-int
ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "REG_ISR",
0xa4, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
+static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
{ "SEGS_AVAIL", 0x01, 0x01 },
{ "LOADING_NEEDED", 0x02, 0x02 },
{ "FETCH_INPROG", 0x04, 0x04 }
};
@@ -2464,110 +563,16 @@
return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
0xa6, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t MSIPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "CLRPENDMSI", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 }
-};
-
int
-ahd_msipcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(MSIPCISTAT_parse_table, 6, "MSIPCISTAT",
- 0xa6, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
- { "TWATERR", 0x02, 0x02 },
- { "STA", 0x08, 0x08 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
- 0xa7, regvalue, cur_col, wrap));
-}
-
-int
ahd_data_count_odd_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "DATA_COUNT_ODD",
0xa7, regvalue, cur_col, wrap));
}
-int
-ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCBPTR",
- 0xa8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ccscbacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBACNT",
- 0xab, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
- { "SCBPTR_OFF", 0x07, 0x07 },
- { "SCBPTR_ADDR", 0x38, 0x38 },
- { "AUSCBPTR_EN", 0x80, 0x80 }
-};
-
-int
-ahd_scbautoptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCBAUTOPTR_parse_table, 3, "SCBAUTOPTR",
- 0xab, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSGADDR",
- 0xac, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
- 0xac, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBADDR",
- 0xac, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMC_RAMBIST_parse_table[] = {
- { "CMC_BUFFER_BIST_EN", 0x01, 0x01 },
- { "CMC_BUFFER_BIST_FAIL",0x02, 0x02 },
- { "SG_BIST_EN", 0x10, 0x10 },
- { "SG_BIST_FAIL", 0x20, 0x20 },
- { "SCBRAMBIST_FAIL", 0x40, 0x40 },
- { "SG_ELEMENT_SIZE", 0x80, 0x80 }
-};
-
-int
-ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMC_RAMBIST_parse_table, 6, "CMC_RAMBIST",
- 0xad, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
{ "CCSCBRESET", 0x01, 0x01 },
{ "CCSCBDIR", 0x04, 0x04 },
{ "CCSCBEN", 0x08, 0x08 },
{ "CCARREN", 0x10, 0x10 },
@@ -2581,9 +586,9 @@
return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
0xad, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
{ "CCSGRESET", 0x01, 0x01 },
{ "SG_FETCH_REQ", 0x02, 0x02 },
{ "CCSGENACK", 0x08, 0x08 },
{ "SG_CACHE_AVAIL", 0x10, 0x10 },
@@ -2597,316 +602,9 @@
return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
0xad, regvalue, cur_col, wrap));
}
-int
-ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSGRAM",
- 0xb0, regvalue, cur_col, wrap));
-}
-
-int
-ahd_flexadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXADR",
- 0xb0, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBRAM",
- 0xb0, regvalue, cur_col, wrap));
-}
-
-int
-ahd_flexcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXCNT",
- 0xb3, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t FLEXDMASTAT_parse_table[] = {
- { "FLEXDMADONE", 0x01, 0x01 },
- { "FLEXDMAERR", 0x02, 0x02 }
-};
-
-int
-ahd_flexdmastat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(FLEXDMASTAT_parse_table, 2, "FLEXDMASTAT",
- 0xb5, regvalue, cur_col, wrap));
-}
-
-int
-ahd_flexdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXDATA",
- 0xb6, regvalue, cur_col, wrap));
-}
-
-int
-ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BRDDAT",
- 0xb8, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
- { "BRDSTB", 0x01, 0x01 },
- { "BRDRW", 0x02, 0x02 },
- { "BRDEN", 0x04, 0x04 },
- { "BRDADDR", 0x38, 0x38 },
- { "FLXARBREQ", 0x40, 0x40 },
- { "FLXARBACK", 0x80, 0x80 }
-};
-
-int
-ahd_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(BRDCTL_parse_table, 6, "BRDCTL",
- 0xb9, regvalue, cur_col, wrap));
-}
-
-int
-ahd_seeadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SEEADR",
- 0xba, regvalue, cur_col, wrap));
-}
-
-int
-ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SEEDAT",
- 0xbc, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEECTL_parse_table[] = {
- { "SEEOP_ERAL", 0x40, 0x70 },
- { "SEEOP_WRITE", 0x50, 0x70 },
- { "SEEOP_READ", 0x60, 0x70 },
- { "SEEOP_ERASE", 0x70, 0x70 },
- { "SEESTART", 0x01, 0x01 },
- { "SEERST", 0x02, 0x02 },
- { "SEEOPCODE", 0x70, 0x70 },
- { "SEEOP_EWEN", 0x40, 0x40 },
- { "SEEOP_WALL", 0x40, 0x40 },
- { "SEEOP_EWDS", 0x40, 0x40 }
-};
-
-int
-ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SEECTL_parse_table, 10, "SEECTL",
- 0xbe, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
- { "SEESTART", 0x01, 0x01 },
- { "SEEBUSY", 0x02, 0x02 },
- { "SEEARBACK", 0x04, 0x04 },
- { "LDALTID_L", 0x08, 0x08 },
- { "SEEOPCODE", 0x70, 0x70 },
- { "INIT_DONE", 0x80, 0x80 }
-};
-
-int
-ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SEESTAT_parse_table, 6, "SEESTAT",
- 0xbe, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCBCNT",
- 0xbf, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFWADDR",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPFLTRCTL_parse_table[] = {
- { "DSPFCNTSEL", 0x0f, 0x0f },
- { "EDGESENSE", 0x10, 0x10 },
- { "FLTRDISABLE", 0x20, 0x20 }
-};
-
-int
-ahd_dspfltrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPFLTRCTL_parse_table, 3, "DSPFLTRCTL",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
- { "XMITOFFSTDIS", 0x02, 0x02 },
- { "RCVROFFSTDIS", 0x04, 0x04 },
- { "DESQDIS", 0x10, 0x10 },
- { "BYPASSENAB", 0x80, 0x80 }
-};
-
-int
-ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPDATACTL_parse_table, 4, "DSPDATACTL",
- 0xc1, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFRADDR",
- 0xc2, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPREQCTL_parse_table[] = {
- { "MANREQDLY", 0x3f, 0x3f },
- { "MANREQCTL", 0xc0, 0xc0 }
-};
-
-int
-ahd_dspreqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPREQCTL_parse_table, 2, "DSPREQCTL",
- 0xc2, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPACKCTL_parse_table[] = {
- { "MANACKDLY", 0x3f, 0x3f },
- { "MANACKCTL", 0xc0, 0xc0 }
-};
-
-int
-ahd_dspackctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPACKCTL_parse_table, 2, "DSPACKCTL",
- 0xc3, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFDAT",
- 0xc4, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
- { "DSPSEL", 0x1f, 0x1f },
- { "AUTOINCEN", 0x80, 0x80 }
-};
-
-int
-ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPSELECT_parse_table, 2, "DSPSELECT",
- 0xc4, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
- { "XMITMANVAL", 0x3f, 0x3f },
- { "AUTOXBCDIS", 0x80, 0x80 }
-};
-
-int
-ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(WRTBIASCTL_parse_table, 2, "WRTBIASCTL",
- 0xc5, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t RCVRBIOSCTL_parse_table[] = {
- { "RCVRMANVAL", 0x3f, 0x3f },
- { "AUTORBCDIS", 0x80, 0x80 }
-};
-
-int
-ahd_rcvrbiosctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(RCVRBIOSCTL_parse_table, 2, "RCVRBIOSCTL",
- 0xc6, regvalue, cur_col, wrap));
-}
-
-int
-ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "WRTBIASCALC",
- 0xc7, regvalue, cur_col, wrap));
-}
-
-int
-ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
- 0xc8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFPTRS",
- 0xc8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SKEWCALC",
- 0xc9, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFBKPTR",
- 0xc9, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFDBCTL_parse_table[] = {
- { "DFF_RAMBIST_EN", 0x01, 0x01 },
- { "DFF_RAMBIST_DONE", 0x02, 0x02 },
- { "DFF_RAMBIST_FAIL", 0x04, 0x04 },
- { "DFF_DIR_ERR", 0x08, 0x08 },
- { "DFF_CIO_RD_RDY", 0x10, 0x10 },
- { "DFF_CIO_WR_RDY", 0x20, 0x20 }
-};
-
-int
-ahd_dfdbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DFDBCTL_parse_table, 6, "DFDBCTL",
- 0xcb, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfscnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFSCNT",
- 0xcc, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFBCNT",
- 0xce, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ovlyaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OVLYADDR",
- 0xd4, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
{ "LOADRAM", 0x01, 0x01 },
{ "SEQRESET", 0x02, 0x02 },
{ "STEP", 0x04, 0x04 },
{ "BRKADRINTEN", 0x08, 0x08 },
@@ -2922,35 +620,9 @@
return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
0xd6, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQCTL1_parse_table[] = {
- { "RAMBIST_EN", 0x01, 0x01 },
- { "RAMBIST_FAIL", 0x02, 0x02 },
- { "RAMBIST_DONE", 0x04, 0x04 },
- { "OVRLAY_DATA_CHK", 0x08, 0x08 }
-};
-
-int
-ahd_seqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SEQCTL1_parse_table, 4, "SEQCTL1",
- 0xd7, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t FLAGS_parse_table[] = {
- { "CARRY", 0x01, 0x01 },
- { "ZERO", 0x02, 0x02 }
-};
-
-int
-ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(FLAGS_parse_table, 2, "FLAGS",
- 0xd8, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
{ "IRET", 0x01, 0x01 },
{ "INTMASK1", 0x02, 0x02 },
{ "INTMASK2", 0x04, 0x04 },
{ "SCS_SEQ_INT1M0", 0x08, 0x08 },
@@ -2966,138 +638,8 @@
0xd9, regvalue, cur_col, wrap));
}
int
-ahd_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SEQRAM",
- 0xda, regvalue, cur_col, wrap));
-}
-
-int
-ahd_prgmcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PRGMCNT",
- 0xde, regvalue, cur_col, wrap));
-}
-
-int
-ahd_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ACCUM",
- 0xe0, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SINDEX",
- 0xe2, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DINDEX",
- 0xe4, regvalue, cur_col, wrap));
-}
-
-int
-ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BRKADDR0",
- 0xe6, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
- { "BRKDIS", 0x80, 0x80 }
-};
-
-int
-ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(BRKADDR1_parse_table, 1, "BRKADDR1",
- 0xe6, regvalue, cur_col, wrap));
-}
-
-int
-ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ALLONES",
- 0xe8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ALLZEROS",
- 0xea, regvalue, cur_col, wrap));
-}
-
-int
-ahd_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "NONE",
- 0xea, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SINDIR",
- 0xec, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DINDIR",
- 0xed, regvalue, cur_col, wrap));
-}
-
-int
-ahd_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FUNCTION1",
- 0xf0, regvalue, cur_col, wrap));
-}
-
-int
-ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "STACK",
- 0xf2, regvalue, cur_col, wrap));
-}
-
-int
-ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
- 0xf4, regvalue, cur_col, wrap));
-}
-
-int
-ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CURADDR",
- 0xf4, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LASTADDR",
- 0xf6, regvalue, cur_col, wrap));
-}
-
-int
-ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
- 0xf6, regvalue, cur_col, wrap));
-}
-
-int
ahd_longjmp_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "LONGJMP_ADDR",
0xf8, regvalue, cur_col, wrap));
@@ -3117,15 +659,8 @@
0x100, regvalue, cur_col, wrap));
}
int
-ahd_ahd_pci_config_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE",
- 0x100, regvalue, cur_col, wrap));
-}
-
-int
ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SRAM_BASE",
0x100, regvalue, cur_col, wrap));
@@ -3214,9 +749,9 @@
return (ahd_print_register(NULL, 0, "MSG_OUT",
0x137, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
+static const ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
{ "HDMAEN", 0x08, 0x08 },
@@ -3234,9 +769,9 @@
return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
0x138, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
{ "NO_DISCONNECT", 0x01, 0x01 },
{ "SPHASE_PENDING", 0x02, 0x02 },
{ "DPHASE_PENDING", 0x04, 0x04 },
{ "CMDPHASE_PENDING", 0x08, 0x08 },
@@ -3267,9 +802,9 @@
return (ahd_print_register(NULL, 0, "SAVED_LUN",
0x13b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
+static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
{ "P_DATAOUT", 0x00, 0xe0 },
{ "P_DATAOUT_DT", 0x20, 0xe0 },
{ "P_DATAIN", 0x40, 0xe0 },
{ "P_DATAIN_DT", 0x60, 0xe0 },
@@ -3325,9 +860,9 @@
return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
0x144, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
+static const ahd_reg_parse_entry_t ARG_1_parse_table[] = {
{ "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
{ "CONT_MSG_LOOP_READ", 0x03, 0x03 },
{ "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
{ "EXIT_MSG_LOOP", 0x08, 0x08 },
@@ -3357,9 +892,9 @@
return (ahd_print_register(NULL, 0, "LAST_MSG",
0x14a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
{ "ALTSTIM", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "MANUALP", 0x0c, 0x0c },
{ "ENRSELI", 0x10, 0x10 },
@@ -3380,9 +915,9 @@
return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
0x14c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
{ "PENDING_MK_MESSAGE", 0x01, 0x01 },
{ "TARGET_MSG_PENDING", 0x02, 0x02 },
{ "SELECTOUT_QFROZEN", 0x04, 0x04 }
};
@@ -3477,9 +1012,9 @@
return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
0x180, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_OVERRUN_RESID", 0x02, 0x02 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
};
@@ -3532,9 +1067,9 @@
return (ahd_print_register(NULL, 0, "SCB_TAG",
0x190, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
{ "SCB_TAG_TYPE", 0x03, 0x03 },
{ "DISCONNECTED", 0x04, 0x04 },
{ "STATUS_RCVD", 0x08, 0x08 },
{ "MK_MESSAGE", 0x10, 0x10 },
@@ -3549,9 +1084,9 @@
return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
0x192, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
{ "OID", 0x0f, 0x0f },
{ "TID", 0xf0, 0xf0 }
};
@@ -3561,9 +1096,9 @@
return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
0x193, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
{ "LID", 0xff, 0xff }
};
int
@@ -3572,9 +1107,9 @@
return (ahd_print_register(SCB_LUN_parse_table, 1, "SCB_LUN",
0x194, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
{ "SCB_XFERLEN_ODD", 0x01, 0x01 }
};
int
@@ -3583,9 +1118,9 @@
return (ahd_print_register(SCB_TASK_ATTRIBUTE_parse_table, 1, "SCB_TASK_ATTRIBUTE",
0x195, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
{ "SCB_CDB_LEN_PTR", 0x80, 0x80 }
};
int
@@ -3608,9 +1143,9 @@
return (ahd_print_register(NULL, 0, "SCB_DATAPTR",
0x198, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
{ "SG_LAST_SEG", 0x80, 0x80 }
};
@@ -3620,9 +1155,9 @@
return (ahd_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
0x1a0, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_FULL_RESID", 0x02, 0x02 },
{ "SG_STATUS_VALID", 0x04, 0x04 }
};
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped Fri Apr 25 02:34:36 2008
@@ -4,9 +4,9 @@
*
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
*/
-static uint8_t seqprog[] = {
+static const uint8_t seqprog[] = {
0xff, 0x02, 0x06, 0x78,
0x00, 0xea, 0x6e, 0x59,
0x01, 0xea, 0x04, 0x30,
0xff, 0x04, 0x0c, 0x78,
@@ -1026,9 +1026,9 @@
{
return (0);
}
-static struct patch {
+static const struct patch {
ahd_patch_func_t *patch_func;
uint32_t begin :10,
skip_instr :10,
skip_patch :12;
@@ -1165,9 +1165,9 @@
{ ahd_patch0_func, 807, 1, 1 },
{ ahd_patch23_func, 815, 11, 1 }
};
-static struct cs {
+static const struct cs {
uint16_t begin;
uint16_t end;
} critical_sections[] = {
{ 17, 30 },
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic7xxx_reg.h_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic7xxx_reg.h_shipped Fri Apr 25 02:37:17 2008
@@ -26,22 +26,8 @@
ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sxfrctl1_print;
-#else
-#define ahc_sxfrctl1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SXFRCTL1", 0x02, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsisigo_print;
-#else
-#define ahc_scsisigo_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSISIGO", 0x03, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scsisigi_print;
#else
#define ahc_scsisigi_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
@@ -54,71 +40,15 @@
ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsiid_print;
-#else
-#define ahc_scsiid_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSIID", 0x05, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsidatl_print;
-#else
-#define ahc_scsidatl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSIDATL", 0x06, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsidath_print;
-#else
-#define ahc_scsidath_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSIDATH", 0x07, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_stcnt_print;
-#else
-#define ahc_stcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "STCNT", 0x08, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_optionmode_print;
-#else
-#define ahc_optionmode_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "OPTIONMODE", 0x08, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_targcrccnt_print;
-#else
-#define ahc_targcrccnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "TARGCRCCNT", 0x0a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_clrsint0_print;
-#else
-#define ahc_clrsint0_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CLRSINT0", 0x0b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sstat0_print;
#else
#define ahc_sstat0_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_clrsint1_print;
-#else
-#define ahc_clrsint1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CLRSINT1", 0x0c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sstat1_print;
#else
#define ahc_sstat1_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
@@ -138,15 +68,8 @@
ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsiid_ultra2_print;
-#else
-#define ahc_scsiid_ultra2_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSIID_ULTRA2", 0x0f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_simode0_print;
#else
#define ahc_simode0_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
@@ -166,78 +89,8 @@
ahc_print_register(NULL, 0, "SCSIBUSL", 0x12, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scsibush_print;
-#else
-#define ahc_scsibush_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCSIBUSH", 0x13, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sxfrctl2_print;
-#else
-#define ahc_sxfrctl2_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SXFRCTL2", 0x13, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_shaddr_print;
-#else
-#define ahc_shaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SHADDR", 0x14, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seltimer_print;
-#else
-#define ahc_seltimer_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SELTIMER", 0x18, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_selid_print;
-#else
-#define ahc_selid_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SELID", 0x19, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scamctl_print;
-#else
-#define ahc_scamctl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCAMCTL", 0x1a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_targid_print;
-#else
-#define ahc_targid_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "TARGID", 0x1b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_spiocap_print;
-#else
-#define ahc_spiocap_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SPIOCAP", 0x1b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_brdctl_print;
-#else
-#define ahc_brdctl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "BRDCTL", 0x1d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seectl_print;
-#else
-#define ahc_seectl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SEECTL", 0x1e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sblkctl_print;
#else
#define ahc_sblkctl_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SBLKCTL", 0x1f, regvalue, cur_col, wrap)
@@ -481,106 +334,8 @@
ahc_print_register(NULL, 0, "SEQCTL", 0x60, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seqram_print;
-#else
-#define ahc_seqram_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SEQRAM", 0x61, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seqaddr0_print;
-#else
-#define ahc_seqaddr0_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SEQADDR0", 0x62, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seqaddr1_print;
-#else
-#define ahc_seqaddr1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SEQADDR1", 0x63, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_accum_print;
-#else
-#define ahc_accum_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "ACCUM", 0x64, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sindex_print;
-#else
-#define ahc_sindex_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SINDEX", 0x65, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dindex_print;
-#else
-#define ahc_dindex_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DINDEX", 0x66, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_allones_print;
-#else
-#define ahc_allones_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "ALLONES", 0x69, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_allzeros_print;
-#else
-#define ahc_allzeros_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "ALLZEROS", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_none_print;
-#else
-#define ahc_none_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "NONE", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_flags_print;
-#else
-#define ahc_flags_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "FLAGS", 0x6b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sindir_print;
-#else
-#define ahc_sindir_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SINDIR", 0x6c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dindir_print;
-#else
-#define ahc_dindir_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DINDIR", 0x6d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_function1_print;
-#else
-#define ahc_function1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "FUNCTION1", 0x6e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_stack_print;
-#else
-#define ahc_stack_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "STACK", 0x6f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_targ_offset_print;
#else
#define ahc_targ_offset_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "TARG_OFFSET", 0x70, regvalue, cur_col, wrap)
@@ -593,99 +348,8 @@
ahc_print_register(NULL, 0, "SRAM_BASE", 0x70, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_bctl_print;
-#else
-#define ahc_bctl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "BCTL", 0x84, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dscommand0_print;
-#else
-#define ahc_dscommand0_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DSCOMMAND0", 0x84, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_bustime_print;
-#else
-#define ahc_bustime_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "BUSTIME", 0x85, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dscommand1_print;
-#else
-#define ahc_dscommand1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DSCOMMAND1", 0x85, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_busspd_print;
-#else
-#define ahc_busspd_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "BUSSPD", 0x86, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_hs_mailbox_print;
-#else
-#define ahc_hs_mailbox_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "HS_MAILBOX", 0x86, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dspcistatus_print;
-#else
-#define ahc_dspcistatus_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DSPCISTATUS", 0x86, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_hcntrl_print;
-#else
-#define ahc_hcntrl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "HCNTRL", 0x87, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_haddr_print;
-#else
-#define ahc_haddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "HADDR", 0x88, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_hcnt_print;
-#else
-#define ahc_hcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "HCNT", 0x8c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scbptr_print;
-#else
-#define ahc_scbptr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCBPTR", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_intstat_print;
-#else
-#define ahc_intstat_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "INTSTAT", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_clrint_print;
-#else
-#define ahc_clrint_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CLRINT", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_error_print;
#else
#define ahc_error_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "ERROR", 0x92, regvalue, cur_col, wrap)
@@ -705,85 +369,15 @@
ahc_print_register(NULL, 0, "DFSTATUS", 0x94, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dfwaddr_print;
-#else
-#define ahc_dfwaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DFWADDR", 0x95, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dfraddr_print;
-#else
-#define ahc_dfraddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DFRADDR", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dfdat_print;
-#else
-#define ahc_dfdat_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DFDAT", 0x99, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scbcnt_print;
-#else
-#define ahc_scbcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCBCNT", 0x9a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_qinfifo_print;
-#else
-#define ahc_qinfifo_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "QINFIFO", 0x9b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_qincnt_print;
-#else
-#define ahc_qincnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "QINCNT", 0x9c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_qoutfifo_print;
-#else
-#define ahc_qoutfifo_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "QOUTFIFO", 0x9d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_crccontrol1_print;
-#else
-#define ahc_crccontrol1_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CRCCONTROL1", 0x9d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_qoutcnt_print;
-#else
-#define ahc_qoutcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "QOUTCNT", 0x9e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scsiphase_print;
#else
#define ahc_scsiphase_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SCSIPHASE", 0x9e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sfunct_print;
-#else
-#define ahc_sfunct_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_base_print;
#else
#define ahc_scb_base_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SCB_BASE", 0xa0, regvalue, cur_col, wrap)
@@ -915,152 +509,12 @@
ahc_print_register(NULL, 0, "SCB_64_SPARE", 0xc0, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_seectl_2840_print;
-#else
-#define ahc_seectl_2840_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SEECTL_2840", 0xc0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_status_2840_print;
-#else
-#define ahc_status_2840_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "STATUS_2840", 0xc1, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_64_btt_print;
#else
#define ahc_scb_64_btt_print(regvalue, cur_col, wrap) \
ahc_print_register(NULL, 0, "SCB_64_BTT", 0xd0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_cchaddr_print;
-#else
-#define ahc_cchaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCHADDR", 0xe0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_cchcnt_print;
-#else
-#define ahc_cchcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCHCNT", 0xe8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccsgram_print;
-#else
-#define ahc_ccsgram_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSGRAM", 0xe9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccsgaddr_print;
-#else
-#define ahc_ccsgaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSGADDR", 0xea, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccsgctl_print;
-#else
-#define ahc_ccsgctl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSGCTL", 0xeb, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccscbram_print;
-#else
-#define ahc_ccscbram_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSCBRAM", 0xec, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccscbaddr_print;
-#else
-#define ahc_ccscbaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSCBADDR", 0xed, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccscbctl_print;
-#else
-#define ahc_ccscbctl_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSCBCTL", 0xee, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccscbcnt_print;
-#else
-#define ahc_ccscbcnt_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSCBCNT", 0xef, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_scbbaddr_print;
-#else
-#define ahc_scbbaddr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SCBBADDR", 0xf0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_ccscbptr_print;
-#else
-#define ahc_ccscbptr_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "CCSCBPTR", 0xf1, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_hnscb_qoff_print;
-#else
-#define ahc_hnscb_qoff_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "HNSCB_QOFF", 0xf4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_snscb_qoff_print;
-#else
-#define ahc_snscb_qoff_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SNSCB_QOFF", 0xf6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sdscb_qoff_print;
-#else
-#define ahc_sdscb_qoff_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SDSCB_QOFF", 0xf8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_qoff_ctlsta_print;
-#else
-#define ahc_qoff_ctlsta_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "QOFF_CTLSTA", 0xfa, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_dff_thrsh_print;
-#else
-#define ahc_dff_thrsh_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "DFF_THRSH", 0xfb, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sg_cache_shadow_print;
-#else
-#define ahc_sg_cache_shadow_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SG_CACHE_SHADOW", 0xfc, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahc_reg_print_t ahc_sg_cache_pre_print;
-#else
-#define ahc_sg_cache_pre_print(regvalue, cur_col, wrap) \
- ahc_print_register(NULL, 0, "SG_CACHE_PRE", 0xfc, regvalue, cur_col, wrap)
#endif
#define SCSISEQ 0x00
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped Fri Apr 25 02:37:17 2008
@@ -7,9 +7,9 @@
*/
#include "aic7xxx_osm.h"
-static ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
{ "SCSIRSTO", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
{ "ENAUTOATNO", 0x08, 0x08 },
@@ -25,9 +25,9 @@
return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
0x00, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
+static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
{ "CLRCHN", 0x02, 0x02 },
{ "SCAMEN", 0x04, 0x04 },
{ "SPIOEN", 0x08, 0x08 },
{ "CLRSTCNT", 0x10, 0x10 },
@@ -42,51 +42,9 @@
return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
0x01, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = {
- { "STPWEN", 0x01, 0x01 },
- { "ACTNEGEN", 0x02, 0x02 },
- { "ENSTIMER", 0x04, 0x04 },
- { "ENSPCHK", 0x20, 0x20 },
- { "SWRAPEN", 0x40, 0x40 },
- { "BITBUCKET", 0x80, 0x80 },
- { "STIMESEL", 0x18, 0x18 }
-};
-
-int
-ahc_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
- 0x02, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCSISIGO_parse_table[] = {
- { "ACKO", 0x01, 0x01 },
- { "REQO", 0x02, 0x02 },
- { "BSYO", 0x04, 0x04 },
- { "SELO", 0x08, 0x08 },
- { "ATNO", 0x10, 0x10 },
- { "MSGO", 0x20, 0x20 },
- { "IOO", 0x40, 0x40 },
- { "CDO", 0x80, 0x80 },
- { "P_DATAOUT", 0x00, 0x00 },
- { "P_DATAIN", 0x40, 0x40 },
- { "P_COMMAND", 0x80, 0x80 },
- { "P_MESGOUT", 0xa0, 0xa0 },
- { "P_STATUS", 0xc0, 0xc0 },
- { "PHASE_MASK", 0xe0, 0xe0 },
- { "P_MESGIN", 0xe0, 0xe0 }
-};
-
-int
-ahc_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCSISIGO_parse_table, 15, "SCSISIGO",
- 0x03, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
{ "ACKI", 0x01, 0x01 },
{ "REQI", 0x02, 0x02 },
{ "BSYI", 0x04, 0x04 },
{ "SELI", 0x08, 0x08 },
@@ -111,9 +69,9 @@
return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
0x03, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
{ "SINGLE_EDGE", 0x10, 0x10 },
{ "ENABLE_CRC", 0x40, 0x40 },
{ "WIDEXFER", 0x80, 0x80 },
{ "SXFR_ULTRA2", 0x0f, 0x0f },
@@ -127,87 +85,9 @@
return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
0x04, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIID_parse_table[] = {
- { "TWIN_CHNLB", 0x80, 0x80 },
- { "OID", 0x0f, 0x0f },
- { "TWIN_TID", 0x70, 0x70 },
- { "SOFS_ULTRA2", 0x7f, 0x7f },
- { "TID", 0xf0, 0xf0 }
-};
-
-int
-ahc_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCSIID_parse_table, 5, "SCSIID",
- 0x05, regvalue, cur_col, wrap));
-}
-
-int
-ahc_scsidatl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCSIDATL",
- 0x06, regvalue, cur_col, wrap));
-}
-
-int
-ahc_scsidath_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCSIDATH",
- 0x07, regvalue, cur_col, wrap));
-}
-
-int
-ahc_stcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "STCNT",
- 0x08, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = {
- { "DIS_MSGIN_DUALEDGE", 0x01, 0x01 },
- { "AUTO_MSGOUT_DE", 0x02, 0x02 },
- { "SCSIDATL_IMGEN", 0x04, 0x04 },
- { "EXPPHASEDIS", 0x08, 0x08 },
- { "BUSFREEREV", 0x10, 0x10 },
- { "ATNMGMNTEN", 0x20, 0x20 },
- { "AUTOACKEN", 0x40, 0x40 },
- { "AUTORATEEN", 0x80, 0x80 },
- { "OPTIONMODE_DEFAULTS",0x03, 0x03 }
-};
-
-int
-ahc_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(OPTIONMODE_parse_table, 9, "OPTIONMODE",
- 0x08, regvalue, cur_col, wrap));
-}
-
-int
-ahc_targcrccnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "TARGCRCCNT",
- 0x0a, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t CLRSINT0_parse_table[] = {
- { "CLRSPIORDY", 0x02, 0x02 },
- { "CLRSWRAP", 0x08, 0x08 },
- { "CLRIOERR", 0x08, 0x08 },
- { "CLRSELINGO", 0x10, 0x10 },
- { "CLRSELDI", 0x20, 0x20 },
- { "CLRSELDO", 0x40, 0x40 }
-};
-
-int
-ahc_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CLRSINT0_parse_table, 6, "CLRSINT0",
- 0x0b, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "DMADONE", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 },
{ "SDONE", 0x04, 0x04 },
{ "SWRAP", 0x08, 0x08 },
@@ -224,26 +104,9 @@
return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
0x0b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CLRSINT1_parse_table[] = {
- { "CLRREQINIT", 0x01, 0x01 },
- { "CLRPHASECHG", 0x02, 0x02 },
- { "CLRSCSIPERR", 0x04, 0x04 },
- { "CLRBUSFREE", 0x08, 0x08 },
- { "CLRSCSIRSTI", 0x20, 0x20 },
- { "CLRATNO", 0x40, 0x40 },
- { "CLRSELTIMEO", 0x80, 0x80 }
-};
-
-int
-ahc_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
- 0x0c, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 },
{ "PHASECHG", 0x02, 0x02 },
{ "SCSIPERR", 0x04, 0x04 },
{ "BUSFREE", 0x08, 0x08 },
@@ -259,9 +122,9 @@
return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
0x0c, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
{ "DUAL_EDGE_ERR", 0x01, 0x01 },
{ "CRCREQERR", 0x02, 0x02 },
{ "CRCENDERR", 0x04, 0x04 },
{ "CRCVALERR", 0x08, 0x08 },
@@ -277,9 +140,9 @@
return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
0x0d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
{ "OFFCNT", 0x0f, 0x0f },
{ "U2OFFCNT", 0x7f, 0x7f },
{ "SCSICNT", 0xf0, 0xf0 }
};
@@ -290,21 +153,9 @@
return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
0x0e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = {
- { "OID", 0x0f, 0x0f },
- { "TID", 0xf0, 0xf0 }
-};
-
-int
-ahc_scsiid_ultra2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCSIID_ULTRA2_parse_table, 2, "SCSIID_ULTRA2",
- 0x0f, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
+static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENDMADONE", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENSDONE", 0x04, 0x04 },
{ "ENSWRAP", 0x08, 0x08 },
@@ -320,9 +171,9 @@
return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
0x10, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
+static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
{ "ENREQINIT", 0x01, 0x01 },
{ "ENPHASECHG", 0x02, 0x02 },
{ "ENSCSIPERR", 0x04, 0x04 },
{ "ENBUSFREE", 0x08, 0x08 },
@@ -345,145 +196,9 @@
return (ahc_print_register(NULL, 0, "SCSIBUSL",
0x12, regvalue, cur_col, wrap));
}
-int
-ahc_scsibush_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCSIBUSH",
- 0x13, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SXFRCTL2_parse_table[] = {
- { "CMDDMAEN", 0x08, 0x08 },
- { "AUTORSTDIS", 0x10, 0x10 },
- { "ASYNC_SETUP", 0x07, 0x07 }
-};
-
-int
-ahc_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
- 0x13, regvalue, cur_col, wrap));
-}
-
-int
-ahc_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SHADDR",
- 0x14, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SELTIMER_parse_table[] = {
- { "STAGE1", 0x01, 0x01 },
- { "STAGE2", 0x02, 0x02 },
- { "STAGE3", 0x04, 0x04 },
- { "STAGE4", 0x08, 0x08 },
- { "STAGE5", 0x10, 0x10 },
- { "STAGE6", 0x20, 0x20 }
-};
-
-int
-ahc_seltimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SELTIMER_parse_table, 6, "SELTIMER",
- 0x18, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SELID_parse_table[] = {
- { "ONEBIT", 0x08, 0x08 },
- { "SELID_MASK", 0xf0, 0xf0 }
-};
-
-int
-ahc_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SELID_parse_table, 2, "SELID",
- 0x19, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCAMCTL_parse_table[] = {
- { "DFLTTID", 0x10, 0x10 },
- { "ALTSTIM", 0x20, 0x20 },
- { "CLRSCAMSELID", 0x40, 0x40 },
- { "ENSCAMSELO", 0x80, 0x80 },
- { "SCAMLVL", 0x03, 0x03 }
-};
-
-int
-ahc_scamctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCAMCTL_parse_table, 5, "SCAMCTL",
- 0x1a, regvalue, cur_col, wrap));
-}
-
-int
-ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "TARGID",
- 0x1b, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SPIOCAP_parse_table[] = {
- { "SSPIOCPS", 0x01, 0x01 },
- { "ROM", 0x02, 0x02 },
- { "EEPROM", 0x04, 0x04 },
- { "SEEPROM", 0x08, 0x08 },
- { "EXT_BRDCTL", 0x10, 0x10 },
- { "SOFTCMDEN", 0x20, 0x20 },
- { "SOFT0", 0x40, 0x40 },
- { "SOFT1", 0x80, 0x80 }
-};
-
-int
-ahc_spiocap_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SPIOCAP_parse_table, 8, "SPIOCAP",
- 0x1b, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t BRDCTL_parse_table[] = {
- { "BRDCTL0", 0x01, 0x01 },
- { "BRDSTB_ULTRA2", 0x01, 0x01 },
- { "BRDCTL1", 0x02, 0x02 },
- { "BRDRW_ULTRA2", 0x02, 0x02 },
- { "BRDRW", 0x04, 0x04 },
- { "BRDDAT2", 0x04, 0x04 },
- { "BRDCS", 0x08, 0x08 },
- { "BRDDAT3", 0x08, 0x08 },
- { "BRDSTB", 0x10, 0x10 },
- { "BRDDAT4", 0x10, 0x10 },
- { "BRDDAT5", 0x20, 0x20 },
- { "BRDDAT6", 0x40, 0x40 },
- { "BRDDAT7", 0x80, 0x80 }
-};
-
-int
-ahc_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(BRDCTL_parse_table, 13, "BRDCTL",
- 0x1d, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SEECTL_parse_table[] = {
- { "SEEDI", 0x01, 0x01 },
- { "SEEDO", 0x02, 0x02 },
- { "SEECK", 0x04, 0x04 },
- { "SEECS", 0x08, 0x08 },
- { "SEERDY", 0x10, 0x10 },
- { "SEEMS", 0x20, 0x20 },
- { "EXTARBREQ", 0x40, 0x40 },
- { "EXTARBACK", 0x80, 0x80 }
-};
-
-int
-ahc_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SEECTL_parse_table, 8, "SEECTL",
- 0x1e, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
{ "XCVR", 0x01, 0x01 },
{ "SELWIDE", 0x02, 0x02 },
{ "ENAB20", 0x04, 0x04 },
{ "SELBUSB", 0x08, 0x08 },
@@ -548,9 +263,9 @@
return (ahc_print_register(NULL, 0, "MSG_OUT",
0x3a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
+static const ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
{ "HDMAEN", 0x08, 0x08 },
@@ -568,9 +283,9 @@
return (ahc_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
0x3b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
{ "NO_DISCONNECT", 0x01, 0x01 },
{ "SPHASE_PENDING", 0x02, 0x02 },
{ "DPHASE_PENDING", 0x04, 0x04 },
{ "CMDPHASE_PENDING", 0x08, 0x08 },
@@ -601,9 +316,9 @@
return (ahc_print_register(NULL, 0, "SAVED_LUN",
0x3e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
+static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
{ "MSGI", 0x20, 0x20 },
{ "IOI", 0x40, 0x40 },
{ "CDI", 0x80, 0x80 },
{ "P_DATAOUT", 0x00, 0x00 },
@@ -699,9 +414,9 @@
return (ahc_print_register(NULL, 0, "TQINPOS",
0x50, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t ARG_1_parse_table[] = {
+static const ahc_reg_parse_entry_t ARG_1_parse_table[] = {
{ "CONT_TARG_SESSION", 0x02, 0x02 },
{ "CONT_MSG_LOOP", 0x04, 0x04 },
{ "EXIT_MSG_LOOP", 0x08, 0x08 },
{ "MSGOUT_PHASEMIS", 0x10, 0x10 },
@@ -730,9 +445,9 @@
return (ahc_print_register(NULL, 0, "LAST_MSG",
0x53, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
{ "ENAUTOATNP", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
{ "ENAUTOATNO", 0x08, 0x08 },
{ "ENRSELI", 0x10, 0x10 },
@@ -746,9 +461,9 @@
return (ahc_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
0x54, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
+static const ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
{ "HA_274_EXTENDED_TRANS",0x01, 0x01 }
};
int
@@ -757,9 +472,9 @@
return (ahc_print_register(HA_274_BIOSGLOBAL_parse_table, 1, "HA_274_BIOSGLOBAL",
0x56, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
{ "SCB_DMA", 0x01, 0x01 },
{ "TARGET_MSG_PENDING", 0x02, 0x02 }
};
@@ -769,9 +484,9 @@
return (ahc_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
0x57, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
{ "ENSPCHK", 0x20, 0x20 },
{ "RESET_SCSI", 0x40, 0x40 },
{ "TERM_ENB", 0x80, 0x80 },
{ "HSCSIID", 0x07, 0x07 },
@@ -784,9 +499,9 @@
return (ahc_print_register(SCSICONF_parse_table, 5, "SCSICONF",
0x5a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t INTDEF_parse_table[] = {
+static const ahc_reg_parse_entry_t INTDEF_parse_table[] = {
{ "EDGE_TRIG", 0x80, 0x80 },
{ "VECTOR", 0x0f, 0x0f }
};
@@ -803,9 +518,9 @@
return (ahc_print_register(NULL, 0, "HOSTCONF",
0x5d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
+static const ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
{ "CHANNEL_B_PRIMARY", 0x08, 0x08 },
{ "BIOSMODE", 0x30, 0x30 },
{ "BIOSDISABLED", 0x30, 0x30 }
};
@@ -816,9 +531,9 @@
return (ahc_print_register(HA_274_BIOSCTRL_parse_table, 3, "HA_274_BIOSCTRL",
0x5f, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
{ "LOADRAM", 0x01, 0x01 },
{ "SEQRESET", 0x02, 0x02 },
{ "STEP", 0x04, 0x04 },
{ "BRKADRINTEN", 0x08, 0x08 },
@@ -835,115 +550,8 @@
0x60, regvalue, cur_col, wrap));
}
int
-ahc_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SEQRAM",
- 0x61, regvalue, cur_col, wrap));
-}
-
-int
-ahc_seqaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SEQADDR0",
- 0x62, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SEQADDR1_parse_table[] = {
- { "SEQADDR1_MASK", 0x01, 0x01 }
-};
-
-int
-ahc_seqaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SEQADDR1_parse_table, 1, "SEQADDR1",
- 0x63, regvalue, cur_col, wrap));
-}
-
-int
-ahc_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "ACCUM",
- 0x64, regvalue, cur_col, wrap));
-}
-
-int
-ahc_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SINDEX",
- 0x65, regvalue, cur_col, wrap));
-}
-
-int
-ahc_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DINDEX",
- 0x66, regvalue, cur_col, wrap));
-}
-
-int
-ahc_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "ALLONES",
- 0x69, regvalue, cur_col, wrap));
-}
-
-int
-ahc_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "ALLZEROS",
- 0x6a, regvalue, cur_col, wrap));
-}
-
-int
-ahc_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "NONE",
- 0x6a, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t FLAGS_parse_table[] = {
- { "CARRY", 0x01, 0x01 },
- { "ZERO", 0x02, 0x02 }
-};
-
-int
-ahc_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(FLAGS_parse_table, 2, "FLAGS",
- 0x6b, regvalue, cur_col, wrap));
-}
-
-int
-ahc_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SINDIR",
- 0x6c, regvalue, cur_col, wrap));
-}
-
-int
-ahc_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DINDIR",
- 0x6d, regvalue, cur_col, wrap));
-}
-
-int
-ahc_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "FUNCTION1",
- 0x6e, regvalue, cur_col, wrap));
-}
-
-int
-ahc_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "STACK",
- 0x6f, regvalue, cur_col, wrap));
-}
-
-int
ahc_targ_offset_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "TARG_OFFSET",
0x70, regvalue, cur_col, wrap));
@@ -955,187 +563,9 @@
return (ahc_print_register(NULL, 0, "SRAM_BASE",
0x70, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t BCTL_parse_table[] = {
- { "ENABLE", 0x01, 0x01 },
- { "ACE", 0x08, 0x08 }
-};
-
-int
-ahc_bctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(BCTL_parse_table, 2, "BCTL",
- 0x84, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
- { "CIOPARCKEN", 0x01, 0x01 },
- { "USCBSIZE32", 0x02, 0x02 },
- { "RAMPS", 0x04, 0x04 },
- { "INTSCBRAMSEL", 0x08, 0x08 },
- { "EXTREQLCK", 0x10, 0x10 },
- { "MPARCKEN", 0x20, 0x20 },
- { "DPARCKEN", 0x40, 0x40 },
- { "CACHETHEN", 0x80, 0x80 }
-};
-
-int
-ahc_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(DSCOMMAND0_parse_table, 8, "DSCOMMAND0",
- 0x84, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t BUSTIME_parse_table[] = {
- { "BON", 0x0f, 0x0f },
- { "BOFF", 0xf0, 0xf0 }
-};
-
-int
-ahc_bustime_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(BUSTIME_parse_table, 2, "BUSTIME",
- 0x85, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = {
- { "HADDLDSEL0", 0x01, 0x01 },
- { "HADDLDSEL1", 0x02, 0x02 },
- { "DSLATT", 0xfc, 0xfc }
-};
-
-int
-ahc_dscommand1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(DSCOMMAND1_parse_table, 3, "DSCOMMAND1",
- 0x85, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t BUSSPD_parse_table[] = {
- { "STBON", 0x07, 0x07 },
- { "STBOFF", 0x38, 0x38 },
- { "DFTHRSH_75", 0x80, 0x80 },
- { "DFTHRSH", 0xc0, 0xc0 },
- { "DFTHRSH_100", 0xc0, 0xc0 }
-};
-
-int
-ahc_busspd_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(BUSSPD_parse_table, 5, "BUSSPD",
- 0x86, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
- { "SEQ_MAILBOX", 0x0f, 0x0f },
- { "HOST_TQINPOS", 0x80, 0x80 },
- { "HOST_MAILBOX", 0xf0, 0xf0 }
-};
-
-int
-ahc_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(HS_MAILBOX_parse_table, 3, "HS_MAILBOX",
- 0x86, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = {
- { "DFTHRSH_100", 0xc0, 0xc0 }
-};
-
-int
-ahc_dspcistatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(DSPCISTATUS_parse_table, 1, "DSPCISTATUS",
- 0x86, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t HCNTRL_parse_table[] = {
- { "CHIPRST", 0x01, 0x01 },
- { "CHIPRSTACK", 0x01, 0x01 },
- { "INTEN", 0x02, 0x02 },
- { "PAUSE", 0x04, 0x04 },
- { "IRQMS", 0x08, 0x08 },
- { "SWINT", 0x10, 0x10 },
- { "POWRDN", 0x40, 0x40 }
-};
-
-int
-ahc_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(HCNTRL_parse_table, 7, "HCNTRL",
- 0x87, regvalue, cur_col, wrap));
-}
-
-int
-ahc_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "HADDR",
- 0x88, regvalue, cur_col, wrap));
-}
-
-int
-ahc_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "HCNT",
- 0x8c, regvalue, cur_col, wrap));
-}
-
-int
-ahc_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCBPTR",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t INTSTAT_parse_table[] = {
- { "SEQINT", 0x01, 0x01 },
- { "CMDCMPLT", 0x02, 0x02 },
- { "SCSIINT", 0x04, 0x04 },
- { "BRKADRINT", 0x08, 0x08 },
- { "BAD_PHASE", 0x01, 0x01 },
- { "INT_PEND", 0x0f, 0x0f },
- { "SEND_REJECT", 0x11, 0x11 },
- { "PROTO_VIOLATION", 0x21, 0x21 },
- { "NO_MATCH", 0x31, 0x31 },
- { "IGN_WIDE_RES", 0x41, 0x41 },
- { "PDATA_REINIT", 0x51, 0x51 },
- { "HOST_MSG_LOOP", 0x61, 0x61 },
- { "BAD_STATUS", 0x71, 0x71 },
- { "PERR_DETECTED", 0x81, 0x81 },
- { "DATA_OVERRUN", 0x91, 0x91 },
- { "MKMSG_FAILED", 0xa1, 0xa1 },
- { "MISSED_BUSFREE", 0xb1, 0xb1 },
- { "SCB_MISMATCH", 0xc1, 0xc1 },
- { "NO_FREE_SCB", 0xd1, 0xd1 },
- { "OUT_OF_RANGE", 0xe1, 0xe1 },
- { "SEQINT_MASK", 0xf1, 0xf1 }
-};
-
-int
-ahc_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(INTSTAT_parse_table, 21, "INTSTAT",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t CLRINT_parse_table[] = {
- { "CLRSEQINT", 0x01, 0x01 },
- { "CLRCMDINT", 0x02, 0x02 },
- { "CLRSCSIINT", 0x04, 0x04 },
- { "CLRBRKADRINT", 0x08, 0x08 },
- { "CLRPARERR", 0x10, 0x10 }
-};
-
-int
-ahc_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CLRINT_parse_table, 5, "CLRINT",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t ERROR_parse_table[] = {
+static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
{ "ILLHADDR", 0x01, 0x01 },
{ "ILLSADDR", 0x02, 0x02 },
{ "ILLOPCODE", 0x04, 0x04 },
{ "SQPARERR", 0x08, 0x08 },
@@ -1151,9 +581,9 @@
return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
0x92, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
+static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
{ "HDMAEN", 0x08, 0x08 },
@@ -1171,9 +601,9 @@
return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
0x93, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
+static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
{ "FIFOEMP", 0x01, 0x01 },
{ "FIFOFULL", 0x02, 0x02 },
{ "DFTHRESH", 0x04, 0x04 },
{ "HDONE", 0x08, 0x08 },
@@ -1189,86 +619,9 @@
return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
0x94, regvalue, cur_col, wrap));
}
-int
-ahc_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DFWADDR",
- 0x95, regvalue, cur_col, wrap));
-}
-
-int
-ahc_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DFRADDR",
- 0x97, regvalue, cur_col, wrap));
-}
-
-int
-ahc_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DFDAT",
- 0x99, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCBCNT_parse_table[] = {
- { "SCBAUTO", 0x80, 0x80 },
- { "SCBCNT_MASK", 0x1f, 0x1f }
-};
-
-int
-ahc_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCBCNT_parse_table, 2, "SCBCNT",
- 0x9a, regvalue, cur_col, wrap));
-}
-
-int
-ahc_qinfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QINFIFO",
- 0x9b, regvalue, cur_col, wrap));
-}
-
-int
-ahc_qincnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QINCNT",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-int
-ahc_qoutfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QOUTFIFO",
- 0x9d, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = {
- { "TARGCRCCNTEN", 0x04, 0x04 },
- { "TARGCRCENDEN", 0x08, 0x08 },
- { "CRCREQCHKEN", 0x10, 0x10 },
- { "CRCENDCHKEN", 0x20, 0x20 },
- { "CRCVALCHKEN", 0x40, 0x40 },
- { "CRCONSEEN", 0x80, 0x80 }
-};
-
-int
-ahc_crccontrol1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CRCCONTROL1_parse_table, 6, "CRCCONTROL1",
- 0x9d, regvalue, cur_col, wrap));
-}
-
-int
-ahc_qoutcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QOUTCNT",
- 0x9e, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
{ "DATA_OUT_PHASE", 0x01, 0x01 },
{ "DATA_IN_PHASE", 0x02, 0x02 },
{ "MSG_OUT_PHASE", 0x04, 0x04 },
{ "MSG_IN_PHASE", 0x08, 0x08 },
@@ -1283,20 +636,9 @@
return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
0x9e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SFUNCT_parse_table[] = {
- { "ALT_MODE", 0x80, 0x80 }
-};
-
int
-ahc_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SFUNCT_parse_table, 1, "SFUNCT",
- 0x9f, regvalue, cur_col, wrap));
-}
-
-int
ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SCB_BASE",
0xa0, regvalue, cur_col, wrap));
@@ -1350,9 +692,9 @@
return (ahc_print_register(NULL, 0, "SCB_DATAPTR",
0xac, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
{ "SG_LAST_SEG", 0x80, 0x80 },
{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f }
};
@@ -1362,9 +704,9 @@
return (ahc_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
0xb0, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_FULL_RESID", 0x02, 0x02 },
{ "SG_RESID_VALID", 0x04, 0x04 }
};
@@ -1375,9 +717,9 @@
return (ahc_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
0xb4, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
{ "DISCONNECTED", 0x04, 0x04 },
{ "ULTRAENB", 0x08, 0x08 },
{ "MK_MESSAGE", 0x10, 0x10 },
{ "TAG_ENB", 0x20, 0x20 },
@@ -1393,9 +735,9 @@
return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
0xb8, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
{ "TWIN_CHNLB", 0x80, 0x80 },
{ "OID", 0x0f, 0x0f },
{ "TWIN_TID", 0x70, 0x70 },
{ "TID", 0xf0, 0xf0 }
@@ -1407,9 +749,9 @@
return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
0xb9, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
{ "SCB_XFERLEN_ODD", 0x80, 0x80 },
{ "LID", 0x3f, 0x3f }
};
@@ -1461,221 +803,11 @@
return (ahc_print_register(NULL, 0, "SCB_64_SPARE",
0xc0, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = {
- { "DO_2840", 0x01, 0x01 },
- { "CK_2840", 0x02, 0x02 },
- { "CS_2840", 0x04, 0x04 }
-};
-
int
-ahc_seectl_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SEECTL_2840_parse_table, 3, "SEECTL_2840",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t STATUS_2840_parse_table[] = {
- { "DI_2840", 0x01, 0x01 },
- { "EEPROM_TF", 0x80, 0x80 },
- { "ADSEL", 0x1e, 0x1e },
- { "BIOS_SEL", 0x60, 0x60 }
-};
-
-int
-ahc_status_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(STATUS_2840_parse_table, 4, "STATUS_2840",
- 0xc1, regvalue, cur_col, wrap));
-}
-
-int
ahc_scb_64_btt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SCB_64_BTT",
0xd0, regvalue, cur_col, wrap));
-}
-
-int
-ahc_cchaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCHADDR",
- 0xe0, regvalue, cur_col, wrap));
-}
-
-int
-ahc_cchcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCHCNT",
- 0xe8, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSGRAM",
- 0xe9, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSGADDR",
- 0xea, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t CCSGCTL_parse_table[] = {
- { "CCSGRESET", 0x01, 0x01 },
- { "SG_FETCH_NEEDED", 0x02, 0x02 },
- { "CCSGEN", 0x08, 0x08 },
- { "CCSGDONE", 0x80, 0x80 }
-};
-
-int
-ahc_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CCSGCTL_parse_table, 4, "CCSGCTL",
- 0xeb, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSCBRAM",
- 0xec, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSCBADDR",
- 0xed, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = {
- { "CCSCBRESET", 0x01, 0x01 },
- { "CCSCBDIR", 0x04, 0x04 },
- { "CCSCBEN", 0x08, 0x08 },
- { "CCARREN", 0x10, 0x10 },
- { "ARRDONE", 0x40, 0x40 },
- { "CCSCBDONE", 0x80, 0x80 }
-};
-
-int
-ahc_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
- 0xee, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccscbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSCBCNT",
- 0xef, regvalue, cur_col, wrap));
-}
-
-int
-ahc_scbbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCBBADDR",
- 0xf0, regvalue, cur_col, wrap));
-}
-
-int
-ahc_ccscbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CCSCBPTR",
- 0xf1, regvalue, cur_col, wrap));
-}
-
-int
-ahc_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "HNSCB_QOFF",
- 0xf4, regvalue, cur_col, wrap));
-}
-
-int
-ahc_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SNSCB_QOFF",
- 0xf6, regvalue, cur_col, wrap));
-}
-
-int
-ahc_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SDSCB_QOFF",
- 0xf8, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
- { "SDSCB_ROLLOVER", 0x10, 0x10 },
- { "SNSCB_ROLLOVER", 0x20, 0x20 },
- { "SCB_AVAIL", 0x40, 0x40 },
- { "SCB_QSIZE_256", 0x06, 0x06 },
- { "SCB_QSIZE", 0x07, 0x07 }
-};
-
-int
-ahc_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(QOFF_CTLSTA_parse_table, 5, "QOFF_CTLSTA",
- 0xfa, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = {
- { "RD_DFTHRSH_MIN", 0x00, 0x00 },
- { "WR_DFTHRSH_MIN", 0x00, 0x00 },
- { "RD_DFTHRSH_25", 0x01, 0x01 },
- { "RD_DFTHRSH_50", 0x02, 0x02 },
- { "RD_DFTHRSH_63", 0x03, 0x03 },
- { "RD_DFTHRSH_75", 0x04, 0x04 },
- { "RD_DFTHRSH_85", 0x05, 0x05 },
- { "RD_DFTHRSH_90", 0x06, 0x06 },
- { "RD_DFTHRSH", 0x07, 0x07 },
- { "RD_DFTHRSH_MAX", 0x07, 0x07 },
- { "WR_DFTHRSH_25", 0x10, 0x10 },
- { "WR_DFTHRSH_50", 0x20, 0x20 },
- { "WR_DFTHRSH_63", 0x30, 0x30 },
- { "WR_DFTHRSH_75", 0x40, 0x40 },
- { "WR_DFTHRSH_85", 0x50, 0x50 },
- { "WR_DFTHRSH_90", 0x60, 0x60 },
- { "WR_DFTHRSH", 0x70, 0x70 },
- { "WR_DFTHRSH_MAX", 0x70, 0x70 }
-};
-
-int
-ahc_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
- 0xfb, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
- { "LAST_SEG_DONE", 0x01, 0x01 },
- { "LAST_SEG", 0x02, 0x02 },
- { "SG_ADDR_MASK", 0xf8, 0xf8 }
-};
-
-int
-ahc_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SG_CACHE_SHADOW_parse_table, 3, "SG_CACHE_SHADOW",
- 0xfc, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
- { "LAST_SEG_DONE", 0x01, 0x01 },
- { "LAST_SEG", 0x02, 0x02 },
- { "SG_ADDR_MASK", 0xf8, 0xf8 }
-};
-
-int
-ahc_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
- 0xfc, regvalue, cur_col, wrap));
}
--- scsi-misc-2.6-2008_04_15.pT/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped Thu Apr 24 07:47:54 2008
+++ scsi-misc-2.6-2008_04_15.pU/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped Fri Apr 25 02:37:17 2008
@@ -4,9 +4,9 @@
*
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
*/
-static uint8_t seqprog[] = {
+static const uint8_t seqprog[] = {
0xb2, 0x00, 0x00, 0x08,
0xf7, 0x11, 0x22, 0x08,
0x00, 0x65, 0xee, 0x59,
0xf7, 0x01, 0x02, 0x08,
@@ -1080,9 +1080,9 @@
{
return (0);
}
-static struct patch {
+static const struct patch {
ahc_patch_func_t *patch_func;
uint32_t begin :10,
skip_instr :10,
skip_patch :12;
@@ -1290,9 +1290,9 @@
{ ahc_patch13_func, 862, 3, 1 },
{ ahc_patch4_func, 865, 12, 1 }
};
-static struct cs {
+static const struct cs {
uint16_t begin;
uint16_t end;
} critical_sections[] = {
{ 11, 18 },
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/5] aic7xxx: deinline large or slow functions
2008-04-25 2:32 [PATCH 1/5] aic7xxx: deinline large or slow functions Denys Vlasenko
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
@ 2008-04-25 6:28 ` Hannes Reinecke
2008-04-27 13:41 ` James Bottomley
2 siblings, 0 replies; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-25 6:28 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: James Bottomley, linux-scsi, Andrew Morton
Hi Denys,
Denys Vlasenko wrote:
> Hi Hannes,
>
> I reworked my patches as you requested.
>
> The first one (in this mail) was ACKed by you, so it's just a resend.
>
> Following pathes were not ACKed and are modified.
> Please take a look.
>
>
>
> Deinlines and moves big functions from .h to .c files.
> Adds prototypes for ahc_lookup_scb and ahd_lookup_scb to .h files.
>
> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: Hannes Reinecke <hare@suse.de>
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/5] aic7xxx: add static
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
2008-04-25 2:36 ` [PATCH 3/5] aic7xxx: add const Denys Vlasenko
@ 2008-04-25 12:46 ` Hannes Reinecke
1 sibling, 0 replies; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-25 12:46 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: James Bottomley, linux-scsi, Andrew Morton
Hi Denys,
Denys Vlasenko wrote:
> This patch adds static (and sometimes const) keywords where appropriate.
>
> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Looks good.
Signed-off-by: Hannes Reinecke <hare@suse.de
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/5] aic7xxx: add const
2008-04-25 2:36 ` [PATCH 3/5] aic7xxx: add const Denys Vlasenko
2008-04-25 2:41 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Denys Vlasenko
@ 2008-04-25 12:47 ` Hannes Reinecke
1 sibling, 0 replies; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-25 12:47 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: James Bottomley, linux-scsi, Andrew Morton
Hi Denys,
Denys Vlasenko wrote:
> This patch adds more const keywords where appropriate.
>
> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Patch looks good.
Signed-off-by: Hannes Reinecke <hare@suse.de
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
--
To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-25 2:41 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Denys Vlasenko
2008-04-25 2:44 ` [PATCH 5/5] aic7xxx: update shipped files Denys Vlasenko
@ 2008-04-25 13:01 ` Hannes Reinecke
2008-04-26 0:42 ` Denys Vlasenko
2008-04-27 13:48 ` James Bottomley
1 sibling, 2 replies; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-25 13:01 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 1116 bytes --]
Hi Denys,
Denys Vlasenko wrote:
> Add "dont_generate_debug_code" syntax handling to aicasm_gram.y
>
> aic79xx.reg, aic7xxx.reg: add dont_generate_debug_code keyword
> for registers which are never referenced by the driver.
>
> aicasm.c, aicasm_symbol.[ch]: don't emit code for those regs;
> also add "const" keyword to generated code in few places.
>
> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
No.
Adding a symbol to each and every register definition
which has to be hand-crafted anyway is not the correct way.
I would prefer this: Add a 'count' variable to each symbol
which gets increased every time the symbol is referenced.
And then modify the register definition to include counts
for symbols which are referenced from the source code only
and not from the sequencer code.
This will give us an automatic usage count for the symbols
with only minimal hand-crafting.
James, please apply.
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
[-- Attachment #2: aic7xxx-aicasm-no-unused-symbols --]
[-- Type: text/plain, Size: 26743 bytes --]
diff --git a/drivers/scsi/aic7xxx/aic79xx.reg b/drivers/scsi/aic7xxx/aic79xx.reg
index 6ab514d..cca16fc 100644
--- a/drivers/scsi/aic7xxx/aic79xx.reg
+++ b/drivers/scsi/aic7xxx/aic79xx.reg
@@ -198,6 +198,7 @@ register SEQINTCODE {
register CLRINT {
address 0x003
access_mode WO
+ count 19
field CLRHWERRINT 0x80 /* Rev B or greater */
field CLRBRKADRINT 0x40
field CLRSWTMINT 0x20
@@ -245,6 +246,7 @@ register CLRERR {
register HCNTRL {
address 0x005
access_mode RW
+ count 12
field SEQ_RESET 0x80 /* Rev B or greater */
field POWRDN 0x40
field SWINT 0x10
@@ -262,6 +264,7 @@ register HNSCB_QOFF {
address 0x006
access_mode RW
size 2
+ count 2
}
/*
@@ -270,6 +273,7 @@ register HNSCB_QOFF {
register HESCB_QOFF {
address 0x008
access_mode RW
+ count 2
}
/*
@@ -287,6 +291,7 @@ register HS_MAILBOX {
*/
register SEQINTSTAT {
address 0x00C
+ count 1
access_mode RO
field SEQ_SWTMRTO 0x10
field SEQ_SEQINT 0x08
@@ -332,6 +337,7 @@ register SNSCB_QOFF {
*/
register SESCB_QOFF {
address 0x012
+ count 2
access_mode RW
modes M_CCHAN
}
@@ -397,6 +403,7 @@ register DFCNTRL {
address 0x019
access_mode RW
modes M_DFF0, M_DFF1
+ count 11
field PRELOADEN 0x80
field SCSIENWRDIS 0x40 /* Rev B only. */
field SCSIEN 0x20
@@ -415,6 +422,7 @@ register DFCNTRL {
*/
register DSCOMMAND0 {
address 0x019
+ count 1
access_mode RW
modes M_CFG
field CACHETHEN 0x80 /* Cache Threshold enable */
@@ -580,6 +588,7 @@ register DFF_THRSH {
address 0x088
access_mode RW
modes M_CFG
+ count 1
field WR_DFTHRSH 0x70 {
WR_DFTHRSH_MIN,
WR_DFTHRSH_25,
@@ -800,6 +809,7 @@ register PCIXCTL {
address 0x093
access_mode RW
modes M_CFG
+ count 1
field SERRPULSE 0x80
field UNEXPSCIEN 0x20
field SPLTSMADIS 0x10
@@ -844,6 +854,7 @@ register DCHSPLTSTAT0 {
address 0x096
access_mode RW
modes M_DFF0, M_DFF1
+ count 2
field STAETERM 0x80
field SCBCERR 0x40
field SCADERR 0x20
@@ -895,6 +906,7 @@ register DCHSPLTSTAT1 {
address 0x097
access_mode RW
modes M_DFF0, M_DFF1
+ count 2
field RXDATABUCKET 0x01
}
@@ -1048,6 +1060,7 @@ register SGSPLTSTAT0 {
address 0x09E
access_mode RW
modes M_DFF0, M_DFF1
+ count 2
field STAETERM 0x80
field SCBCERR 0x40
field SCADERR 0x20
@@ -1065,6 +1078,7 @@ register SGSPLTSTAT1 {
address 0x09F
access_mode RW
modes M_DFF0, M_DFF1
+ count 2
field RXDATABUCKET 0x01
}
@@ -1086,6 +1100,7 @@ register DF0PCISTAT {
address 0x0A0
access_mode RW
modes M_CFG
+ count 1
field DPE 0x80
field SSE 0x40
field RMA 0x20
@@ -1184,6 +1199,7 @@ register TARGPCISTAT {
address 0x0A7
access_mode RW
modes M_CFG
+ count 5
field DPE 0x80
field SSE 0x40
field STA 0x08
@@ -1198,6 +1214,7 @@ register LQIN {
address 0x020
access_mode RW
size 20
+ count 2
modes M_DFF0, M_DFF1, M_SCSI
}
@@ -1229,6 +1246,7 @@ register LUNPTR {
address 0x022
access_mode RW
modes M_CFG
+ count 2
}
/*
@@ -1259,6 +1277,7 @@ register CMDLENPTR {
address 0x025
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1270,6 +1289,7 @@ register ATTRPTR {
address 0x026
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1281,6 +1301,7 @@ register FLAGPTR {
address 0x027
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1291,6 +1312,7 @@ register CMDPTR {
address 0x028
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1301,6 +1323,7 @@ register QNEXTPTR {
address 0x029
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1323,6 +1346,7 @@ register ABRTBYTEPTR {
address 0x02B
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1333,6 +1357,7 @@ register ABRTBITPTR {
address 0x02C
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1370,6 +1395,7 @@ register LUNLEN {
address 0x030
access_mode RW
modes M_CFG
+ count 2
mask ILUNLEN 0x0F
mask TLUNLEN 0xF0
}
@@ -1383,6 +1409,7 @@ register CDBLIMIT {
address 0x031
access_mode RW
modes M_CFG
+ count 1
}
/*
@@ -1394,6 +1421,7 @@ register MAXCMD {
address 0x032
access_mode RW
modes M_CFG
+ count 9
}
/*
@@ -1458,6 +1486,7 @@ register LQCTL1 {
address 0x038
access_mode RW
modes M_DFF0, M_DFF1, M_SCSI
+ count 2
field PCI2PCI 0x04
field SINGLECMD 0x02
field ABORTPENDING 0x01
@@ -1470,6 +1499,7 @@ register LQCTL2 {
address 0x039
access_mode RW
modes M_DFF0, M_DFF1, M_SCSI
+ count 5
field LQIRETRY 0x80
field LQICONTINUE 0x40
field LQITOIDLE 0x20
@@ -1528,6 +1558,7 @@ register SCSISEQ1 {
address 0x03B
access_mode RW
modes M_DFF0, M_DFF1, M_SCSI
+ count 8
field MANUALCTL 0x40
field ENSELI 0x20
field ENRSELI 0x10
@@ -1667,6 +1698,9 @@ register SCSISIGO {
}
}
+/*
+ * SCSI Control Signal In
+ */
register SCSISIGI {
address 0x041
access_mode RO
@@ -1703,6 +1737,7 @@ register MULTARGID {
access_mode RW
modes M_CFG
size 2
+ count 2
}
/*
@@ -1758,6 +1793,7 @@ register TARGIDIN {
address 0x048
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 2
field CLKOUT 0x80
field TARGID 0x0F
}
@@ -1798,6 +1834,7 @@ register OPTIONMODE {
address 0x04A
access_mode RW
modes M_CFG
+ count 4
field BIOSCANCTL 0x80
field AUTOACKEN 0x40
field BIASCANCTL 0x20
@@ -1850,6 +1887,7 @@ register SIMODE0 {
address 0x04B
access_mode RW
modes M_CFG
+ count 8
field ENSELDO 0x40
field ENSELDI 0x20
field ENSELINGO 0x10
@@ -1945,6 +1983,7 @@ register PERRDIAG {
address 0x04E
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 3
field HIZERO 0x80
field HIPERR 0x40
field PREVPHASE 0x20
@@ -1962,6 +2001,7 @@ register LQISTATE {
address 0x04E
access_mode RO
modes M_CFG
+ count 6
}
/*
@@ -1971,6 +2011,7 @@ register SOFFCNT {
address 0x04F
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 1
}
/*
@@ -1980,6 +2021,7 @@ register LQOSTATE {
address 0x04F
access_mode RO
modes M_CFG
+ count 2
}
/*
@@ -1989,6 +2031,7 @@ register LQISTAT0 {
address 0x050
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 2
field LQIATNQAS 0x20
field LQICRCT1 0x10
field LQICRCT2 0x08
@@ -2004,6 +2047,7 @@ register CLRLQIINT0 {
address 0x050
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
+ count 1
field CLRLQIATNQAS 0x20
field CLRLQICRCT1 0x10
field CLRLQICRCT2 0x08
@@ -2019,6 +2063,7 @@ register LQIMODE0 {
address 0x050
access_mode RW
modes M_CFG
+ count 3
field ENLQIATNQASK 0x20
field ENLQICRCT1 0x10
field ENLQICRCT2 0x08
@@ -2034,6 +2079,7 @@ register LQISTAT1 {
address 0x051
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 3
field LQIPHASE_LQ 0x80
field LQIPHASE_NLQ 0x40
field LQIABORT 0x20
@@ -2051,6 +2097,7 @@ register CLRLQIINT1 {
address 0x051
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
+ count 4
field CLRLQIPHASE_LQ 0x80
field CLRLQIPHASE_NLQ 0x40
field CLRLIQABORT 0x20
@@ -2068,6 +2115,7 @@ register LQIMODE1 {
address 0x051
access_mode RW
modes M_CFG
+ count 4
field ENLQIPHASE_LQ 0x80 /* LQIPHASE1 */
field ENLQIPHASE_NLQ 0x40 /* LQIPHASE2 */
field ENLIQABORT 0x20
@@ -2102,6 +2150,7 @@ register SSTAT3 {
address 0x053
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 3
field NTRAMPERR 0x02
field OSRAMPERR 0x01
}
@@ -2113,6 +2162,7 @@ register CLRSINT3 {
address 0x053
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
+ count 3
field CLRNTRAMPERR 0x02
field CLROSRAMPERR 0x01
}
@@ -2124,6 +2174,7 @@ register SIMODE3 {
address 0x053
access_mode RW
modes M_CFG
+ count 4
field ENNTRAMPERR 0x02
field ENOSRAMPERR 0x01
}
@@ -2135,6 +2186,7 @@ register LQOSTAT0 {
address 0x054
access_mode RO
modes M_DFF0, M_DFF1, M_SCSI
+ count 2
field LQOTARGSCBPERR 0x10
field LQOSTOPT2 0x08
field LQOATNLQ 0x04
@@ -2149,6 +2201,7 @@ register CLRLQOINT0 {
address 0x054
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
+ count 3
field CLRLQOTARGSCBPERR 0x10
field CLRLQOSTOPT2 0x08
field CLRLQOATNLQ 0x04
@@ -2163,6 +2216,7 @@ register LQOMODE0 {
address 0x054
access_mode RW
modes M_CFG
+ count 4
field ENLQOTARGSCBPERR 0x10
field ENLQOSTOPT2 0x08
field ENLQOATNLQ 0x04
@@ -2191,6 +2245,7 @@ register CLRLQOINT1 {
address 0x055
access_mode WO
modes M_DFF0, M_DFF1, M_SCSI
+ count 7
field CLRLQOINITSCBPERR 0x10
field CLRLQOSTOPI2 0x08
field CLRLQOBADQAS 0x04
@@ -2205,6 +2260,7 @@ register LQOMODE1 {
address 0x055
access_mode RW
modes M_CFG
+ count 4
field ENLQOINITSCBPERR 0x10
field ENLQOSTOPI2 0x08
field ENLQOBADQAS 0x04
@@ -2232,6 +2288,7 @@ register OS_SPACE_CNT {
address 0x056
access_mode RO
modes M_CFG
+ count 2
}
/*
@@ -2286,13 +2343,19 @@ register NEXTSCB {
modes M_SCSI
}
-/* Rev B only. */
+/*
+ * LQO SCSI Control
+ * (Rev B only.)
+ */
register LQOSCSCTL {
address 0x05A
access_mode RW
size 1
modes M_CFG
+ count 1
field LQOH2A_VERSION 0x80
+ field LQOBUSETDLY 0x40
+ field LQONOHOLDLACK 0x02
field LQONOCHKOVER 0x01
}
@@ -2459,6 +2522,7 @@ register NEGPERIOD {
address 0x061
access_mode RW
modes M_SCSI
+ count 1
}
/*
@@ -2478,6 +2542,7 @@ register NEGOFFSET {
address 0x062
access_mode RW
modes M_SCSI
+ count 1
}
/*
@@ -2487,6 +2552,7 @@ register NEGPPROPTS {
address 0x063
access_mode RW
modes M_SCSI
+ count 1
field PPROPT_PACE 0x08
field PPROPT_QAS 0x04
field PPROPT_DT 0x02
@@ -2516,12 +2582,19 @@ register ANNEXCOL {
address 0x065
access_mode RW
modes M_SCSI
+ count 7
}
+/*
+ * SCSI Check
+ * (Rev. B only)
+ */
register SCSCHKN {
address 0x066
access_mode RW
modes M_CFG
+ count 1
+ field BIDICHKDIS 0x80
field STSELSKIDDIS 0x40
field CURRFIFODEF 0x20
field WIDERESEN 0x10
@@ -2561,6 +2634,7 @@ register ANNEXDAT {
address 0x066
access_mode RW
modes M_SCSI
+ count 3
}
/*
@@ -2596,6 +2670,7 @@ register TOWNID {
address 0x069
access_mode RW
modes M_SCSI
+ count 2
}
/*
@@ -2737,6 +2812,7 @@ register SCBAUTOPTR {
address 0x0AB
access_mode RW
modes M_CFG
+ count 1
field AUSCBPTR_EN 0x80
field SCBPTR_ADDR 0x38
field SCBPTR_OFF 0x07
@@ -2881,6 +2957,7 @@ register BRDDAT {
address 0x0B8
access_mode RW
modes M_SCSI
+ count 2
}
/*
@@ -2890,6 +2967,7 @@ register BRDCTL {
address 0x0B9
access_mode RW
modes M_SCSI
+ count 7
field FLXARBACK 0x80
field FLXARBREQ 0x40
field BRDADDR 0x38
@@ -2905,6 +2983,7 @@ register SEEADR {
address 0x0BA
access_mode RW
modes M_SCSI
+ count 4
}
/*
@@ -2915,6 +2994,7 @@ register SEEDAT {
access_mode RW
size 2
modes M_SCSI
+ count 4
}
/*
@@ -2924,6 +3004,7 @@ register SEESTAT {
address 0x0BE
access_mode RO
modes M_SCSI
+ count 1
field INIT_DONE 0x80
field SEEOPCODE 0x70
field LDALTID_L 0x08
@@ -2939,6 +3020,7 @@ register SEECTL {
address 0x0BE
access_mode RW
modes M_SCSI
+ count 4
field SEEOPCODE 0x70 {
SEEOP_ERASE 0x70,
SEEOP_READ 0x60,
@@ -3000,6 +3082,7 @@ register DSPDATACTL {
address 0x0C1
access_mode RW
modes M_CFG
+ count 3
field BYPASSENAB 0x80
field DESQDIS 0x10
field RCVROFFSTDIS 0x04
@@ -3058,6 +3141,7 @@ register DSPSELECT {
address 0x0C4
access_mode RW
modes M_CFG
+ count 1
field AUTOINCEN 0x80
field DSPSEL 0x1F
}
@@ -3071,6 +3155,7 @@ register WRTBIASCTL {
address 0x0C5
access_mode WO
modes M_CFG
+ count 3
field AUTOXBCDIS 0x80
field XMITMANVAL 0x3F
}
@@ -3196,7 +3281,8 @@ register OVLYADDR {
*/
register SEQCTL0 {
address 0x0D6
- access_mode RW
+ access_mode RW
+ count 11
field PERRORDIS 0x80
field PAUSEDIS 0x40
field FAILDIS 0x20
@@ -3226,7 +3312,8 @@ register SEQCTL1 {
*/
register FLAGS {
address 0x0D8
- access_mode RO
+ access_mode RO
+ count 23
field ZERO 0x02
field CARRY 0x01
}
@@ -3255,7 +3342,8 @@ register SEQINTCTL {
*/
register SEQRAM {
address 0x0DA
- access_mode RW
+ access_mode RW
+ count 2
}
/*
@@ -3266,6 +3354,7 @@ register PRGMCNT {
address 0x0DE
access_mode RW
size 2
+ count 5
}
/*
@@ -3273,7 +3362,7 @@ register PRGMCNT {
*/
register ACCUM {
address 0x0E0
- access_mode RW
+ access_mode RW
accumulator
}
@@ -3401,6 +3490,7 @@ register INTVEC1_ADDR {
access_mode RW
size 2
modes M_CFG
+ count 1
}
/*
@@ -3412,6 +3502,7 @@ register CURADDR {
access_mode RW
size 2
modes M_SCSI
+ count 2
}
/*
@@ -3423,6 +3514,7 @@ register INTVEC2_ADDR {
access_mode RW
size 2
modes M_CFG
+ count 1
}
/*
@@ -3579,6 +3671,7 @@ scratch_ram {
/* Parameters for DMA Logic */
DMAPARAMS {
size 1
+ count 8
field PRELOADEN 0x80
field WIDEODD 0x40
field SCSIEN 0x20
@@ -3648,9 +3741,11 @@ scratch_ram {
*/
KERNEL_TQINPOS {
size 1
+ count 1
}
TQINPOS {
size 1
+ count 8
}
/*
* Base address of our shared data with the kernel driver in host
@@ -3681,6 +3776,7 @@ scratch_ram {
}
ARG_2 {
size 1
+ count 1
alias RETURN_2
}
@@ -3698,6 +3794,7 @@ scratch_ram {
*/
SCSISEQ_TEMPLATE {
size 1
+ count 7
field MANUALCTL 0x40
field ENSELI 0x20
field ENRSELI 0x10
@@ -3711,6 +3808,7 @@ scratch_ram {
*/
INITIATOR_TAG {
size 1
+ count 1
}
SEQ_FLAGS2 {
@@ -3777,6 +3875,7 @@ scratch_ram {
*/
CMDSIZE_TABLE {
size 8
+ count 8
}
/*
* When an SCB with the MK_MESSAGE flag is
@@ -3803,8 +3902,8 @@ scratch_ram {
/************************* Hardware SCB Definition ****************************/
scb {
address 0x180
- size 64
- modes 0, 1, 2, 3
+ size 64
+ modes 0, 1, 2, 3
SCB_RESIDUAL_DATACNT {
size 4
alias SCB_CDB_STORE
diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg
index 2a10353..0d2f763 100644
--- a/drivers/scsi/aic7xxx/aic7xxx.reg
+++ b/drivers/scsi/aic7xxx/aic7xxx.reg
@@ -238,6 +238,7 @@ register SXFRCTL2 {
register OPTIONMODE {
address 0x008
access_mode RW
+ count 2
field AUTORATEEN 0x80
field AUTOACKEN 0x40
field ATNMGMNTEN 0x20
@@ -254,6 +255,7 @@ register TARGCRCCNT {
address 0x00a
size 2
access_mode RW
+ count 2
}
/*
@@ -344,6 +346,7 @@ register SSTAT2 {
register SSTAT3 {
address 0x00e
access_mode RO
+ count 2
mask SCSICNT 0xf0
mask OFFCNT 0x0f
mask U2OFFCNT 0x7f
@@ -367,6 +370,7 @@ register SCSIID_ULTRA2 {
register SIMODE0 {
address 0x010
access_mode RW
+ count 2
field ENSELDO 0x40
field ENSELDI 0x20
field ENSELINGO 0x10
@@ -429,6 +433,7 @@ register SHADDR {
register SELTIMER {
address 0x018
access_mode RW
+ count 1
field STAGE6 0x20
field STAGE5 0x10
field STAGE4 0x08
@@ -467,6 +472,7 @@ register TARGID {
address 0x01b
size 2
access_mode RW
+ count 14
}
/*
@@ -480,6 +486,7 @@ register TARGID {
register SPIOCAP {
address 0x01b
access_mode RW
+ count 10
field SOFT1 0x80
field SOFT0 0x40
field SOFTCMDEN 0x20
@@ -492,6 +499,7 @@ register SPIOCAP {
register BRDCTL {
address 0x01d
+ count 11
field BRDDAT7 0x80
field BRDDAT6 0x40
field BRDDAT5 0x20
@@ -534,6 +542,7 @@ register BRDCTL {
*/
register SEECTL {
address 0x01e
+ count 11
field EXTARBACK 0x80
field EXTARBREQ 0x40
field SEEMS 0x20
@@ -570,6 +579,7 @@ register SBLKCTL {
register SEQCTL {
address 0x060
access_mode RW
+ count 15
field PERRORDIS 0x80
field PAUSEDIS 0x40
field FAILDIS 0x20
@@ -590,6 +600,7 @@ register SEQCTL {
register SEQRAM {
address 0x061
access_mode RW
+ count 2
}
/*
@@ -604,6 +615,7 @@ register SEQADDR0 {
register SEQADDR1 {
address 0x063
access_mode RW
+ count 8
mask SEQADDR1_MASK 0x01
}
@@ -649,6 +661,7 @@ register NONE {
register FLAGS {
address 0x06b
access_mode RO
+ count 18
field ZERO 0x02
field CARRY 0x01
}
@@ -671,6 +684,7 @@ register FUNCTION1 {
register STACK {
address 0x06f
access_mode RO
+ count 5
}
const STACK_SIZE 4
@@ -692,6 +706,7 @@ register BCTL {
register DSCOMMAND0 {
address 0x084
access_mode RW
+ count 7
field CACHETHEN 0x80 /* Cache Threshold enable */
field DPARCKEN 0x40 /* Data Parity Check Enable */
field MPARCKEN 0x20 /* Memory Parity Check Enable */
@@ -717,6 +732,7 @@ register DSCOMMAND1 {
register BUSTIME {
address 0x085
access_mode RW
+ count 2
mask BOFF 0xf0
mask BON 0x0f
}
@@ -727,6 +743,7 @@ register BUSTIME {
register BUSSPD {
address 0x086
access_mode RW
+ count 2
mask DFTHRSH 0xc0
mask STBOFF 0x38
mask STBON 0x07
@@ -737,6 +754,7 @@ register BUSSPD {
/* aic7850/55/60/70/80/95 only */
register DSPCISTATUS {
address 0x086
+ count 4
mask DFTHRSH_100 0xc0
}
@@ -758,6 +776,7 @@ const SEQ_MAILBOX_SHIFT 0
register HCNTRL {
address 0x087
access_mode RW
+ count 14
field POWRDN 0x40
field SWINT 0x10
field IRQMS 0x08
@@ -869,6 +888,7 @@ register INTSTAT {
register ERROR {
address 0x092
access_mode RO
+ count 26
field CIOPARERR 0x80 /* Ultra2 only */
field PCIERRSTAT 0x40 /* PCI only */
field MPARERR 0x20 /* PCI only */
@@ -885,6 +905,7 @@ register ERROR {
register CLRINT {
address 0x092
access_mode WO
+ count 24
field CLRPARERR 0x10 /* PCI only */
field CLRBRKADRINT 0x08
field CLRSCSIINT 0x04
@@ -943,6 +964,7 @@ register DFDAT {
register SCBCNT {
address 0x09a
access_mode RW
+ count 1
field SCBAUTO 0x80
mask SCBCNT_MASK 0x1f
}
@@ -954,6 +976,7 @@ register SCBCNT {
register QINFIFO {
address 0x09b
access_mode RW
+ count 12
}
/*
@@ -972,11 +995,13 @@ register QINCNT {
register QOUTFIFO {
address 0x09d
access_mode WO
+ count 7
}
register CRCCONTROL1 {
address 0x09d
access_mode RW
+ count 3
field CRCONSEEN 0x80
field CRCVALCHKEN 0x40
field CRCENDCHKEN 0x20
@@ -1013,6 +1038,7 @@ register SCSIPHASE {
register SFUNCT {
address 0x09f
access_mode RW
+ count 4
field ALT_MODE 0x80
}
@@ -1095,6 +1121,7 @@ scb {
}
SCB_SCSIOFFSET {
size 1
+ count 1
}
SCB_NEXT {
size 1
@@ -1118,6 +1145,7 @@ const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
register SEECTL_2840 {
address 0x0c0
access_mode RW
+ count 2
field CS_2840 0x04
field CK_2840 0x02
field DO_2840 0x01
@@ -1126,6 +1154,7 @@ register SEECTL_2840 {
register STATUS_2840 {
address 0x0c1
access_mode RW
+ count 4
field EEPROM_TF 0x80
mask BIOS_SEL 0x60
mask ADSEL 0x1e
@@ -1161,6 +1190,7 @@ register CCSGCTL {
register CCSCBCNT {
address 0xEF
+ count 1
}
register CCSCBCTL {
@@ -1187,6 +1217,7 @@ register CCSCBRAM {
register SCBBADDR {
address 0x0F0
access_mode RW
+ count 3
}
register CCSCBPTR {
@@ -1195,6 +1226,7 @@ register CCSCBPTR {
register HNSCB_QOFF {
address 0x0F4
+ count 4
}
register SNSCB_QOFF {
@@ -1234,6 +1266,7 @@ register DFF_THRSH {
mask WR_DFTHRSH_85 0x50
mask WR_DFTHRSH_90 0x60
mask WR_DFTHRSH_MAX 0x70
+ count 4
}
register SG_CACHE_PRE {
@@ -1287,6 +1320,7 @@ scratch_ram {
ULTRA_ENB {
alias CMDSIZE_TABLE
size 2
+ count 2
}
/*
* Bit vector of targets that have disconnection disabled as set by
@@ -1296,6 +1330,7 @@ scratch_ram {
*/
DISC_DSB {
size 2
+ count 6
}
CMDSIZE_TABLE_TAIL {
size 4
@@ -1323,6 +1358,7 @@ scratch_ram {
/* Parameters for DMA Logic */
DMAPARAMS {
size 1
+ count 12
field PRELOADEN 0x80
field WIDEODD 0x40
field SCSIEN 0x20
@@ -1441,6 +1477,7 @@ scratch_ram {
}
ARG_1 {
size 1
+ count 1
mask SEND_MSG 0x80
mask SEND_SENSE 0x40
mask SEND_REJ 0x20
@@ -1495,6 +1532,7 @@ scratch_ram {
size 1
field HA_274_EXTENDED_TRANS 0x01
alias INITIATOR_TAG
+ count 1
}
SEQ_FLAGS2 {
@@ -1518,6 +1556,7 @@ scratch_ram {
*/
SCSICONF {
size 1
+ count 12
field TERM_ENB 0x80
field RESET_SCSI 0x40
field ENSPCHK 0x20
@@ -1527,16 +1566,19 @@ scratch_ram {
INTDEF {
address 0x05c
size 1
+ count 1
field EDGE_TRIG 0x80
mask VECTOR 0x0f
}
HOSTCONF {
address 0x05d
size 1
+ count 1
}
HA_274_BIOSCTRL {
address 0x05f
size 1
+ count 1
mask BIOSMODE 0x30
mask BIOSDISABLED 0x30
field CHANNEL_B_PRIMARY 0x08
@@ -1552,6 +1594,7 @@ scratch_ram {
*/
TARG_OFFSET {
size 16
+ count 1
}
}
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm.c b/drivers/scsi/aic7xxx/aicasm/aicasm.c
index 9241027..e4a7787 100644
--- a/drivers/scsi/aic7xxx/aicasm/aicasm.c
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm.c
@@ -362,7 +362,7 @@ output_code()
" *\n"
"%s */\n", versions);
- fprintf(ofile, "static uint8_t seqprog[] = {\n");
+ fprintf(ofile, "static const uint8_t seqprog[] = {\n");
for (cur_instr = STAILQ_FIRST(&seq_program);
cur_instr != NULL;
cur_instr = STAILQ_NEXT(cur_instr, links)) {
@@ -415,7 +415,7 @@ output_code()
}
fprintf(ofile,
-"static struct patch {\n"
+"static const struct patch {\n"
" %spatch_func_t *patch_func;\n"
" uint32_t begin :10,\n"
" skip_instr :10,\n"
@@ -435,7 +435,7 @@ output_code()
fprintf(ofile, "\n};\n\n");
fprintf(ofile,
-"static struct cs {\n"
+"static const struct cs {\n"
" uint16_t begin;\n"
" uint16_t end;\n"
"} critical_sections[] = {\n");
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y b/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y
index e1079dd..81be6a2 100644
--- a/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm_gram.y
@@ -143,6 +143,8 @@ void yyerror(const char *string);
%token <value> T_ADDRESS
+%token T_COUNT
+
%token T_ACCESS_MODE
%token T_MODES
@@ -353,6 +355,7 @@ reg_attribute_list:
reg_attribute:
reg_address
| size
+| count
| access_mode
| modes
| field_defn
@@ -393,6 +396,13 @@ size:
}
;
+count:
+ T_COUNT T_NUMBER
+ {
+ cur_symbol->count += $2;
+ }
+;
+
access_mode:
T_ACCESS_MODE T_MODE
{
@@ -801,6 +811,7 @@ scratch_ram:
cur_symtype = SRAMLOC;
cur_symbol->type = SRAMLOC;
initialize_symbol(cur_symbol);
+ cur_symbol->count += 1;
}
reg_address
{
@@ -832,6 +843,7 @@ scb:
initialize_symbol(cur_symbol);
/* 64 bytes of SCB space */
cur_symbol->info.rinfo->size = 64;
+ cur_symbol->count += 1;
}
reg_address
{
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h b/drivers/scsi/aic7xxx/aicasm/aicasm_insformat.h
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l b/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l
index 62b6c1b..2c7f02d 100644
--- a/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm_scan.l
@@ -162,6 +162,7 @@ register { return T_REGISTER; }
const { yylval.value = FALSE; return T_CONST; }
download { return T_DOWNLOAD; }
address { return T_ADDRESS; }
+count { return T_COUNT; }
access_mode { return T_ACCESS_MODE; }
modes { return T_MODES; }
RW|RO|WO {
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c b/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c
index f1f448d..fcd3578 100644
--- a/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.c
@@ -77,6 +77,7 @@ symbol_create(char *name)
if (new_symbol->name == NULL)
stop("Unable to strdup symbol name", EX_SOFTWARE);
new_symbol->type = UNINITIALIZED;
+ new_symbol->count = 1;
return (new_symbol);
}
@@ -198,6 +199,12 @@ symtable_get(char *name)
}
}
memcpy(&stored_ptr, data.data, sizeof(stored_ptr));
+ stored_ptr->count++;
+ data.data = &stored_ptr;
+ if (symtable->put(symtable, &key, &data, /*flags*/0) !=0) {
+ perror("Symtable put failed");
+ exit(EX_SOFTWARE);
+ }
return (stored_ptr);
}
@@ -256,7 +263,7 @@ symlist_add(symlist_t *symlist, symbol_t *symbol, int how)
&& (curnode->symbol->info.finfo->value >
newnode->symbol->info.finfo->value))))
|| (!field && (curnode->symbol->info.rinfo->address >
- newnode->symbol->info.rinfo->address))) {
+ newnode->symbol->info.rinfo->address))) {
SLIST_INSERT_HEAD(symlist, newnode, links);
return;
}
@@ -271,7 +278,7 @@ symlist_add(symlist_t *symlist, symbol_t *symbol, int how)
cursymbol = SLIST_NEXT(curnode, links)->symbol;
if ((field
- && (cursymbol->type > symbol->type
+ && (cursymbol->type > symbol->type
|| (cursymbol->type == symbol->type
&& (cursymbol->info.finfo->value >
symbol->info.finfo->value))))
@@ -351,7 +358,7 @@ aic_print_reg_dump_types(FILE *ofile)
{
if (ofile == NULL)
return;
-
+
fprintf(ofile,
"typedef int (%sreg_print_t)(u_int, u_int *, u_int);\n"
"typedef struct %sreg_parse_entry {\n"
@@ -370,7 +377,7 @@ aic_print_reg_dump_start(FILE *dfile, symbol_node_t *regnode)
return;
fprintf(dfile,
-"static %sreg_parse_entry_t %s_parse_table[] = {\n",
+"static const %sreg_parse_entry_t %s_parse_table[] = {\n",
prefix,
regnode->symbol->name);
}
@@ -385,7 +392,7 @@ aic_print_reg_dump_end(FILE *ofile, FILE *dfile,
lower_name = strdup(regnode->symbol->name);
if (lower_name == NULL)
stop("Unable to strdup symbol name", EX_SOFTWARE);
-
+
for (letter = lower_name; *letter != '\0'; letter++)
*letter = tolower(*letter);
@@ -472,6 +479,7 @@ symtable_dump(FILE *ofile, FILE *dfile)
DBT key;
DBT data;
int flag;
+ int reg_count = 0, reg_used = 0;
u_int i;
if (symtable == NULL)
@@ -541,6 +549,9 @@ symtable_dump(FILE *ofile, FILE *dfile)
int num_entries;
num_entries = 0;
+ reg_count++;
+ if (curnode->symbol->count == 1)
+ break;
fields = &curnode->symbol->info.rinfo->fields;
SLIST_FOREACH(fieldnode, fields, links) {
if (num_entries == 0)
@@ -553,11 +564,14 @@ symtable_dump(FILE *ofile, FILE *dfile)
}
aic_print_reg_dump_end(ofile, dfile,
curnode, num_entries);
+ reg_used++;
}
default:
break;
}
}
+ fprintf(stderr, "%s: %d of %d register definitions used\n", appname,
+ reg_used, reg_count);
/* Fold in the masks and bits */
while (SLIST_FIRST(&masks) != NULL) {
@@ -646,7 +660,6 @@ symtable_dump(FILE *ofile, FILE *dfile)
free(curnode);
}
-
fprintf(ofile, "\n\n/* Downloaded Constant Definitions */\n");
for (i = 0; SLIST_FIRST(&download_constants) != NULL; i++) {
diff --git a/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h b/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h
index afc22e8..05190c1 100644
--- a/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h
+++ b/drivers/scsi/aic7xxx/aicasm/aicasm_symbol.h
@@ -128,6 +128,7 @@ typedef struct expression_info {
typedef struct symbol {
char *name;
symtype type;
+ int count;
union {
struct reg_info *rinfo;
struct field_info *finfo;
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 5/5] aic7xxx: update shipped files
2008-04-25 2:44 ` [PATCH 5/5] aic7xxx: update shipped files Denys Vlasenko
@ 2008-04-25 13:03 ` Hannes Reinecke
0 siblings, 0 replies; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-25 13:03 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: James Bottomley, linux-scsi, Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 512 bytes --]
Hi Denys,
Denys Vlasenko wrote:
> After previous patch shipped files are out of sync.
>
> This patch updates them.
>
> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
See my previous mail.
No, don't do it like this.
I've attached the updated files based on my modified patch.
James, please apply.
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
[-- Attachment #2: aic7xxx-update-shipped-files --]
[-- Type: text/plain, Size: 159518 bytes --]
commit 883bcfc7b6023df01499f5811dcb39175120e7d3
Author: Hannes Reinecke <hare@suse.de>
Date: Fri Apr 25 14:45:01 2008 +0200
aic7xxx: Update _shipped files
Update the precompiled sequencer code to match the latest
aicasm changes.
Signed-off-by: Hannes Reinecke <hare@suse.de>
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
index 2068e00..c21ceab 100644
--- a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
@@ -48,13 +48,6 @@ ahd_reg_print_t ahd_error_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrerr_print;
-#else
-#define ahd_clrerr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRERR", 0x04, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hcntrl_print;
#else
#define ahd_hcntrl_print(regvalue, cur_col, wrap) \
@@ -167,13 +160,6 @@ ahd_reg_print_t ahd_sg_cache_shadow_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_arbctl_print;
-#else
-#define ahd_arbctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ARBCTL", 0x1b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sg_cache_pre_print;
#else
#define ahd_sg_cache_pre_print(regvalue, cur_col, wrap) \
@@ -188,20 +174,6 @@ ahd_reg_print_t ahd_lqin_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_typeptr_print;
-#else
-#define ahd_typeptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TYPEPTR", 0x20, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_tagptr_print;
-#else
-#define ahd_tagptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "TAGPTR", 0x21, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lunptr_print;
#else
#define ahd_lunptr_print(regvalue, cur_col, wrap) \
@@ -209,20 +181,6 @@ ahd_reg_print_t ahd_lunptr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_datalenptr_print;
-#else
-#define ahd_datalenptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DATALENPTR", 0x23, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_statlenptr_print;
-#else
-#define ahd_statlenptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "STATLENPTR", 0x24, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmdlenptr_print;
#else
#define ahd_cmdlenptr_print(regvalue, cur_col, wrap) \
@@ -258,13 +216,6 @@ ahd_reg_print_t ahd_qnextptr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_idptr_print;
-#else
-#define ahd_idptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "IDPTR", 0x2a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_abrtbyteptr_print;
#else
#define ahd_abrtbyteptr_print(regvalue, cur_col, wrap) \
@@ -279,27 +230,6 @@ ahd_reg_print_t ahd_abrtbitptr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmdbytes_print;
-#else
-#define ahd_maxcmdbytes_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMDBYTES", 0x2d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_maxcmd2rcv_print;
-#else
-#define ahd_maxcmd2rcv_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MAXCMD2RCV", 0x2e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_shortthresh_print;
-#else
-#define ahd_shortthresh_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SHORTTHRESH", 0x2f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lunlen_print;
#else
#define ahd_lunlen_print(regvalue, cur_col, wrap) \
@@ -328,41 +258,6 @@ ahd_reg_print_t ahd_maxcmdcnt_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd01_print;
-#else
-#define ahd_lqrsvd01_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD01", 0x34, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd16_print;
-#else
-#define ahd_lqrsvd16_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD16", 0x35, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqrsvd17_print;
-#else
-#define ahd_lqrsvd17_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQRSVD17", 0x36, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmdrsvd0_print;
-#else
-#define ahd_cmdrsvd0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMDRSVD0", 0x37, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqctl0_print;
-#else
-#define ahd_lqctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQCTL0", 0x38, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqctl1_print;
#else
#define ahd_lqctl1_print(regvalue, cur_col, wrap) \
@@ -370,13 +265,6 @@ ahd_reg_print_t ahd_lqctl1_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsbist0_print;
-#else
-#define ahd_scsbist0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSBIST0", 0x39, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqctl2_print;
#else
#define ahd_lqctl2_print(regvalue, cur_col, wrap) \
@@ -384,13 +272,6 @@ ahd_reg_print_t ahd_lqctl2_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsbist1_print;
-#else
-#define ahd_scsbist1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSBIST1", 0x3a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsiseq0_print;
#else
#define ahd_scsiseq0_print(regvalue, cur_col, wrap) \
@@ -412,20 +293,6 @@ ahd_reg_print_t ahd_sxfrctl0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dlcount_print;
-#else
-#define ahd_dlcount_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DLCOUNT", 0x3c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_businitid_print;
-#else
-#define ahd_businitid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BUSINITID", 0x3c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sxfrctl1_print;
#else
#define ahd_sxfrctl1_print(regvalue, cur_col, wrap) \
@@ -433,20 +300,6 @@ ahd_reg_print_t ahd_sxfrctl1_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_bustargid_print;
-#else
-#define ahd_bustargid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BUSTARGID", 0x3e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sxfrctl2_print;
-#else
-#define ahd_sxfrctl2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SXFRCTL2", 0x3e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dffstat_print;
#else
#define ahd_dffstat_print(regvalue, cur_col, wrap) \
@@ -454,17 +307,17 @@ ahd_reg_print_t ahd_dffstat_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsisigo_print;
+ahd_reg_print_t ahd_multargid_print;
#else
-#define ahd_scsisigo_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap)
+#define ahd_multargid_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "MULTARGID", 0x40, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_multargid_print;
+ahd_reg_print_t ahd_scsisigo_print;
#else
-#define ahd_multargid_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MULTARGID", 0x40, regvalue, cur_col, wrap)
+#define ahd_scsisigo_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -482,13 +335,6 @@ ahd_reg_print_t ahd_scsiphase_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsidat0_img_print;
-#else
-#define ahd_scsidat0_img_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSIDAT0_IMG", 0x43, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsidat_print;
#else
#define ahd_scsidat_print(regvalue, cur_col, wrap) \
@@ -531,13 +377,6 @@ ahd_reg_print_t ahd_sblkctl_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint0_print;
-#else
-#define ahd_clrsint0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT0", 0x4b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat0_print;
#else
#define ahd_sstat0_print(regvalue, cur_col, wrap) \
@@ -552,10 +391,10 @@ ahd_reg_print_t ahd_simode0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint1_print;
+ahd_reg_print_t ahd_clrsint0_print;
#else
-#define ahd_clrsint1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRSINT1", 0x4c, regvalue, cur_col, wrap)
+#define ahd_clrsint0_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "CLRSINT0", 0x4b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -566,17 +405,17 @@ ahd_reg_print_t ahd_sstat1_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sstat2_print;
+ahd_reg_print_t ahd_clrsint1_print;
#else
-#define ahd_sstat2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap)
+#define ahd_clrsint1_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "CLRSINT1", 0x4c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_simode2_print;
+ahd_reg_print_t ahd_sstat2_print;
#else
-#define ahd_simode2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SIMODE2", 0x4d, regvalue, cur_col, wrap)
+#define ahd_sstat2_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -622,17 +461,17 @@ ahd_reg_print_t ahd_lqistat0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrlqiint0_print;
+ahd_reg_print_t ahd_lqimode0_print;
#else
-#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap)
+#define ahd_lqimode0_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqimode0_print;
+ahd_reg_print_t ahd_clrlqiint0_print;
#else
-#define ahd_lqimode0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap)
+#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -790,13 +629,6 @@ ahd_reg_print_t ahd_seqintsrc_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_currscb_print;
-#else
-#define ahd_currscb_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqimode_print;
#else
#define ahd_seqimode_print(regvalue, cur_col, wrap) \
@@ -804,24 +636,17 @@ ahd_reg_print_t ahd_seqimode_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_mdffstat_print;
-#else
-#define ahd_mdffstat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_crccontrol_print;
+ahd_reg_print_t ahd_currscb_print;
#else
-#define ahd_crccontrol_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CRCCONTROL", 0x5d, regvalue, cur_col, wrap)
+#define ahd_currscb_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfftag_print;
+ahd_reg_print_t ahd_mdffstat_print;
#else
-#define ahd_dfftag_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFFTAG", 0x5e, regvalue, cur_col, wrap)
+#define ahd_mdffstat_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -832,20 +657,6 @@ ahd_reg_print_t ahd_lastscb_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scsitest_print;
-#else
-#define ahd_scsitest_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCSITEST", 0x5e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_iopdnctl_print;
-#else
-#define ahd_iopdnctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "IOPDNCTL", 0x5f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_shaddr_print;
#else
#define ahd_shaddr_print(regvalue, cur_col, wrap) \
@@ -860,13 +671,6 @@ ahd_reg_print_t ahd_negoaddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dgrpcrci_print;
-#else
-#define ahd_dgrpcrci_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DGRPCRCI", 0x60, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negperiod_print;
#else
#define ahd_negperiod_print(regvalue, cur_col, wrap) \
@@ -874,13 +678,6 @@ ahd_reg_print_t ahd_negperiod_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_packcrci_print;
-#else
-#define ahd_packcrci_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PACKCRCI", 0x62, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negoffset_print;
#else
#define ahd_negoffset_print(regvalue, cur_col, wrap) \
@@ -930,13 +727,6 @@ ahd_reg_print_t ahd_iownid_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960ctl0_print;
-#else
-#define ahd_pll960ctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CTL0", 0x68, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_shcnt_print;
#else
#define ahd_shcnt_print(regvalue, cur_col, wrap) \
@@ -951,27 +741,6 @@ ahd_reg_print_t ahd_townid_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960ctl1_print;
-#else
-#define ahd_pll960ctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CTL1", 0x69, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll960cnt0_print;
-#else
-#define ahd_pll960cnt0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL960CNT0", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_xsig_print;
-#else
-#define ahd_xsig_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "XSIG", 0x6a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seloid_print;
#else
#define ahd_seloid_print(regvalue, cur_col, wrap) \
@@ -979,41 +748,6 @@ ahd_reg_print_t ahd_seloid_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400ctl0_print;
-#else
-#define ahd_pll400ctl0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CTL0", 0x6c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_fairness_print;
-#else
-#define ahd_fairness_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FAIRNESS", 0x6c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400ctl1_print;
-#else
-#define ahd_pll400ctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CTL1", 0x6d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_unfairness_print;
-#else
-#define ahd_unfairness_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "UNFAIRNESS", 0x6e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400cnt0_print;
-#else
-#define ahd_pll400cnt0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLL400CNT0", 0x6e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_haddr_print;
#else
#define ahd_haddr_print(regvalue, cur_col, wrap) \
@@ -1021,27 +755,6 @@ ahd_reg_print_t ahd_haddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_plldelay_print;
-#else
-#define ahd_plldelay_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "PLLDELAY", 0x70, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmaadr_print;
-#else
-#define ahd_hodmaadr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMAADR", 0x70, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmacnt_print;
-#else
-#define ahd_hodmacnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMACNT", 0x78, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hcnt_print;
#else
#define ahd_hcnt_print(regvalue, cur_col, wrap) \
@@ -1049,10 +762,10 @@ ahd_reg_print_t ahd_hcnt_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_hodmaen_print;
+ahd_reg_print_t ahd_sghaddr_print;
#else
-#define ahd_hodmaen_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "HODMAEN", 0x7a, regvalue, cur_col, wrap)
+#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -1063,10 +776,10 @@ ahd_reg_print_t ahd_scbhaddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghaddr_print;
+ahd_reg_print_t ahd_sghcnt_print;
#else
-#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
+#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -1077,13 +790,6 @@ ahd_reg_print_t ahd_scbhcnt_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghcnt_print;
-#else
-#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dff_thrsh_print;
#else
#define ahd_dff_thrsh_print(regvalue, cur_col, wrap) \
@@ -1091,132 +797,6 @@ ahd_reg_print_t ahd_dff_thrsh_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romaddr_print;
-#else
-#define ahd_romaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMADDR", 0x8a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romcntrl_print;
-#else
-#define ahd_romcntrl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMCNTRL", 0x8d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_romdata_print;
-#else
-#define ahd_romdata_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROMDATA", 0x8e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg0_print;
-#else
-#define ahd_cmcrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_roenable_print;
-#else
-#define ahd_roenable_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "ROENABLE", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg0_print;
-#else
-#define ahd_ovlyrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg0_print;
-#else
-#define ahd_dchrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG0", 0x90, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg1_print;
-#else
-#define ahd_ovlyrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_nsenable_print;
-#else
-#define ahd_nsenable_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "NSENABLE", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg1_print;
-#else
-#define ahd_cmcrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg1_print;
-#else
-#define ahd_dchrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg2_print;
-#else
-#define ahd_dchrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg2_print;
-#else
-#define ahd_cmcrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ost_print;
-#else
-#define ahd_ost_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OST", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg2_print;
-#else
-#define ahd_ovlyrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG2", 0x92, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg3_print;
-#else
-#define ahd_dchrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg3_print;
-#else
-#define ahd_ovlyrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcrxmsg3_print;
-#else
-#define ahd_cmcrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_pcixctl_print;
#else
#define ahd_pcixctl_print(regvalue, cur_col, wrap) \
@@ -1224,34 +804,6 @@ ahd_reg_print_t ahd_pcixctl_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyseqbcnt_print;
-#else
-#define ahd_ovlyseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchseqbcnt_print;
-#else
-#define ahd_dchseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DCHSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcseqbcnt_print;
-#else
-#define ahd_cmcseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcspltstat0_print;
-#else
-#define ahd_cmcspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dchspltstat0_print;
#else
#define ahd_dchspltstat0_print(regvalue, cur_col, wrap) \
@@ -1259,27 +811,6 @@ ahd_reg_print_t ahd_dchspltstat0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyspltstat0_print;
-#else
-#define ahd_ovlyspltstat0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcspltstat1_print;
-#else
-#define ahd_cmcspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyspltstat1_print;
-#else
-#define ahd_ovlyspltstat1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dchspltstat1_print;
#else
#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \
@@ -1287,90 +818,6 @@ ahd_reg_print_t ahd_dchspltstat1_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg0_print;
-#else
-#define ahd_sgrxmsg0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG0", 0x98, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr0_print;
-#else
-#define ahd_slvspltoutadr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR0", 0x98, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg1_print;
-#else
-#define ahd_sgrxmsg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG1", 0x99, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr1_print;
-#else
-#define ahd_slvspltoutadr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR1", 0x99, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg2_print;
-#else
-#define ahd_sgrxmsg2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG2", 0x9a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr2_print;
-#else
-#define ahd_slvspltoutadr2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR2", 0x9a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgrxmsg3_print;
-#else
-#define ahd_sgrxmsg3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGRXMSG3", 0x9b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutadr3_print;
-#else
-#define ahd_slvspltoutadr3_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTADR3", 0x9b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgseqbcnt_print;
-#else
-#define ahd_sgseqbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGSEQBCNT", 0x9c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr0_print;
-#else
-#define ahd_slvspltoutattr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR0", 0x9c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr1_print;
-#else
-#define ahd_slvspltoutattr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR1", 0x9d, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_slvspltoutattr2_print;
-#else
-#define ahd_slvspltoutattr2_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SLVSPLTOUTATTR2", 0x9e, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sgspltstat0_print;
#else
#define ahd_sgspltstat0_print(regvalue, cur_col, wrap) \
@@ -1385,13 +832,6 @@ ahd_reg_print_t ahd_sgspltstat1_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sfunct_print;
-#else
-#define ahd_sfunct_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_df0pcistat_print;
#else
#define ahd_df0pcistat_print(regvalue, cur_col, wrap) \
@@ -1406,41 +846,6 @@ ahd_reg_print_t ahd_reg0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_df1pcistat_print;
-#else
-#define ahd_df1pcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DF1PCISTAT", 0xa1, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgpcistat_print;
-#else
-#define ahd_sgpcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SGPCISTAT", 0xa2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_reg1_print;
-#else
-#define ahd_reg1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "REG1", 0xa2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcpcistat_print;
-#else
-#define ahd_cmcpcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMCPCISTAT", 0xa3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlypcistat_print;
-#else
-#define ahd_ovlypcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYPCISTAT", 0xa4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg_isr_print;
#else
#define ahd_reg_isr_print(regvalue, cur_col, wrap) \
@@ -1455,13 +860,6 @@ ahd_reg_print_t ahd_sg_state_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_msipcistat_print;
-#else
-#define ahd_msipcistat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "MSIPCISTAT", 0xa6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_targpcistat_print;
#else
#define ahd_targpcistat_print(regvalue, cur_col, wrap) \
@@ -1469,13 +867,6 @@ ahd_reg_print_t ahd_targpcistat_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_data_count_odd_print;
-#else
-#define ahd_data_count_odd_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DATA_COUNT_ODD", 0xa7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scbptr_print;
#else
#define ahd_scbptr_print(regvalue, cur_col, wrap) \
@@ -1483,13 +874,6 @@ ahd_reg_print_t ahd_scbptr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbacnt_print;
-#else
-#define ahd_ccscbacnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBACNT", 0xab, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scbautoptr_print;
#else
#define ahd_scbautoptr_print(regvalue, cur_col, wrap) \
@@ -1504,13 +888,6 @@ ahd_reg_print_t ahd_ccsgaddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbadr_bk_print;
-#else
-#define ahd_ccscbadr_bk_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CCSCBADR_BK", 0xac, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbaddr_print;
#else
#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \
@@ -1518,13 +895,6 @@ ahd_reg_print_t ahd_ccscbaddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmc_rambist_print;
-#else
-#define ahd_cmc_rambist_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "CMC_RAMBIST", 0xad, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbctl_print;
#else
#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
@@ -1546,13 +916,6 @@ ahd_reg_print_t ahd_ccsgram_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexadr_print;
-#else
-#define ahd_flexadr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXADR", 0xb0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbram_print;
#else
#define ahd_ccscbram_print(regvalue, cur_col, wrap) \
@@ -1560,27 +923,6 @@ ahd_reg_print_t ahd_ccscbram_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexcnt_print;
-#else
-#define ahd_flexcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXCNT", 0xb3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexdmastat_print;
-#else
-#define ahd_flexdmastat_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXDMASTAT", 0xb5, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_flexdata_print;
-#else
-#define ahd_flexdata_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FLEXDATA", 0xb6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_brddat_print;
#else
#define ahd_brddat_print(regvalue, cur_col, wrap) \
@@ -1623,27 +965,6 @@ ahd_reg_print_t ahd_seestat_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scbcnt_print;
-#else
-#define ahd_scbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCBCNT", 0xbf, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfwaddr_print;
-#else
-#define ahd_dfwaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFWADDR", 0xc0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspfltrctl_print;
-#else
-#define ahd_dspfltrctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPFLTRCTL", 0xc0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dspdatactl_print;
#else
#define ahd_dspdatactl_print(regvalue, cur_col, wrap) \
@@ -1651,27 +972,6 @@ ahd_reg_print_t ahd_dspdatactl_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfraddr_print;
-#else
-#define ahd_dfraddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFRADDR", 0xc2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspreqctl_print;
-#else
-#define ahd_dspreqctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPREQCTL", 0xc2, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dspackctl_print;
-#else
-#define ahd_dspackctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DSPACKCTL", 0xc3, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dfdat_print;
#else
#define ahd_dfdat_print(regvalue, cur_col, wrap) \
@@ -1693,76 +993,6 @@ ahd_reg_print_t ahd_wrtbiasctl_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_rcvrbiosctl_print;
-#else
-#define ahd_rcvrbiosctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "RCVRBIOSCTL", 0xc6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_wrtbiascalc_print;
-#else
-#define ahd_wrtbiascalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "WRTBIASCALC", 0xc7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_rcvrbiascalc_print;
-#else
-#define ahd_rcvrbiascalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "RCVRBIASCALC", 0xc8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfptrs_print;
-#else
-#define ahd_dfptrs_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFPTRS", 0xc8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_skewcalc_print;
-#else
-#define ahd_skewcalc_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SKEWCALC", 0xc9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfbkptr_print;
-#else
-#define ahd_dfbkptr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFBKPTR", 0xc9, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfdbctl_print;
-#else
-#define ahd_dfdbctl_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFDBCTL", 0xcb, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfscnt_print;
-#else
-#define ahd_dfscnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFSCNT", 0xcc, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfbcnt_print;
-#else
-#define ahd_dfbcnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "DFBCNT", 0xce, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyaddr_print;
-#else
-#define ahd_ovlyaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "OVLYADDR", 0xd4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqctl0_print;
#else
#define ahd_seqctl0_print(regvalue, cur_col, wrap) \
@@ -1770,13 +1000,6 @@ ahd_reg_print_t ahd_seqctl0_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seqctl1_print;
-#else
-#define ahd_seqctl1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SEQCTL1", 0xd7, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_flags_print;
#else
#define ahd_flags_print(regvalue, cur_col, wrap) \
@@ -1826,20 +1049,6 @@ ahd_reg_print_t ahd_dindex_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr0_print;
-#else
-#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr1_print;
-#else
-#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_allones_print;
#else
#define ahd_allones_print(regvalue, cur_col, wrap) \
@@ -1875,13 +1084,6 @@ ahd_reg_print_t ahd_dindir_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_function1_print;
-#else
-#define ahd_function1_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "FUNCTION1", 0xf0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_stack_print;
#else
#define ahd_stack_print(regvalue, cur_col, wrap) \
@@ -1903,13 +1105,6 @@ ahd_reg_print_t ahd_curaddr_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lastaddr_print;
-#else
-#define ahd_lastaddr_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "LASTADDR", 0xf6, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intvec2_addr_print;
#else
#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
@@ -1931,24 +1126,17 @@ ahd_reg_print_t ahd_accum_save_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_waiting_scb_tails_print;
-#else
-#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ahd_pci_config_base_print;
+ahd_reg_print_t ahd_sram_base_print;
#else
-#define ahd_ahd_pci_config_base_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE", 0x100, regvalue, cur_col, wrap)
+#define ahd_sram_base_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sram_base_print;
+ahd_reg_print_t ahd_waiting_scb_tails_print;
#else
-#define ahd_sram_base_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
+#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -2218,17 +1406,17 @@ ahd_reg_print_t ahd_mk_message_scsiid_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_base_print;
+ahd_reg_print_t ahd_scb_residual_datacnt_print;
#else
-#define ahd_scb_base_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap)
+#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_residual_datacnt_print;
+ahd_reg_print_t ahd_scb_base_print;
#else
-#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap)
+#define ahd_scb_base_print(regvalue, cur_col, wrap) \
+ ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
@@ -2246,27 +1434,6 @@ ahd_reg_print_t ahd_scb_scsi_status_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_target_phases_print;
-#else
-#define ahd_scb_target_phases_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_TARGET_PHASES", 0x189, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_target_data_dir_print;
-#else
-#define ahd_scb_target_data_dir_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR", 0x18a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_target_itag_print;
-#else
-#define ahd_scb_target_itag_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_TARGET_ITAG", 0x18b, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_sense_busaddr_print;
#else
#define ahd_scb_sense_busaddr_print(regvalue, cur_col, wrap) \
@@ -2365,13 +1532,6 @@ ahd_reg_print_t ahd_scb_next2_print;
#endif
#if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scb_spare_print;
-#else
-#define ahd_scb_spare_print(regvalue, cur_col, wrap) \
- ahd_print_register(NULL, 0, "SCB_SPARE", 0x1b0, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_disconnected_lists_print;
#else
#define ahd_scb_disconnected_lists_print(regvalue, cur_col, wrap) \
@@ -2557,10 +1717,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SG_CACHE_PRE 0x1b
-#define LQIN 0x20
-
#define TYPEPTR 0x20
+#define LQIN 0x20
+
#define TAGPTR 0x21
#define LUNPTR 0x22
@@ -2620,14 +1780,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SINGLECMD 0x02
#define ABORTPENDING 0x01
-#define SCSBIST0 0x39
-#define GSBISTERR 0x40
-#define GSBISTDONE 0x20
-#define GSBISTRUN 0x10
-#define OSBISTERR 0x04
-#define OSBISTDONE 0x02
-#define OSBISTRUN 0x01
-
#define LQCTL2 0x39
#define LQIRETRY 0x80
#define LQICONTINUE 0x40
@@ -2638,10 +1790,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQOTOIDLE 0x02
#define LQOPAUSE 0x01
-#define SCSBIST1 0x3a
-#define NTBISTERR 0x04
-#define NTBISTDONE 0x02
-#define NTBISTRUN 0x01
+#define SCSBIST0 0x39
+#define GSBISTERR 0x40
+#define GSBISTDONE 0x20
+#define GSBISTRUN 0x10
+#define OSBISTERR 0x04
+#define OSBISTDONE 0x02
+#define OSBISTRUN 0x01
#define SCSISEQ0 0x3a
#define TEMODEO 0x80
@@ -2650,8 +1805,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define FORCEBUSFREE 0x10
#define SCSIRSTO 0x01
+#define SCSBIST1 0x3a
+#define NTBISTERR 0x04
+#define NTBISTDONE 0x02
+#define NTBISTRUN 0x01
+
#define SCSISEQ1 0x3b
+#define BUSINITID 0x3c
+
#define SXFRCTL0 0x3c
#define DFON 0x80
#define DFPEXP 0x40
@@ -2660,8 +1822,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DLCOUNT 0x3c
-#define BUSINITID 0x3c
-
#define SXFRCTL1 0x3d
#define BITBUCKET 0x80
#define ENSACHK 0x40
@@ -2686,6 +1846,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CURRFIFO_1 0x01
#define CURRFIFO_0 0x00
+#define MULTARGID 0x40
+
#define SCSISIGO 0x40
#define CDO 0x80
#define IOO 0x40
@@ -2696,8 +1858,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define REQO 0x02
#define ACKO 0x01
-#define MULTARGID 0x40
-
#define SCSISIGI 0x41
#define ATNI 0x10
#define SELI 0x08
@@ -2744,15 +1904,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENAB20 0x04
#define SELWIDE 0x02
-#define CLRSINT0 0x4b
-#define CLRSELDO 0x40
-#define CLRSELDI 0x20
-#define CLRSELINGO 0x10
-#define CLRIOERR 0x08
-#define CLROVERRUN 0x04
-#define CLRSPIORDY 0x02
-#define CLRARBDO 0x01
-
#define SSTAT0 0x4b
#define TARGET 0x80
#define SELDO 0x40
@@ -2772,14 +1923,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENSPIORDY 0x02
#define ENARBDO 0x01
-#define CLRSINT1 0x4c
-#define CLRSELTIMEO 0x80
-#define CLRATNO 0x40
-#define CLRSCSIRSTI 0x20
-#define CLRBUSFREE 0x08
-#define CLRSCSIPERR 0x04
-#define CLRSTRB2FAST 0x02
-#define CLRREQINIT 0x01
+#define CLRSINT0 0x4b
+#define CLRSELDO 0x40
+#define CLRSELDI 0x20
+#define CLRSELINGO 0x10
+#define CLRIOERR 0x08
+#define CLROVERRUN 0x04
+#define CLRSPIORDY 0x02
+#define CLRARBDO 0x01
#define SSTAT1 0x4c
#define SELTO 0x80
@@ -2791,6 +1942,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define STRB2FAST 0x02
#define REQINIT 0x01
+#define CLRSINT1 0x4c
+#define CLRSELTIMEO 0x80
+#define CLRATNO 0x40
+#define CLRSCSIRSTI 0x20
+#define CLRBUSFREE 0x08
+#define CLRSCSIPERR 0x04
+#define CLRSTRB2FAST 0x02
+#define CLRREQINIT 0x01
+
#define SSTAT2 0x4d
#define BUSFREETIME 0xc0
#define NONPACKREQ 0x20
@@ -2838,14 +1998,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQIATNLQ 0x02
#define LQIATNCMD 0x01
-#define CLRLQIINT0 0x50
-#define CLRLQIATNQAS 0x20
-#define CLRLQICRCT1 0x10
-#define CLRLQICRCT2 0x08
-#define CLRLQIBADLQT 0x04
-#define CLRLQIATNLQ 0x02
-#define CLRLQIATNCMD 0x01
-
#define LQIMODE0 0x50
#define ENLQIATNQASK 0x20
#define ENLQICRCT1 0x10
@@ -2854,6 +2006,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENLQIATNLQ 0x02
#define ENLQIATNCMD 0x01
+#define CLRLQIINT0 0x50
+#define CLRLQIATNQAS 0x20
+#define CLRLQICRCT1 0x10
+#define CLRLQICRCT2 0x08
+#define CLRLQIBADLQT 0x04
+#define CLRLQIATNLQ 0x02
+#define CLRLQIATNCMD 0x01
+
#define LQIMODE1 0x51
#define ENLQIPHASE_LQ 0x80
#define ENLQIPHASE_NLQ 0x40
@@ -2976,6 +2136,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQOSCSCTL 0x5a
#define LQOH2A_VERSION 0x80
+#define LQOBUSETDLY 0x40
+#define LQONOHOLDLACK 0x02
#define LQONOCHKOVER 0x01
#define NEXTSCB 0x5a
@@ -2998,8 +2160,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CFG4ICMD 0x02
#define CFG4TCMD 0x01
-#define CURRSCB 0x5c
-
#define SEQIMODE 0x5c
#define ENCTXTDONE 0x40
#define ENSAVEPTRS 0x20
@@ -3009,6 +2169,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENCFG4ICMD 0x02
#define ENCFG4TCMD 0x01
+#define CURRSCB 0x5c
+
#define MDFFSTAT 0x5d
#define SHCNTNEGATIVE 0x40
#define SHCNTMINUS1 0x20
@@ -3023,29 +2185,29 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DFFTAG 0x5e
-#define LASTSCB 0x5e
-
#define SCSITEST 0x5e
#define CNTRTEST 0x08
#define SEL_TXPLL_DEBUG 0x04
+#define LASTSCB 0x5e
+
#define IOPDNCTL 0x5f
#define DISABLE_OE 0x80
#define PDN_IDIST 0x04
#define PDN_DIFFSENSE 0x01
+#define DGRPCRCI 0x60
+
#define SHADDR 0x60
#define NEGOADDR 0x60
-#define DGRPCRCI 0x60
-
#define NEGPERIOD 0x61
-#define PACKCRCI 0x62
-
#define NEGOFFSET 0x62
+#define PACKCRCI 0x62
+
#define NEGPPROPTS 0x63
#define PPROPT_PACE 0x08
#define PPROPT_QAS 0x04
@@ -3066,6 +2228,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ANNEXDAT 0x66
#define SCSCHKN 0x66
+#define BIDICHKDIS 0x80
#define STSELSKIDDIS 0x40
#define CURRFIFODEF 0x20
#define WIDERESEN 0x10
@@ -3090,6 +2253,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SELOID 0x6b
+#define FAIRNESS 0x6c
+
#define PLL400CTL0 0x6c
#define PLL_VCOSEL 0x80
#define PLL_PWDN 0x40
@@ -3099,8 +2264,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PLL_DLPF 0x02
#define PLL_ENFBM 0x01
-#define FAIRNESS 0x6c
-
#define PLL400CTL1 0x6d
#define PLL_CNTEN 0x80
#define PLL_CNTCLR 0x40
@@ -3112,25 +2275,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define HADDR 0x70
+#define HODMAADR 0x70
+
#define PLLDELAY 0x70
#define SPLIT_DROP_REQ 0x80
-#define HODMAADR 0x70
+#define HCNT 0x78
#define HODMACNT 0x78
-#define HCNT 0x78
-
#define HODMAEN 0x7a
-#define SCBHADDR 0x7c
-
#define SGHADDR 0x7c
-#define SCBHCNT 0x84
+#define SCBHADDR 0x7c
#define SGHCNT 0x84
+#define SCBHCNT 0x84
+
#define DFF_THRSH 0x88
#define WR_DFTHRSH 0x70
#define RD_DFTHRSH 0x07
@@ -3163,6 +2326,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CMCRXMSG0 0x90
+#define OVLYRXMSG0 0x90
+
+#define DCHRXMSG0 0x90
+
#define ROENABLE 0x90
#define MSIROEN 0x20
#define OVLYROEN 0x10
@@ -3171,11 +2338,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DCH1ROEN 0x02
#define DCH0ROEN 0x01
-#define OVLYRXMSG0 0x90
+#define OVLYRXMSG1 0x91
-#define DCHRXMSG0 0x90
+#define CMCRXMSG1 0x91
-#define OVLYRXMSG1 0x91
+#define DCHRXMSG1 0x91
#define NSENABLE 0x91
#define MSINSEN 0x20
@@ -3185,10 +2352,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DCH1NSEN 0x02
#define DCH0NSEN 0x01
-#define CMCRXMSG1 0x91
-
-#define DCHRXMSG1 0x91
-
#define DCHRXMSG2 0x92
#define CMCRXMSG2 0x92
@@ -3212,24 +2375,24 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define TSCSERREN 0x02
#define CMPABCDIS 0x01
+#define CMCSEQBCNT 0x94
+
#define OVLYSEQBCNT 0x94
#define DCHSEQBCNT 0x94
-#define CMCSEQBCNT 0x94
-
-#define CMCSPLTSTAT0 0x96
-
#define DCHSPLTSTAT0 0x96
#define OVLYSPLTSTAT0 0x96
-#define CMCSPLTSTAT1 0x97
+#define CMCSPLTSTAT0 0x96
#define OVLYSPLTSTAT1 0x97
#define DCHSPLTSTAT1 0x97
+#define CMCSPLTSTAT1 0x97
+
#define SGRXMSG0 0x98
#define CDNUM 0xf8
#define CFNUM 0x07
@@ -3257,18 +2420,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define TAG_NUM 0x1f
#define RLXORD 0x10
-#define SGSEQBCNT 0x9c
-
#define SLVSPLTOUTATTR0 0x9c
#define LOWER_BCNT 0xff
+#define SGSEQBCNT 0x9c
+
#define SLVSPLTOUTATTR1 0x9d
#define CMPLT_DNUM 0xf8
#define CMPLT_FNUM 0x07
-#define SLVSPLTOUTATTR2 0x9e
-#define CMPLT_BNUM 0xff
-
#define SGSPLTSTAT0 0x9e
#define STAETERM 0x80
#define SCBCERR 0x40
@@ -3279,6 +2439,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define RXSCEMSG 0x02
#define RXSPLTRSP 0x01
+#define SLVSPLTOUTATTR2 0x9e
+#define CMPLT_BNUM 0xff
+
#define SGSPLTSTAT1 0x9f
#define RXDATABUCKET 0x01
@@ -3334,10 +2497,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CCSGADDR 0xac
-#define CCSCBADR_BK 0xac
-
#define CCSCBADDR 0xac
+#define CCSCBADR_BK 0xac
+
#define CMC_RAMBIST 0xad
#define SG_ELEMENT_SIZE 0x80
#define SCBRAMBIST_FAIL 0x40
@@ -3391,9 +2554,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SEEDAT 0xbc
#define SEECTL 0xbe
+#define SEEOP_EWDS 0x40
#define SEEOP_WALL 0x40
#define SEEOP_EWEN 0x40
-#define SEEOP_EWDS 0x40
#define SEEOPCODE 0x70
#define SEERST 0x02
#define SEESTART 0x01
@@ -3410,25 +2573,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCBCNT 0xbf
-#define DFWADDR 0xc0
-
#define DSPFLTRCTL 0xc0
#define FLTRDISABLE 0x20
#define EDGESENSE 0x10
#define DSPFCNTSEL 0x0f
+#define DFWADDR 0xc0
+
#define DSPDATACTL 0xc1
#define BYPASSENAB 0x80
#define DESQDIS 0x10
#define RCVROFFSTDIS 0x04
#define XMITOFFSTDIS 0x02
-#define DFRADDR 0xc2
-
#define DSPREQCTL 0xc2
#define MANREQCTL 0xc0
#define MANREQDLY 0x3f
+#define DFRADDR 0xc2
+
#define DSPACKCTL 0xc3
#define MANACKCTL 0xc0
#define MANACKDLY 0x3f
@@ -3449,14 +2612,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define WRTBIASCALC 0xc7
-#define RCVRBIASCALC 0xc8
-
#define DFPTRS 0xc8
-#define SKEWCALC 0xc9
+#define RCVRBIASCALC 0xc8
#define DFBKPTR 0xc9
+#define SKEWCALC 0xc9
+
#define DFDBCTL 0xcb
#define DFF_CIO_WR_RDY 0x20
#define DFF_CIO_RD_RDY 0x10
@@ -3541,12 +2704,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ACCUM_SAVE 0xfa
-#define WAITING_SCB_TAILS 0x100
-
#define AHD_PCI_CONFIG_BASE 0x100
#define SRAM_BASE 0x100
+#define WAITING_SCB_TAILS 0x100
+
#define WAITING_TID_HEAD 0x120
#define WAITING_TID_TAIL 0x122
@@ -3575,8 +2738,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PRELOADEN 0x80
#define WIDEODD 0x40
#define SCSIEN 0x20
-#define SDMAEN 0x10
#define SDMAENACK 0x10
+#define SDMAEN 0x10
#define HDMAEN 0x08
#define HDMAENACK 0x08
#define DIRECTION 0x04
@@ -3674,12 +2837,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define MK_MESSAGE_SCSIID 0x162
-#define SCB_BASE 0x180
-
#define SCB_RESIDUAL_DATACNT 0x180
#define SCB_CDB_STORE 0x180
#define SCB_HOST_CDB_PTR 0x180
+#define SCB_BASE 0x180
+
#define SCB_RESIDUAL_SGPTR 0x184
#define SG_ADDR_MASK 0xf8
#define SG_OVERRUN_RESID 0x02
@@ -3747,6 +2910,17 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCB_DISCONNECTED_LISTS 0x1b8
+#define CMD_GROUP_CODE_SHIFT 0x05
+#define STIMESEL_MIN 0x18
+#define STIMESEL_SHIFT 0x03
+#define INVALID_ADDR 0x80
+#define AHD_PRECOMP_MASK 0x07
+#define TARGET_DATA_IN 0x01
+#define CCSCBADDR_MAX 0x80
+#define NUMDSPS 0x14
+#define SEEOP_EWEN_ADDR 0xc0
+#define AHD_ANNEXCOL_PER_DEV0 0x04
+#define DST_MODE_SHIFT 0x04
#define AHD_TIMER_MAX_US 0x18ffe7
#define AHD_TIMER_MAX_TICKS 0xffff
#define AHD_SENSE_BUFSIZE 0x100
@@ -3781,43 +2955,32 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LUNLEN_SINGLE_LEVEL_LUN 0x0f
#define NVRAM_SCB_OFFSET 0x2c
#define STATUS_PKT_SENSE 0xff
-#define CMD_GROUP_CODE_SHIFT 0x05
#define MAX_OFFSET_PACED_BUG 0x7f
#define STIMESEL_BUG_ADJ 0x08
-#define STIMESEL_MIN 0x18
-#define STIMESEL_SHIFT 0x03
#define CCSGRAM_MAXSEGS 0x10
-#define INVALID_ADDR 0x80
#define SEEOP_ERAL_ADDR 0x80
#define AHD_SLEWRATE_DEF_REVB 0x08
#define AHD_PRECOMP_CUTBACK_17 0x04
-#define AHD_PRECOMP_MASK 0x07
#define SRC_MODE_SHIFT 0x00
#define PKT_OVERRUN_BUFSIZE 0x200
#define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30
-#define TARGET_DATA_IN 0x01
#define HOST_MSG 0xff
#define MAX_OFFSET 0xfe
#define BUS_16_BIT 0x01
-#define CCSCBADDR_MAX 0x80
-#define NUMDSPS 0x14
-#define SEEOP_EWEN_ADDR 0xc0
-#define AHD_ANNEXCOL_PER_DEV0 0x04
-#define DST_MODE_SHIFT 0x04
/* Downloaded Constant Definitions */
+#define SG_SIZEOF 0x04
+#define SG_PREFETCH_ALIGN_MASK 0x02
+#define SG_PREFETCH_CNT_LIMIT 0x01
#define CACHELINE_MASK 0x07
#define SCB_TRANSFER_SIZE 0x06
#define PKT_OVERRUN_BUFOFFSET 0x05
-#define SG_SIZEOF 0x04
#define SG_PREFETCH_ADDR_MASK 0x03
-#define SG_PREFETCH_ALIGN_MASK 0x02
-#define SG_PREFETCH_CNT_LIMIT 0x01
#define SG_PREFETCH_CNT 0x00
#define DOWNLOAD_CONST_COUNT 0x08
/* Exported Labels */
-#define LABEL_seq_isr 0x28f
#define LABEL_timer_isr 0x28b
+#define LABEL_seq_isr 0x28f
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
index db38a61..c4c8a96 100644
--- a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
@@ -8,7 +8,7 @@
#include "aic79xx_osm.h"
-static ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
+static const ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
{ "SRC_MODE", 0x07, 0x07 },
{ "DST_MODE", 0x70, 0x70 }
};
@@ -20,7 +20,7 @@ ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x00, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
{ "SPLTINT", 0x01, 0x01 },
{ "CMDCMPLT", 0x02, 0x02 },
{ "SEQINT", 0x04, 0x04 },
@@ -39,7 +39,7 @@ ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x01, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
{ "NO_SEQINT", 0x00, 0xff },
{ "BAD_PHASE", 0x01, 0xff },
{ "SEND_REJECT", 0x02, 0xff },
@@ -76,7 +76,7 @@ ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x02, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRINT_parse_table[] = {
{ "CLRSPLTINT", 0x01, 0x01 },
{ "CLRCMDINT", 0x02, 0x02 },
{ "CLRSEQINT", 0x04, 0x04 },
@@ -94,7 +94,7 @@ ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x03, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t ERROR_parse_table[] = {
+static const ahd_reg_parse_entry_t ERROR_parse_table[] = {
{ "DSCTMOUT", 0x02, 0x02 },
{ "ILLOPCODE", 0x04, 0x04 },
{ "SQPARERR", 0x08, 0x08 },
@@ -111,24 +111,7 @@ ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x04, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRERR_parse_table[] = {
- { "CLRDSCTMOUT", 0x02, 0x02 },
- { "CLRILLOPCODE", 0x04, 0x04 },
- { "CLRSQPARERR", 0x08, 0x08 },
- { "CLRDPARERR", 0x10, 0x10 },
- { "CLRMPARERR", 0x20, 0x20 },
- { "CLRCIOACCESFAIL", 0x40, 0x40 },
- { "CLRCIOPARERR", 0x80, 0x80 }
-};
-
-int
-ahd_clrerr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRERR_parse_table, 7, "CLRERR",
- 0x04, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
+static const ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
{ "CHIPRST", 0x01, 0x01 },
{ "CHIPRSTACK", 0x01, 0x01 },
{ "INTEN", 0x02, 0x02 },
@@ -160,7 +143,7 @@ ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x08, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
+static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
{ "ENINT_COALESCE", 0x40, 0x40 },
{ "HOST_TQINPOS", 0x80, 0x80 }
};
@@ -172,7 +155,7 @@ ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
{ "SEQ_SPLTINT", 0x01, 0x01 },
{ "SEQ_PCIINT", 0x02, 0x02 },
{ "SEQ_SCSIINT", 0x04, 0x04 },
@@ -187,7 +170,7 @@ ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
{ "CLRSEQ_SPLTINT", 0x01, 0x01 },
{ "CLRSEQ_PCIINT", 0x02, 0x02 },
{ "CLRSEQ_SCSIINT", 0x04, 0x04 },
@@ -230,7 +213,7 @@ ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x14, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
+static const ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
{ "SCB_QSIZE_4", 0x00, 0x0f },
{ "SCB_QSIZE_8", 0x01, 0x0f },
{ "SCB_QSIZE_16", 0x02, 0x0f },
@@ -258,7 +241,7 @@ ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x16, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t INTCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t INTCTL_parse_table[] = {
{ "SPLTINTEN", 0x01, 0x01 },
{ "SEQINTEN", 0x02, 0x02 },
{ "SCSIINTEN", 0x04, 0x04 },
@@ -276,7 +259,7 @@ ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x18, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
+static const ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "DIRECTIONEN", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "FIFOFLUSHACK", 0x02, 0x02 },
@@ -297,7 +280,7 @@ ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x19, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
+static const ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
{ "CIOPARCKEN", 0x01, 0x01 },
{ "DISABLE_TWATE", 0x02, 0x02 },
{ "EXTREQLCK", 0x10, 0x10 },
@@ -313,7 +296,7 @@ ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x19, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
+static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
{ "FIFOEMP", 0x01, 0x01 },
{ "FIFOFULL", 0x02, 0x02 },
{ "DFTHRESH", 0x04, 0x04 },
@@ -330,7 +313,7 @@ ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
+static const ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
{ "LAST_SEG_DONE", 0x01, 0x01 },
{ "LAST_SEG", 0x02, 0x02 },
{ "ODD_SEG", 0x04, 0x04 },
@@ -344,20 +327,7 @@ ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t ARBCTL_parse_table[] = {
- { "USE_TIME", 0x07, 0x07 },
- { "RETRY_SWEN", 0x08, 0x08 },
- { "RESET_HARB", 0x80, 0x80 }
-};
-
-int
-ahd_arbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ARBCTL_parse_table, 3, "ARBCTL",
- 0x1b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
+static const ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
{ "LAST_SEG", 0x02, 0x02 },
{ "ODD_SEG", 0x04, 0x04 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
@@ -378,20 +348,6 @@ ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_typeptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "TYPEPTR",
- 0x20, regvalue, cur_col, wrap));
-}
-
-int
-ahd_tagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "TAGPTR",
- 0x21, regvalue, cur_col, wrap));
-}
-
-int
ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "LUNPTR",
@@ -399,20 +355,6 @@ ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_datalenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DATALENPTR",
- 0x23, regvalue, cur_col, wrap));
-}
-
-int
-ahd_statlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "STATLENPTR",
- 0x24, regvalue, cur_col, wrap));
-}
-
-int
ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "CMDLENPTR",
@@ -448,13 +390,6 @@ ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_idptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "IDPTR",
- 0x2a, regvalue, cur_col, wrap));
-}
-
-int
ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
@@ -468,28 +403,7 @@ ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x2c, regvalue, cur_col, wrap));
}
-int
-ahd_maxcmdbytes_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMDBYTES",
- 0x2d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_maxcmd2rcv_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MAXCMD2RCV",
- 0x2e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_shortthresh_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SHORTTHRESH",
- 0x2f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
+static const ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
{ "ILUNLEN", 0x0f, 0x0f },
{ "TLUNLEN", 0xf0, 0xf0 }
};
@@ -522,49 +436,7 @@ ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x33, regvalue, cur_col, wrap));
}
-int
-ahd_lqrsvd01_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD01",
- 0x34, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqrsvd16_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD16",
- 0x35, regvalue, cur_col, wrap));
-}
-
-int
-ahd_lqrsvd17_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LQRSVD17",
- 0x36, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmdrsvd0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMDRSVD0",
- 0x37, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL0_parse_table[] = {
- { "LQ0INITGCLT", 0x03, 0x03 },
- { "LQ0TARGCLT", 0x0c, 0x0c },
- { "LQIINITGCLT", 0x30, 0x30 },
- { "LQITARGCLT", 0xc0, 0xc0 }
-};
-
-int
-ahd_lqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(LQCTL0_parse_table, 4, "LQCTL0",
- 0x38, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
{ "ABORTPENDING", 0x01, 0x01 },
{ "SINGLECMD", 0x02, 0x02 },
{ "PCI2PCI", 0x04, 0x04 }
@@ -577,23 +449,7 @@ ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x38, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSBIST0_parse_table[] = {
- { "OSBISTRUN", 0x01, 0x01 },
- { "OSBISTDONE", 0x02, 0x02 },
- { "OSBISTERR", 0x04, 0x04 },
- { "GSBISTRUN", 0x10, 0x10 },
- { "GSBISTDONE", 0x20, 0x20 },
- { "GSBISTERR", 0x40, 0x40 }
-};
-
-int
-ahd_scsbist0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSBIST0_parse_table, 6, "SCSBIST0",
- 0x39, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
+static const ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
{ "LQOPAUSE", 0x01, 0x01 },
{ "LQOTOIDLE", 0x02, 0x02 },
{ "LQOCONTINUE", 0x04, 0x04 },
@@ -611,20 +467,7 @@ ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x39, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSBIST1_parse_table[] = {
- { "NTBISTRUN", 0x01, 0x01 },
- { "NTBISTDONE", 0x02, 0x02 },
- { "NTBISTERR", 0x04, 0x04 }
-};
-
-int
-ahd_scsbist1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSBIST1_parse_table, 3, "SCSBIST1",
- 0x3a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
{ "SCSIRSTO", 0x01, 0x01 },
{ "FORCEBUSFREE", 0x10, 0x10 },
{ "ENARBO", 0x20, 0x20 },
@@ -639,7 +482,7 @@ ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
{ "ALTSTIM", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "MANUALP", 0x0c, 0x0c },
@@ -655,7 +498,7 @@ ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
+static const ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
{ "SPIOEN", 0x08, 0x08 },
{ "BIOSCANCELEN", 0x10, 0x10 },
{ "DFPEXP", 0x40, 0x40 },
@@ -669,21 +512,7 @@ ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3c, regvalue, cur_col, wrap));
}
-int
-ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DLCOUNT",
- 0x3c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BUSINITID",
- 0x3c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
+static const ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
{ "STPWEN", 0x01, 0x01 },
{ "ACTNEGEN", 0x02, 0x02 },
{ "ENSTIMER", 0x04, 0x04 },
@@ -700,27 +529,7 @@ ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3d, regvalue, cur_col, wrap));
}
-int
-ahd_bustargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BUSTARGID",
- 0x3e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SXFRCTL2_parse_table[] = {
- { "ASU", 0x07, 0x07 },
- { "CMDDMAEN", 0x08, 0x08 },
- { "AUTORSTDIS", 0x10, 0x10 }
-};
-
-int
-ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
- 0x3e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
{ "CURRFIFO_0", 0x00, 0x03 },
{ "CURRFIFO_1", 0x01, 0x03 },
{ "CURRFIFO_NONE", 0x03, 0x03 },
@@ -736,7 +545,14 @@ ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3f, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
+int
+ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(NULL, 0, "MULTARGID",
+ 0x40, regvalue, cur_col, wrap));
+}
+
+static const ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
{ "P_DATAOUT", 0x00, 0xe0 },
{ "P_DATAOUT_DT", 0x20, 0xe0 },
{ "P_DATAIN", 0x40, 0xe0 },
@@ -763,14 +579,7 @@ ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x40, regvalue, cur_col, wrap));
}
-int
-ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "MULTARGID",
- 0x40, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
{ "P_DATAOUT", 0x00, 0xe0 },
{ "P_DATAOUT_DT", 0x20, 0xe0 },
{ "P_DATAIN", 0x40, 0xe0 },
@@ -797,7 +606,7 @@ ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x41, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
{ "DATA_OUT_PHASE", 0x01, 0x03 },
{ "DATA_IN_PHASE", 0x02, 0x03 },
{ "DATA_PHASE_MASK", 0x03, 0x03 },
@@ -815,13 +624,6 @@ ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_scsidat0_img_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCSIDAT0_IMG",
- 0x43, regvalue, cur_col, wrap));
-}
-
-int
ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SCSIDAT",
@@ -835,7 +637,7 @@ ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x46, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
+static const ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
{ "TARGID", 0x0f, 0x0f },
{ "CLKOUT", 0x80, 0x80 }
};
@@ -847,7 +649,7 @@ ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x48, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SELID_parse_table[] = {
+static const ahd_reg_parse_entry_t SELID_parse_table[] = {
{ "ONEBIT", 0x08, 0x08 },
{ "SELID_MASK", 0xf0, 0xf0 }
};
@@ -859,7 +661,7 @@ ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x49, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
+static const ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
{ "AUTO_MSGOUT_DE", 0x02, 0x02 },
{ "ENDGFORMCHK", 0x04, 0x04 },
{ "BUSFREEREV", 0x10, 0x10 },
@@ -876,7 +678,7 @@ ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
{ "SELWIDE", 0x02, 0x02 },
{ "ENAB20", 0x04, 0x04 },
{ "ENAB40", 0x08, 0x08 },
@@ -891,24 +693,7 @@ ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
- { "CLRARBDO", 0x01, 0x01 },
- { "CLRSPIORDY", 0x02, 0x02 },
- { "CLROVERRUN", 0x04, 0x04 },
- { "CLRIOERR", 0x08, 0x08 },
- { "CLRSELINGO", 0x10, 0x10 },
- { "CLRSELDI", 0x20, 0x20 },
- { "CLRSELDO", 0x40, 0x40 }
-};
-
-int
-ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
- 0x4b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "ARBDO", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 },
{ "OVERRUN", 0x04, 0x04 },
@@ -926,7 +711,7 @@ ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
+static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENARBDO", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENOVERRUN", 0x04, 0x04 },
@@ -943,24 +728,24 @@ ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
- { "CLRREQINIT", 0x01, 0x01 },
- { "CLRSTRB2FAST", 0x02, 0x02 },
- { "CLRSCSIPERR", 0x04, 0x04 },
- { "CLRBUSFREE", 0x08, 0x08 },
- { "CLRSCSIRSTI", 0x20, 0x20 },
- { "CLRATNO", 0x40, 0x40 },
- { "CLRSELTIMEO", 0x80, 0x80 }
+static const ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
+ { "CLRARBDO", 0x01, 0x01 },
+ { "CLRSPIORDY", 0x02, 0x02 },
+ { "CLROVERRUN", 0x04, 0x04 },
+ { "CLRIOERR", 0x08, 0x08 },
+ { "CLRSELINGO", 0x10, 0x10 },
+ { "CLRSELDI", 0x20, 0x20 },
+ { "CLRSELDO", 0x40, 0x40 }
};
int
-ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
- 0x4c, regvalue, cur_col, wrap));
+ return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
+ 0x4b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 },
{ "STRB2FAST", 0x02, 0x02 },
{ "SCSIPERR", 0x04, 0x04 },
@@ -978,7 +763,24 @@ ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
+ { "CLRREQINIT", 0x01, 0x01 },
+ { "CLRSTRB2FAST", 0x02, 0x02 },
+ { "CLRSCSIPERR", 0x04, 0x04 },
+ { "CLRBUSFREE", 0x08, 0x08 },
+ { "CLRSCSIRSTI", 0x20, 0x20 },
+ { "CLRATNO", 0x40, 0x40 },
+ { "CLRSELTIMEO", 0x80, 0x80 }
+};
+
+int
+ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
+ 0x4c, regvalue, cur_col, wrap));
+}
+
+static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
{ "BUSFREE_LQO", 0x40, 0xc0 },
{ "BUSFREE_DFF0", 0x80, 0xc0 },
{ "BUSFREE_DFF1", 0xc0, 0xc0 },
@@ -998,20 +800,7 @@ ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4d, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
- { "ENDMADONE", 0x01, 0x01 },
- { "ENSDONE", 0x02, 0x02 },
- { "ENWIDE_RES", 0x04, 0x04 }
-};
-
-int
-ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
- 0x4d, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
{ "CLRDMADONE", 0x01, 0x01 },
{ "CLRSDONE", 0x02, 0x02 },
{ "CLRWIDE_RES", 0x04, 0x04 },
@@ -1025,7 +814,7 @@ ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4d, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
+static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
{ "DTERR", 0x01, 0x01 },
{ "DGFORMERR", 0x02, 0x02 },
{ "CRCERR", 0x04, 0x04 },
@@ -1064,7 +853,7 @@ ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4f, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
{ "LQIATNCMD", 0x01, 0x01 },
{ "LQIATNLQ", 0x02, 0x02 },
{ "LQIBADLQT", 0x04, 0x04 },
@@ -1080,23 +869,7 @@ ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x50, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
- { "CLRLQIATNCMD", 0x01, 0x01 },
- { "CLRLQIATNLQ", 0x02, 0x02 },
- { "CLRLQIBADLQT", 0x04, 0x04 },
- { "CLRLQICRCT2", 0x08, 0x08 },
- { "CLRLQICRCT1", 0x10, 0x10 },
- { "CLRLQIATNQAS", 0x20, 0x20 }
-};
-
-int
-ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
- 0x50, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
{ "ENLQIATNCMD", 0x01, 0x01 },
{ "ENLQIATNLQ", 0x02, 0x02 },
{ "ENLQIBADLQT", 0x04, 0x04 },
@@ -1112,7 +885,23 @@ ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x50, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
+ { "CLRLQIATNCMD", 0x01, 0x01 },
+ { "CLRLQIATNLQ", 0x02, 0x02 },
+ { "CLRLQIBADLQT", 0x04, 0x04 },
+ { "CLRLQICRCT2", 0x08, 0x08 },
+ { "CLRLQICRCT1", 0x10, 0x10 },
+ { "CLRLQIATNQAS", 0x20, 0x20 }
+};
+
+int
+ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
+ 0x50, regvalue, cur_col, wrap));
+}
+
+static const ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
{ "ENLQIOVERI_NLQ", 0x01, 0x01 },
{ "ENLQIOVERI_LQ", 0x02, 0x02 },
{ "ENLQIBADLQI", 0x04, 0x04 },
@@ -1130,7 +919,7 @@ ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x51, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
{ "LQIOVERI_NLQ", 0x01, 0x01 },
{ "LQIOVERI_LQ", 0x02, 0x02 },
{ "LQIBADLQI", 0x04, 0x04 },
@@ -1148,7 +937,7 @@ ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x51, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
{ "CLRLQIOVERI_NLQ", 0x01, 0x01 },
{ "CLRLQIOVERI_LQ", 0x02, 0x02 },
{ "CLRLQIBADLQI", 0x04, 0x04 },
@@ -1166,7 +955,7 @@ ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x51, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
{ "LQIGSAVAIL", 0x01, 0x01 },
{ "LQISTOPCMD", 0x02, 0x02 },
{ "LQISTOPLQ", 0x04, 0x04 },
@@ -1184,7 +973,7 @@ ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x52, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
+static const ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
{ "OSRAMPERR", 0x01, 0x01 },
{ "NTRAMPERR", 0x02, 0x02 }
};
@@ -1196,7 +985,7 @@ ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x53, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
+static const ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
{ "ENOSRAMPERR", 0x01, 0x01 },
{ "ENNTRAMPERR", 0x02, 0x02 }
};
@@ -1208,7 +997,7 @@ ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x53, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
{ "CLROSRAMPERR", 0x01, 0x01 },
{ "CLRNTRAMPERR", 0x02, 0x02 }
};
@@ -1220,7 +1009,7 @@ ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x53, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
{ "LQOTCRC", 0x01, 0x01 },
{ "LQOATNPKT", 0x02, 0x02 },
{ "LQOATNLQ", 0x04, 0x04 },
@@ -1235,7 +1024,7 @@ ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x54, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
{ "CLRLQOTCRC", 0x01, 0x01 },
{ "CLRLQOATNPKT", 0x02, 0x02 },
{ "CLRLQOATNLQ", 0x04, 0x04 },
@@ -1250,7 +1039,7 @@ ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x54, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
{ "ENLQOTCRC", 0x01, 0x01 },
{ "ENLQOATNPKT", 0x02, 0x02 },
{ "ENLQOATNLQ", 0x04, 0x04 },
@@ -1265,7 +1054,7 @@ ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x54, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
{ "ENLQOPHACHGINPKT", 0x01, 0x01 },
{ "ENLQOBUSFREE", 0x02, 0x02 },
{ "ENLQOBADQAS", 0x04, 0x04 },
@@ -1280,7 +1069,7 @@ ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x55, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
{ "LQOPHACHGINPKT", 0x01, 0x01 },
{ "LQOBUSFREE", 0x02, 0x02 },
{ "LQOBADQAS", 0x04, 0x04 },
@@ -1295,7 +1084,7 @@ ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x55, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
{ "CLRLQOPHACHGINPKT", 0x01, 0x01 },
{ "CLRLQOBUSFREE", 0x02, 0x02 },
{ "CLRLQOBADQAS", 0x04, 0x04 },
@@ -1310,7 +1099,7 @@ ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x55, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
{ "LQOSTOP0", 0x01, 0x01 },
{ "LQOPHACHGOUTPKT", 0x02, 0x02 },
{ "LQOWAITFIFO", 0x10, 0x10 },
@@ -1331,7 +1120,7 @@ ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x56, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
+static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
{ "ENREQINIT", 0x01, 0x01 },
{ "ENSTRB2FAST", 0x02, 0x02 },
{ "ENSCSIPERR", 0x04, 0x04 },
@@ -1356,7 +1145,7 @@ ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x58, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
{ "RSTCHN", 0x01, 0x01 },
{ "CLRCHN", 0x02, 0x02 },
{ "CLRSHCNT", 0x04, 0x04 },
@@ -1370,15 +1159,17 @@ ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
{ "LQONOCHKOVER", 0x01, 0x01 },
+ { "LQONOHOLDLACK", 0x02, 0x02 },
+ { "LQOBUSETDLY", 0x40, 0x40 },
{ "LQOH2A_VERSION", 0x80, 0x80 }
};
int
ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
+ return (ahd_print_register(LQOSCSCTL_parse_table, 4, "LQOSCSCTL",
0x5a, regvalue, cur_col, wrap));
}
@@ -1389,7 +1180,7 @@ ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
+static const ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
{ "CLRCFG4TCMD", 0x01, 0x01 },
{ "CLRCFG4ICMD", 0x02, 0x02 },
{ "CLRCFG4TSTAT", 0x04, 0x04 },
@@ -1406,7 +1197,7 @@ ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
{ "CFG4TCMD", 0x01, 0x01 },
{ "CFG4ICMD", 0x02, 0x02 },
{ "CFG4TSTAT", 0x04, 0x04 },
@@ -1423,14 +1214,7 @@ ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5b, regvalue, cur_col, wrap));
}
-int
-ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CURRSCB",
- 0x5c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
{ "ENCFG4TCMD", 0x01, 0x01 },
{ "ENCFG4ICMD", 0x02, 0x02 },
{ "ENCFG4TSTAT", 0x04, 0x04 },
@@ -1447,7 +1231,14 @@ ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
+int
+ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+ return (ahd_print_register(NULL, 0, "CURRSCB",
+ 0x5c, regvalue, cur_col, wrap));
+}
+
+static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
{ "FIFOFREE", 0x01, 0x01 },
{ "DATAINFIFO", 0x02, 0x02 },
{ "DLZERO", 0x04, 0x04 },
@@ -1464,24 +1255,6 @@ ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5d, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CRCCONTROL_parse_table[] = {
- { "CRCVALCHKEN", 0x40, 0x40 }
-};
-
-int
-ahd_crccontrol_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CRCCONTROL_parse_table, 1, "CRCCONTROL",
- 0x5d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfftag_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFFTAG",
- 0x5e, regvalue, cur_col, wrap));
-}
-
int
ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1489,31 +1262,6 @@ ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5e, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSITEST_parse_table[] = {
- { "SEL_TXPLL_DEBUG", 0x04, 0x04 },
- { "CNTRTEST", 0x08, 0x08 }
-};
-
-int
-ahd_scsitest_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SCSITEST_parse_table, 2, "SCSITEST",
- 0x5e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t IOPDNCTL_parse_table[] = {
- { "PDN_DIFFSENSE", 0x01, 0x01 },
- { "PDN_IDIST", 0x04, 0x04 },
- { "DISABLE_OE", 0x80, 0x80 }
-};
-
-int
-ahd_iopdnctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(IOPDNCTL_parse_table, 3, "IOPDNCTL",
- 0x5f, regvalue, cur_col, wrap));
-}
-
int
ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1529,13 +1277,6 @@ ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_dgrpcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DGRPCRCI",
- 0x60, regvalue, cur_col, wrap));
-}
-
-int
ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "NEGPERIOD",
@@ -1543,20 +1284,13 @@ ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_packcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PACKCRCI",
- 0x62, regvalue, cur_col, wrap));
-}
-
-int
ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "NEGOFFSET",
0x62, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
+static const ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
{ "PPROPT_IUT", 0x01, 0x01 },
{ "PPROPT_DT", 0x02, 0x02 },
{ "PPROPT_QAS", 0x04, 0x04 },
@@ -1570,7 +1304,7 @@ ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x63, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
+static const ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
{ "WIDEXFER", 0x01, 0x01 },
{ "ENAUTOATNO", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
@@ -1601,20 +1335,21 @@ ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x66, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
{ "LSTSGCLRDIS", 0x01, 0x01 },
{ "SHVALIDSTDIS", 0x02, 0x02 },
{ "DFFACTCLR", 0x04, 0x04 },
{ "SDONEMSKDIS", 0x08, 0x08 },
{ "WIDERESEN", 0x10, 0x10 },
{ "CURRFIFODEF", 0x20, 0x20 },
- { "STSELSKIDDIS", 0x40, 0x40 }
+ { "STSELSKIDDIS", 0x40, 0x40 },
+ { "BIDICHKDIS", 0x80, 0x80 }
};
int
ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(SCSCHKN_parse_table, 7, "SCSCHKN",
+ return (ahd_print_register(SCSCHKN_parse_table, 8, "SCSCHKN",
0x66, regvalue, cur_col, wrap));
}
@@ -1625,23 +1360,6 @@ ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x67, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PLL960CTL0_parse_table[] = {
- { "PLL_ENFBM", 0x01, 0x01 },
- { "PLL_DLPF", 0x02, 0x02 },
- { "PLL_ENLPF", 0x04, 0x04 },
- { "PLL_ENLUD", 0x08, 0x08 },
- { "PLL_NS", 0x30, 0x30 },
- { "PLL_PWDN", 0x40, 0x40 },
- { "PLL_VCOSEL", 0x80, 0x80 }
-};
-
-int
-ahd_pll960ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL960CTL0_parse_table, 7, "PLL960CTL0",
- 0x68, regvalue, cur_col, wrap));
-}
-
int
ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1656,33 +1374,6 @@ ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x69, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PLL960CTL1_parse_table[] = {
- { "PLL_RST", 0x01, 0x01 },
- { "PLL_CNTCLR", 0x40, 0x40 },
- { "PLL_CNTEN", 0x80, 0x80 }
-};
-
-int
-ahd_pll960ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL960CTL1_parse_table, 3, "PLL960CTL1",
- 0x69, regvalue, cur_col, wrap));
-}
-
-int
-ahd_pll960cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PLL960CNT0",
- 0x6a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_xsig_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "XSIG",
- 0x6a, regvalue, cur_col, wrap));
-}
-
int
ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1690,57 +1381,6 @@ ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x6b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PLL400CTL0_parse_table[] = {
- { "PLL_ENFBM", 0x01, 0x01 },
- { "PLL_DLPF", 0x02, 0x02 },
- { "PLL_ENLPF", 0x04, 0x04 },
- { "PLL_ENLUD", 0x08, 0x08 },
- { "PLL_NS", 0x30, 0x30 },
- { "PLL_PWDN", 0x40, 0x40 },
- { "PLL_VCOSEL", 0x80, 0x80 }
-};
-
-int
-ahd_pll400ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL400CTL0_parse_table, 7, "PLL400CTL0",
- 0x6c, regvalue, cur_col, wrap));
-}
-
-int
-ahd_fairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FAIRNESS",
- 0x6c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PLL400CTL1_parse_table[] = {
- { "PLL_RST", 0x01, 0x01 },
- { "PLL_CNTCLR", 0x40, 0x40 },
- { "PLL_CNTEN", 0x80, 0x80 }
-};
-
-int
-ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLL400CTL1_parse_table, 3, "PLL400CTL1",
- 0x6d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "UNFAIRNESS",
- 0x6e, regvalue, cur_col, wrap));
-}
-
-int
-ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "PLL400CNT0",
- 0x6e, regvalue, cur_col, wrap));
-}
-
int
ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1748,31 +1388,6 @@ ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x70, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
- { "SPLIT_DROP_REQ", 0x80, 0x80 }
-};
-
-int
-ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
- 0x70, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HODMAADR",
- 0x70, regvalue, cur_col, wrap));
-}
-
-int
-ahd_hodmacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "HODMACNT",
- 0x78, regvalue, cur_col, wrap));
-}
-
int
ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -1781,10 +1396,10 @@ ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "HODMAEN",
- 0x7a, regvalue, cur_col, wrap));
+ return (ahd_print_register(NULL, 0, "SGHADDR",
+ 0x7c, regvalue, cur_col, wrap));
}
int
@@ -1795,10 +1410,10 @@ ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "SGHADDR",
- 0x7c, regvalue, cur_col, wrap));
+ return (ahd_print_register(NULL, 0, "SGHCNT",
+ 0x84, regvalue, cur_col, wrap));
}
int
@@ -1808,14 +1423,7 @@ ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x84, regvalue, cur_col, wrap));
}
-int
-ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SGHCNT",
- 0x84, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
+static const ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
{ "WR_DFTHRSH_MIN", 0x00, 0x70 },
{ "RD_DFTHRSH_MIN", 0x00, 0x07 },
{ "RD_DFTHRSH_25", 0x01, 0x07 },
@@ -1843,209 +1451,7 @@ ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x88, regvalue, cur_col, wrap));
}
-int
-ahd_romaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ROMADDR",
- 0x8a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t ROMCNTRL_parse_table[] = {
- { "RDY", 0x01, 0x01 },
- { "REPEAT", 0x02, 0x02 },
- { "ROMSPD", 0x18, 0x18 },
- { "ROMOP", 0xe0, 0xe0 }
-};
-
-int
-ahd_romcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ROMCNTRL_parse_table, 4, "ROMCNTRL",
- 0x8d, regvalue, cur_col, wrap));
-}
-
-int
-ahd_romdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "ROMDATA",
- 0x8e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_cmcrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG0_parse_table, 2, "CMCRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t ROENABLE_parse_table[] = {
- { "DCH0ROEN", 0x01, 0x01 },
- { "DCH1ROEN", 0x02, 0x02 },
- { "SGROEN", 0x04, 0x04 },
- { "CMCROEN", 0x08, 0x08 },
- { "OVLYROEN", 0x10, 0x10 },
- { "MSIROEN", 0x20, 0x20 }
-};
-
-int
-ahd_roenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(ROENABLE_parse_table, 6, "ROENABLE",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_ovlyrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG0_parse_table, 2, "OVLYRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_dchrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG0_parse_table, 2, "DCHRXMSG0",
- 0x90, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_ovlyrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG1_parse_table, 1, "OVLYRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t NSENABLE_parse_table[] = {
- { "DCH0NSEN", 0x01, 0x01 },
- { "DCH1NSEN", 0x02, 0x02 },
- { "SGNSEN", 0x04, 0x04 },
- { "CMCNSEN", 0x08, 0x08 },
- { "OVLYNSEN", 0x10, 0x10 },
- { "MSINSEN", 0x20, 0x20 }
-};
-
-int
-ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NSENABLE_parse_table, 6, "NSENABLE",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
- 0x91, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG2_parse_table, 1, "DCHRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_cmcrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG2_parse_table, 1, "CMCRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OST",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
- 0x92, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DCHRXMSG3_parse_table, 1, "DCHRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_cmcrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCRXMSG3_parse_table, 1, "CMCRXMSG3",
- 0x93, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
{ "CMPABCDIS", 0x01, 0x01 },
{ "TSCSERREN", 0x02, 0x02 },
{ "SRSPDPEEN", 0x04, 0x04 },
@@ -2062,46 +1468,7 @@ ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x93, regvalue, cur_col, wrap));
}
-int
-ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OVLYSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-int
-ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
- 0x94, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCSPLTSTAT0_parse_table, 8, "CMCSPLTSTAT0",
- 0x96, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
{ "RXSPLTRSP", 0x01, 0x01 },
{ "RXSCEMSG", 0x02, 0x02 },
{ "RXOVRUN", 0x04, 0x04 },
@@ -2119,47 +1486,7 @@ ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x96, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
- { "RXSPLTRSP", 0x01, 0x01 },
- { "RXSCEMSG", 0x02, 0x02 },
- { "RXOVRUN", 0x04, 0x04 },
- { "CNTNOTCMPLT", 0x08, 0x08 },
- { "SCDATBUCKET", 0x10, 0x10 },
- { "SCADERR", 0x20, 0x20 },
- { "SCBCERR", 0x40, 0x40 },
- { "STAETERM", 0x80, 0x80 }
-};
-
-int
-ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
- 0x96, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
- 0x97, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
- { "RXDATABUCKET", 0x01, 0x01 }
-};
-
-int
-ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
- 0x97, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
{ "RXDATABUCKET", 0x01, 0x01 }
};
@@ -2170,139 +1497,7 @@ ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x97, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SGRXMSG0_parse_table[] = {
- { "CFNUM", 0x07, 0x07 },
- { "CDNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_sgrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG0_parse_table, 2, "SGRXMSG0",
- 0x98, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR0_parse_table[] = {
- { "LOWER_ADDR", 0x7f, 0x7f }
-};
-
-int
-ahd_slvspltoutadr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR0_parse_table, 1, "SLVSPLTOUTADR0",
- 0x98, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG1_parse_table[] = {
- { "CBNUM", 0xff, 0xff }
-};
-
-int
-ahd_sgrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG1_parse_table, 1, "SGRXMSG1",
- 0x99, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR1_parse_table[] = {
- { "REQ_FNUM", 0x07, 0x07 },
- { "REQ_DNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_slvspltoutadr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR1_parse_table, 2, "SLVSPLTOUTADR1",
- 0x99, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG2_parse_table[] = {
- { "MINDEX", 0xff, 0xff }
-};
-
-int
-ahd_sgrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG2_parse_table, 1, "SGRXMSG2",
- 0x9a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR2_parse_table[] = {
- { "REQ_BNUM", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutadr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR2_parse_table, 1, "SLVSPLTOUTADR2",
- 0x9a, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGRXMSG3_parse_table[] = {
- { "MCLASS", 0x0f, 0x0f }
-};
-
-int
-ahd_sgrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGRXMSG3_parse_table, 1, "SGRXMSG3",
- 0x9b, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTADR3_parse_table[] = {
- { "RLXORD", 0x10, 0x10 },
- { "TAG_NUM", 0x1f, 0x1f }
-};
-
-int
-ahd_slvspltoutadr3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTADR3_parse_table, 2, "SLVSPLTOUTADR3",
- 0x9b, regvalue, cur_col, wrap));
-}
-
-int
-ahd_sgseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SGSEQBCNT",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR0_parse_table[] = {
- { "LOWER_BCNT", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutattr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR0_parse_table, 1, "SLVSPLTOUTATTR0",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR1_parse_table[] = {
- { "CMPLT_FNUM", 0x07, 0x07 },
- { "CMPLT_DNUM", 0xf8, 0xf8 }
-};
-
-int
-ahd_slvspltoutattr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR1_parse_table, 2, "SLVSPLTOUTATTR1",
- 0x9d, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SLVSPLTOUTATTR2_parse_table[] = {
- { "CMPLT_BNUM", 0xff, 0xff }
-};
-
-int
-ahd_slvspltoutattr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SLVSPLTOUTATTR2_parse_table, 1, "SLVSPLTOUTATTR2",
- 0x9e, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
+static const ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
{ "RXSPLTRSP", 0x01, 0x01 },
{ "RXSCEMSG", 0x02, 0x02 },
{ "RXOVRUN", 0x04, 0x04 },
@@ -2320,7 +1515,7 @@ ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x9e, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
+static const ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
{ "RXDATABUCKET", 0x01, 0x01 }
};
@@ -2331,19 +1526,7 @@ ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x9f, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
- { "TEST_NUM", 0x0f, 0x0f },
- { "TEST_GROUP", 0xf0, 0xf0 }
-};
-
-int
-ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
- 0x9f, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
{ "DPR", 0x01, 0x01 },
{ "TWATERR", 0x02, 0x02 },
{ "RDPERR", 0x04, 0x04 },
@@ -2368,83 +1551,6 @@ ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xa0, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DF1PCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_df1pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DF1PCISTAT_parse_table, 8, "DF1PCISTAT",
- 0xa1, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SGPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_sgpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SGPCISTAT_parse_table, 7, "SGPCISTAT",
- 0xa2, regvalue, cur_col, wrap));
-}
-
-int
-ahd_reg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "REG1",
- 0xa2, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CMCPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_cmcpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMCPCISTAT_parse_table, 8, "CMCPCISTAT",
- 0xa3, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t OVLYPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "RDPERR", 0x04, 0x04 },
- { "SCAAPERR", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 },
- { "DPE", 0x80, 0x80 }
-};
-
-int
-ahd_ovlypcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(OVLYPCISTAT_parse_table, 7, "OVLYPCISTAT",
- 0xa4, regvalue, cur_col, wrap));
-}
-
int
ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -2452,7 +1558,7 @@ ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xa4, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
+static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
{ "SEGS_AVAIL", 0x01, 0x01 },
{ "LOADING_NEEDED", 0x02, 0x02 },
{ "FETCH_INPROG", 0x04, 0x04 }
@@ -2465,23 +1571,7 @@ ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xa6, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t MSIPCISTAT_parse_table[] = {
- { "DPR", 0x01, 0x01 },
- { "TWATERR", 0x02, 0x02 },
- { "CLRPENDMSI", 0x08, 0x08 },
- { "RTA", 0x10, 0x10 },
- { "RMA", 0x20, 0x20 },
- { "SSE", 0x40, 0x40 }
-};
-
-int
-ahd_msipcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(MSIPCISTAT_parse_table, 6, "MSIPCISTAT",
- 0xa6, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
{ "TWATERR", 0x02, 0x02 },
{ "STA", 0x08, 0x08 },
{ "SSE", 0x40, 0x40 },
@@ -2496,27 +1586,13 @@ ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_data_count_odd_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DATA_COUNT_ODD",
- 0xa7, regvalue, cur_col, wrap));
-}
-
-int
ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SCBPTR",
0xa8, regvalue, cur_col, wrap));
}
-int
-ahd_ccscbacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBACNT",
- 0xab, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
+static const ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
{ "SCBPTR_OFF", 0x07, 0x07 },
{ "SCBPTR_ADDR", 0x38, 0x38 },
{ "AUSCBPTR_EN", 0x80, 0x80 }
@@ -2537,36 +1613,13 @@ ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
- 0xac, regvalue, cur_col, wrap));
-}
-
-int
ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "CCSCBADDR",
0xac, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CMC_RAMBIST_parse_table[] = {
- { "CMC_BUFFER_BIST_EN", 0x01, 0x01 },
- { "CMC_BUFFER_BIST_FAIL",0x02, 0x02 },
- { "SG_BIST_EN", 0x10, 0x10 },
- { "SG_BIST_FAIL", 0x20, 0x20 },
- { "SCBRAMBIST_FAIL", 0x40, 0x40 },
- { "SG_ELEMENT_SIZE", 0x80, 0x80 }
-};
-
-int
-ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(CMC_RAMBIST_parse_table, 6, "CMC_RAMBIST",
- 0xad, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
{ "CCSCBRESET", 0x01, 0x01 },
{ "CCSCBDIR", 0x04, 0x04 },
{ "CCSCBEN", 0x08, 0x08 },
@@ -2582,7 +1635,7 @@ ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xad, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
{ "CCSGRESET", 0x01, 0x01 },
{ "SG_FETCH_REQ", 0x02, 0x02 },
{ "CCSGENACK", 0x08, 0x08 },
@@ -2606,13 +1659,6 @@ ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_flexadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXADR",
- 0xb0, regvalue, cur_col, wrap));
-}
-
-int
ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "CCSCBRAM",
@@ -2620,39 +1666,13 @@ ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_flexcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXCNT",
- 0xb3, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t FLEXDMASTAT_parse_table[] = {
- { "FLEXDMADONE", 0x01, 0x01 },
- { "FLEXDMAERR", 0x02, 0x02 }
-};
-
-int
-ahd_flexdmastat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(FLEXDMASTAT_parse_table, 2, "FLEXDMASTAT",
- 0xb5, regvalue, cur_col, wrap));
-}
-
-int
-ahd_flexdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FLEXDATA",
- 0xb6, regvalue, cur_col, wrap));
-}
-
-int
ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "BRDDAT",
0xb8, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
{ "BRDSTB", 0x01, 0x01 },
{ "BRDRW", 0x02, 0x02 },
{ "BRDEN", 0x04, 0x04 },
@@ -2682,7 +1702,7 @@ ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xbc, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEECTL_parse_table[] = {
+static const ahd_reg_parse_entry_t SEECTL_parse_table[] = {
{ "SEEOP_ERAL", 0x40, 0x70 },
{ "SEEOP_WRITE", 0x50, 0x70 },
{ "SEEOP_READ", 0x60, 0x70 },
@@ -2702,7 +1722,7 @@ ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xbe, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
+static const ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
{ "SEESTART", 0x01, 0x01 },
{ "SEEBUSY", 0x02, 0x02 },
{ "SEEARBACK", 0x04, 0x04 },
@@ -2718,34 +1738,7 @@ ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xbe, regvalue, cur_col, wrap));
}
-int
-ahd_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCBCNT",
- 0xbf, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFWADDR",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPFLTRCTL_parse_table[] = {
- { "DSPFCNTSEL", 0x0f, 0x0f },
- { "EDGESENSE", 0x10, 0x10 },
- { "FLTRDISABLE", 0x20, 0x20 }
-};
-
-int
-ahd_dspfltrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPFLTRCTL_parse_table, 3, "DSPFLTRCTL",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
+static const ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
{ "XMITOFFSTDIS", 0x02, 0x02 },
{ "RCVROFFSTDIS", 0x04, 0x04 },
{ "DESQDIS", 0x10, 0x10 },
@@ -2760,44 +1753,13 @@ ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFRADDR",
- 0xc2, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPREQCTL_parse_table[] = {
- { "MANREQDLY", 0x3f, 0x3f },
- { "MANREQCTL", 0xc0, 0xc0 }
-};
-
-int
-ahd_dspreqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPREQCTL_parse_table, 2, "DSPREQCTL",
- 0xc2, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DSPACKCTL_parse_table[] = {
- { "MANACKDLY", 0x3f, 0x3f },
- { "MANACKCTL", 0xc0, 0xc0 }
-};
-
-int
-ahd_dspackctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DSPACKCTL_parse_table, 2, "DSPACKCTL",
- 0xc3, regvalue, cur_col, wrap));
-}
-
-int
ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "DFDAT",
0xc4, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
+static const ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
{ "DSPSEL", 0x1f, 0x1f },
{ "AUTOINCEN", 0x80, 0x80 }
};
@@ -2809,7 +1771,7 @@ ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xc4, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
{ "XMITMANVAL", 0x3f, 0x3f },
{ "AUTOXBCDIS", 0x80, 0x80 }
};
@@ -2821,91 +1783,7 @@ ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xc5, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t RCVRBIOSCTL_parse_table[] = {
- { "RCVRMANVAL", 0x3f, 0x3f },
- { "AUTORBCDIS", 0x80, 0x80 }
-};
-
-int
-ahd_rcvrbiosctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(RCVRBIOSCTL_parse_table, 2, "RCVRBIOSCTL",
- 0xc6, regvalue, cur_col, wrap));
-}
-
-int
-ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "WRTBIASCALC",
- 0xc7, regvalue, cur_col, wrap));
-}
-
-int
-ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
- 0xc8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFPTRS",
- 0xc8, regvalue, cur_col, wrap));
-}
-
-int
-ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SKEWCALC",
- 0xc9, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFBKPTR",
- 0xc9, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t DFDBCTL_parse_table[] = {
- { "DFF_RAMBIST_EN", 0x01, 0x01 },
- { "DFF_RAMBIST_DONE", 0x02, 0x02 },
- { "DFF_RAMBIST_FAIL", 0x04, 0x04 },
- { "DFF_DIR_ERR", 0x08, 0x08 },
- { "DFF_CIO_RD_RDY", 0x10, 0x10 },
- { "DFF_CIO_WR_RDY", 0x20, 0x20 }
-};
-
-int
-ahd_dfdbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(DFDBCTL_parse_table, 6, "DFDBCTL",
- 0xcb, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfscnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFSCNT",
- 0xcc, regvalue, cur_col, wrap));
-}
-
-int
-ahd_dfbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "DFBCNT",
- 0xce, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ovlyaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "OVLYADDR",
- 0xd4, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
{ "LOADRAM", 0x01, 0x01 },
{ "SEQRESET", 0x02, 0x02 },
{ "STEP", 0x04, 0x04 },
@@ -2923,21 +1801,7 @@ ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xd6, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQCTL1_parse_table[] = {
- { "RAMBIST_EN", 0x01, 0x01 },
- { "RAMBIST_FAIL", 0x02, 0x02 },
- { "RAMBIST_DONE", 0x04, 0x04 },
- { "OVRLAY_DATA_CHK", 0x08, 0x08 }
-};
-
-int
-ahd_seqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(SEQCTL1_parse_table, 4, "SEQCTL1",
- 0xd7, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t FLAGS_parse_table[] = {
+static const ahd_reg_parse_entry_t FLAGS_parse_table[] = {
{ "CARRY", 0x01, 0x01 },
{ "ZERO", 0x02, 0x02 }
};
@@ -2949,7 +1813,7 @@ ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xd8, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
{ "IRET", 0x01, 0x01 },
{ "INTMASK1", 0x02, 0x02 },
{ "INTMASK2", 0x04, 0x04 },
@@ -3002,24 +1866,6 @@ ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "BRKADDR0",
- 0xe6, regvalue, cur_col, wrap));
-}
-
-static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
- { "BRKDIS", 0x80, 0x80 }
-};
-
-int
-ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(BRKADDR1_parse_table, 1, "BRKADDR1",
- 0xe6, regvalue, cur_col, wrap));
-}
-
-int
ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "ALLONES",
@@ -3055,13 +1901,6 @@ ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "FUNCTION1",
- 0xf0, regvalue, cur_col, wrap));
-}
-
-int
ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "STACK",
@@ -3083,13 +1922,6 @@ ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "LASTADDR",
- 0xf6, regvalue, cur_col, wrap));
-}
-
-int
ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
@@ -3111,23 +1943,16 @@ ahd_accum_save_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
- 0x100, regvalue, cur_col, wrap));
-}
-
-int
-ahd_ahd_pci_config_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE",
+ return (ahd_print_register(NULL, 0, "SRAM_BASE",
0x100, regvalue, cur_col, wrap));
}
int
-ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "SRAM_BASE",
+ return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
0x100, regvalue, cur_col, wrap));
}
@@ -3215,7 +2040,7 @@ ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x137, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
+static const ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
@@ -3235,7 +2060,7 @@ ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x138, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
{ "NO_DISCONNECT", 0x01, 0x01 },
{ "SPHASE_PENDING", 0x02, 0x02 },
{ "DPHASE_PENDING", 0x04, 0x04 },
@@ -3268,7 +2093,7 @@ ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x13b, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
+static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
{ "P_DATAOUT", 0x00, 0xe0 },
{ "P_DATAOUT_DT", 0x20, 0xe0 },
{ "P_DATAIN", 0x40, 0xe0 },
@@ -3326,7 +2151,7 @@ ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x144, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
+static const ahd_reg_parse_entry_t ARG_1_parse_table[] = {
{ "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
{ "CONT_MSG_LOOP_READ", 0x03, 0x03 },
{ "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
@@ -3358,7 +2183,7 @@ ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x14a, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
{ "ALTSTIM", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "MANUALP", 0x0c, 0x0c },
@@ -3381,7 +2206,7 @@ ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x14c, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
+static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
{ "PENDING_MK_MESSAGE", 0x01, 0x01 },
{ "TARGET_MSG_PENDING", 0x02, 0x02 },
{ "SELECTOUT_QFROZEN", 0x04, 0x04 }
@@ -3465,20 +2290,20 @@ ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "SCB_BASE",
+ return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
0x180, regvalue, cur_col, wrap));
}
int
-ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
- return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
+ return (ahd_print_register(NULL, 0, "SCB_BASE",
0x180, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_OVERRUN_RESID", 0x02, 0x02 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
@@ -3499,27 +2324,6 @@ ahd_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCB_TARGET_PHASES",
- 0x189, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
- 0x18a, regvalue, cur_col, wrap));
-}
-
-int
-ahd_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCB_TARGET_ITAG",
- 0x18b, regvalue, cur_col, wrap));
-}
-
-int
ahd_scb_sense_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR",
@@ -3533,7 +2337,7 @@ ahd_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x190, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
{ "SCB_TAG_TYPE", 0x03, 0x03 },
{ "DISCONNECTED", 0x04, 0x04 },
{ "STATUS_RCVD", 0x08, 0x08 },
@@ -3550,7 +2354,7 @@ ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x192, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
{ "OID", 0x0f, 0x0f },
{ "TID", 0xf0, 0xf0 }
};
@@ -3562,7 +2366,7 @@ ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x193, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
{ "LID", 0xff, 0xff }
};
@@ -3573,7 +2377,7 @@ ahd_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x194, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
{ "SCB_XFERLEN_ODD", 0x01, 0x01 }
};
@@ -3584,7 +2388,7 @@ ahd_scb_task_attribute_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x195, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
{ "SCB_CDB_LEN_PTR", 0x80, 0x80 }
};
@@ -3609,7 +2413,7 @@ ahd_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x198, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
{ "SG_LAST_SEG", 0x80, 0x80 }
};
@@ -3621,7 +2425,7 @@ ahd_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1a0, regvalue, cur_col, wrap));
}
-static ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
+static const ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_FULL_RESID", 0x02, 0x02 },
{ "SG_STATUS_VALID", 0x04, 0x04 }
@@ -3656,13 +2460,6 @@ ahd_scb_next2_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahd_scb_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahd_print_register(NULL, 0, "SCB_SPARE",
- 0x1b0, regvalue, cur_col, wrap));
-}
-
-int
ahd_scb_disconnected_lists_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS",
diff --git a/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped b/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
index 11bed07..4b51e23 100644
--- a/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
@@ -5,7 +5,7 @@
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
*/
-static uint8_t seqprog[] = {
+static const uint8_t seqprog[] = {
0xff, 0x02, 0x06, 0x78,
0x00, 0xea, 0x6e, 0x59,
0x01, 0xea, 0x04, 0x30,
@@ -1027,7 +1027,7 @@ ahd_patch0_func(struct ahd_softc *ahd)
return (0);
}
-static struct patch {
+static const struct patch {
ahd_patch_func_t *patch_func;
uint32_t begin :10,
skip_instr :10,
@@ -1166,7 +1166,7 @@ static struct patch {
{ ahd_patch23_func, 815, 11, 1 }
};
-static struct cs {
+static const struct cs {
uint16_t begin;
uint16_t end;
} critical_sections[] = {
diff --git a/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped b/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped
index 88bfd76..309a562 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped
+++ b/drivers/scsi/aic7xxx/aic7xxx_reg_print.c_shipped
@@ -8,7 +8,7 @@
#include "aic7xxx_osm.h"
-static ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
{ "SCSIRSTO", 0x01, 0x01 },
{ "ENAUTOATNP", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
@@ -26,7 +26,7 @@ ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x00, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
+static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
{ "CLRCHN", 0x02, 0x02 },
{ "SCAMEN", 0x04, 0x04 },
{ "SPIOEN", 0x08, 0x08 },
@@ -43,7 +43,7 @@ ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x01, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = {
+static const ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = {
{ "STPWEN", 0x01, 0x01 },
{ "ACTNEGEN", 0x02, 0x02 },
{ "ENSTIMER", 0x04, 0x04 },
@@ -60,7 +60,7 @@ ahc_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x02, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSISIGO_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISIGO_parse_table[] = {
{ "ACKO", 0x01, 0x01 },
{ "REQO", 0x02, 0x02 },
{ "BSYO", 0x04, 0x04 },
@@ -85,7 +85,7 @@ ahc_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x03, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
{ "ACKI", 0x01, 0x01 },
{ "REQI", 0x02, 0x02 },
{ "BSYI", 0x04, 0x04 },
@@ -112,7 +112,7 @@ ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x03, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
{ "SINGLE_EDGE", 0x10, 0x10 },
{ "ENABLE_CRC", 0x40, 0x40 },
{ "WIDEXFER", 0x80, 0x80 },
@@ -128,7 +128,7 @@ ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x04, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIID_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIID_parse_table[] = {
{ "TWIN_CHNLB", 0x80, 0x80 },
{ "OID", 0x0f, 0x0f },
{ "TWIN_TID", 0x70, 0x70 },
@@ -151,20 +151,13 @@ ahc_scsidatl_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_scsidath_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCSIDATH",
- 0x07, regvalue, cur_col, wrap));
-}
-
-int
ahc_stcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "STCNT",
0x08, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = {
+static const ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = {
{ "DIS_MSGIN_DUALEDGE", 0x01, 0x01 },
{ "AUTO_MSGOUT_DE", 0x02, 0x02 },
{ "SCSIDATL_IMGEN", 0x04, 0x04 },
@@ -190,7 +183,7 @@ ahc_targcrccnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CLRSINT0_parse_table[] = {
+static const ahc_reg_parse_entry_t CLRSINT0_parse_table[] = {
{ "CLRSPIORDY", 0x02, 0x02 },
{ "CLRSWRAP", 0x08, 0x08 },
{ "CLRIOERR", 0x08, 0x08 },
@@ -206,7 +199,7 @@ ahc_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "DMADONE", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 },
{ "SDONE", 0x04, 0x04 },
@@ -225,7 +218,7 @@ ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CLRSINT1_parse_table[] = {
+static const ahc_reg_parse_entry_t CLRSINT1_parse_table[] = {
{ "CLRREQINIT", 0x01, 0x01 },
{ "CLRPHASECHG", 0x02, 0x02 },
{ "CLRSCSIPERR", 0x04, 0x04 },
@@ -242,7 +235,7 @@ ahc_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0c, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 },
{ "PHASECHG", 0x02, 0x02 },
{ "SCSIPERR", 0x04, 0x04 },
@@ -260,7 +253,7 @@ ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0c, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
{ "DUAL_EDGE_ERR", 0x01, 0x01 },
{ "CRCREQERR", 0x02, 0x02 },
{ "CRCENDERR", 0x04, 0x04 },
@@ -278,7 +271,7 @@ ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
+static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
{ "OFFCNT", 0x0f, 0x0f },
{ "U2OFFCNT", 0x7f, 0x7f },
{ "SCSICNT", 0xf0, 0xf0 }
@@ -291,7 +284,7 @@ ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = {
{ "OID", 0x0f, 0x0f },
{ "TID", 0xf0, 0xf0 }
};
@@ -303,7 +296,7 @@ ahc_scsiid_ultra2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x0f, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
+static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENDMADONE", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENSDONE", 0x04, 0x04 },
@@ -321,7 +314,7 @@ ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x10, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
+static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
{ "ENREQINIT", 0x01, 0x01 },
{ "ENPHASECHG", 0x02, 0x02 },
{ "ENSCSIPERR", 0x04, 0x04 },
@@ -347,33 +340,13 @@ ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_scsibush_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCSIBUSH",
- 0x13, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SXFRCTL2_parse_table[] = {
- { "CMDDMAEN", 0x08, 0x08 },
- { "AUTORSTDIS", 0x10, 0x10 },
- { "ASYNC_SETUP", 0x07, 0x07 }
-};
-
-int
-ahc_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
- 0x13, regvalue, cur_col, wrap));
-}
-
-int
ahc_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "SHADDR",
0x14, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SELTIMER_parse_table[] = {
+static const ahc_reg_parse_entry_t SELTIMER_parse_table[] = {
{ "STAGE1", 0x01, 0x01 },
{ "STAGE2", 0x02, 0x02 },
{ "STAGE3", 0x04, 0x04 },
@@ -389,7 +362,7 @@ ahc_seltimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x18, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SELID_parse_table[] = {
+static const ahc_reg_parse_entry_t SELID_parse_table[] = {
{ "ONEBIT", 0x08, 0x08 },
{ "SELID_MASK", 0xf0, 0xf0 }
};
@@ -401,21 +374,6 @@ ahc_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x19, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCAMCTL_parse_table[] = {
- { "DFLTTID", 0x10, 0x10 },
- { "ALTSTIM", 0x20, 0x20 },
- { "CLRSCAMSELID", 0x40, 0x40 },
- { "ENSCAMSELO", 0x80, 0x80 },
- { "SCAMLVL", 0x03, 0x03 }
-};
-
-int
-ahc_scamctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(SCAMCTL_parse_table, 5, "SCAMCTL",
- 0x1a, regvalue, cur_col, wrap));
-}
-
int
ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
@@ -423,7 +381,7 @@ ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SPIOCAP_parse_table[] = {
+static const ahc_reg_parse_entry_t SPIOCAP_parse_table[] = {
{ "SSPIOCPS", 0x01, 0x01 },
{ "ROM", 0x02, 0x02 },
{ "EEPROM", 0x04, 0x04 },
@@ -441,7 +399,7 @@ ahc_spiocap_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t BRDCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t BRDCTL_parse_table[] = {
{ "BRDCTL0", 0x01, 0x01 },
{ "BRDSTB_ULTRA2", 0x01, 0x01 },
{ "BRDCTL1", 0x02, 0x02 },
@@ -464,7 +422,7 @@ ahc_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEECTL_parse_table[] = {
+static const ahc_reg_parse_entry_t SEECTL_parse_table[] = {
{ "SEEDI", 0x01, 0x01 },
{ "SEEDO", 0x02, 0x02 },
{ "SEECK", 0x04, 0x04 },
@@ -482,7 +440,7 @@ ahc_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x1e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
{ "XCVR", 0x01, 0x01 },
{ "SELWIDE", 0x02, 0x02 },
{ "ENAB20", 0x04, 0x04 },
@@ -522,13 +480,6 @@ ahc_disc_dsb_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_cmdsize_table_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "CMDSIZE_TABLE_TAIL",
- 0x34, regvalue, cur_col, wrap));
-}
-
-int
ahc_mwi_residual_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "MWI_RESIDUAL",
@@ -549,7 +500,7 @@ ahc_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
+static const ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
@@ -569,7 +520,7 @@ ahc_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3b, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
{ "NO_DISCONNECT", 0x01, 0x01 },
{ "SPHASE_PENDING", 0x02, 0x02 },
{ "DPHASE_PENDING", 0x04, 0x04 },
@@ -602,7 +553,7 @@ ahc_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x3e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
+static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
{ "MSGI", 0x20, 0x20 },
{ "IOI", 0x40, 0x40 },
{ "CDI", 0x80, 0x80 },
@@ -645,13 +596,6 @@ ahc_free_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_complete_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "COMPLETE_SCBH",
- 0x43, regvalue, cur_col, wrap));
-}
-
-int
ahc_hscb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "HSCB_ADDR",
@@ -700,7 +644,7 @@ ahc_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x50, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t ARG_1_parse_table[] = {
+static const ahc_reg_parse_entry_t ARG_1_parse_table[] = {
{ "CONT_TARG_SESSION", 0x02, 0x02 },
{ "CONT_MSG_LOOP", 0x04, 0x04 },
{ "EXIT_MSG_LOOP", 0x08, 0x08 },
@@ -731,7 +675,7 @@ ahc_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x53, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
{ "ENAUTOATNP", 0x02, 0x02 },
{ "ENAUTOATNI", 0x04, 0x04 },
{ "ENAUTOATNO", 0x08, 0x08 },
@@ -747,7 +691,7 @@ ahc_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x54, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
+static const ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
{ "HA_274_EXTENDED_TRANS",0x01, 0x01 }
};
@@ -758,7 +702,7 @@ ahc_ha_274_biosglobal_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x56, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
{ "SCB_DMA", 0x01, 0x01 },
{ "TARGET_MSG_PENDING", 0x02, 0x02 }
};
@@ -770,7 +714,7 @@ ahc_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x57, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
{ "ENSPCHK", 0x20, 0x20 },
{ "RESET_SCSI", 0x40, 0x40 },
{ "TERM_ENB", 0x80, 0x80 },
@@ -785,7 +729,7 @@ ahc_scsiconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t INTDEF_parse_table[] = {
+static const ahc_reg_parse_entry_t INTDEF_parse_table[] = {
{ "EDGE_TRIG", 0x80, 0x80 },
{ "VECTOR", 0x0f, 0x0f }
};
@@ -804,7 +748,7 @@ ahc_hostconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
+static const ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
{ "CHANNEL_B_PRIMARY", 0x08, 0x08 },
{ "BIOSMODE", 0x30, 0x30 },
{ "BIOSDISABLED", 0x30, 0x30 }
@@ -817,7 +761,7 @@ ahc_ha_274_biosctrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x5f, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
{ "LOADRAM", 0x01, 0x01 },
{ "SEQRESET", 0x02, 0x02 },
{ "STEP", 0x04, 0x04 },
@@ -849,7 +793,7 @@ ahc_seqaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x62, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SEQADDR1_parse_table[] = {
+static const ahc_reg_parse_entry_t SEQADDR1_parse_table[] = {
{ "SEQADDR1_MASK", 0x01, 0x01 }
};
@@ -902,7 +846,7 @@ ahc_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x6a, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t FLAGS_parse_table[] = {
+static const ahc_reg_parse_entry_t FLAGS_parse_table[] = {
{ "CARRY", 0x01, 0x01 },
{ "ZERO", 0x02, 0x02 }
};
@@ -929,13 +873,6 @@ ahc_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "FUNCTION1",
- 0x6e, regvalue, cur_col, wrap));
-}
-
-int
ahc_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "STACK",
@@ -956,19 +893,7 @@ ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x70, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t BCTL_parse_table[] = {
- { "ENABLE", 0x01, 0x01 },
- { "ACE", 0x08, 0x08 }
-};
-
-int
-ahc_bctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(BCTL_parse_table, 2, "BCTL",
- 0x84, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
+static const ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
{ "CIOPARCKEN", 0x01, 0x01 },
{ "USCBSIZE32", 0x02, 0x02 },
{ "RAMPS", 0x04, 0x04 },
@@ -986,7 +911,7 @@ ahc_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x84, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t BUSTIME_parse_table[] = {
+static const ahc_reg_parse_entry_t BUSTIME_parse_table[] = {
{ "BON", 0x0f, 0x0f },
{ "BOFF", 0xf0, 0xf0 }
};
@@ -998,7 +923,7 @@ ahc_bustime_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x85, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = {
+static const ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = {
{ "HADDLDSEL0", 0x01, 0x01 },
{ "HADDLDSEL1", 0x02, 0x02 },
{ "DSLATT", 0xfc, 0xfc }
@@ -1011,7 +936,7 @@ ahc_dscommand1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x85, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t BUSSPD_parse_table[] = {
+static const ahc_reg_parse_entry_t BUSSPD_parse_table[] = {
{ "STBON", 0x07, 0x07 },
{ "STBOFF", 0x38, 0x38 },
{ "DFTHRSH_75", 0x80, 0x80 },
@@ -1026,7 +951,7 @@ ahc_busspd_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x86, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
+static const ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
{ "SEQ_MAILBOX", 0x0f, 0x0f },
{ "HOST_TQINPOS", 0x80, 0x80 },
{ "HOST_MAILBOX", 0xf0, 0xf0 }
@@ -1039,7 +964,7 @@ ahc_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x86, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = {
+static const ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = {
{ "DFTHRSH_100", 0xc0, 0xc0 }
};
@@ -1050,7 +975,7 @@ ahc_dspcistatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x86, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t HCNTRL_parse_table[] = {
+static const ahc_reg_parse_entry_t HCNTRL_parse_table[] = {
{ "CHIPRST", 0x01, 0x01 },
{ "CHIPRSTACK", 0x01, 0x01 },
{ "INTEN", 0x02, 0x02 },
@@ -1088,7 +1013,7 @@ ahc_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x90, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t INTSTAT_parse_table[] = {
+static const ahc_reg_parse_entry_t INTSTAT_parse_table[] = {
{ "SEQINT", 0x01, 0x01 },
{ "CMDCMPLT", 0x02, 0x02 },
{ "SCSIINT", 0x04, 0x04 },
@@ -1119,7 +1044,7 @@ ahc_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x91, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CLRINT_parse_table[] = {
+static const ahc_reg_parse_entry_t CLRINT_parse_table[] = {
{ "CLRSEQINT", 0x01, 0x01 },
{ "CLRCMDINT", 0x02, 0x02 },
{ "CLRSCSIINT", 0x04, 0x04 },
@@ -1134,7 +1059,7 @@ ahc_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x92, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t ERROR_parse_table[] = {
+static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
{ "ILLHADDR", 0x01, 0x01 },
{ "ILLSADDR", 0x02, 0x02 },
{ "ILLOPCODE", 0x04, 0x04 },
@@ -1152,7 +1077,7 @@ ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x92, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
+static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
{ "FIFORESET", 0x01, 0x01 },
{ "FIFOFLUSH", 0x02, 0x02 },
{ "DIRECTION", 0x04, 0x04 },
@@ -1172,7 +1097,7 @@ ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x93, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
+static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
{ "FIFOEMP", 0x01, 0x01 },
{ "FIFOFULL", 0x02, 0x02 },
{ "DFTHRESH", 0x04, 0x04 },
@@ -1198,20 +1123,13 @@ ahc_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "DFRADDR",
- 0x97, regvalue, cur_col, wrap));
-}
-
-int
ahc_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "DFDAT",
0x99, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCBCNT_parse_table[] = {
+static const ahc_reg_parse_entry_t SCBCNT_parse_table[] = {
{ "SCBAUTO", 0x80, 0x80 },
{ "SCBCNT_MASK", 0x1f, 0x1f }
};
@@ -1231,20 +1149,13 @@ ahc_qinfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
}
int
-ahc_qincnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QINCNT",
- 0x9c, regvalue, cur_col, wrap));
-}
-
-int
ahc_qoutfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahc_print_register(NULL, 0, "QOUTFIFO",
0x9d, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = {
+static const ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = {
{ "TARGCRCCNTEN", 0x04, 0x04 },
{ "TARGCRCENDEN", 0x08, 0x08 },
{ "CRCREQCHKEN", 0x10, 0x10 },
@@ -1260,14 +1171,7 @@ ahc_crccontrol1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x9d, regvalue, cur_col, wrap));
}
-int
-ahc_qoutcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "QOUTCNT",
- 0x9e, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
+static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
{ "DATA_OUT_PHASE", 0x01, 0x01 },
{ "DATA_IN_PHASE", 0x02, 0x02 },
{ "MSG_OUT_PHASE", 0x04, 0x04 },
@@ -1284,7 +1188,7 @@ ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x9e, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SFUNCT_parse_table[] = {
+static const ahc_reg_parse_entry_t SFUNCT_parse_table[] = {
{ "ALT_MODE", 0x80, 0x80 }
};
@@ -1351,7 +1255,7 @@ ahc_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xac, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
{ "SG_LAST_SEG", 0x80, 0x80 },
{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f }
};
@@ -1363,7 +1267,7 @@ ahc_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xb0, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
{ "SG_LIST_NULL", 0x01, 0x01 },
{ "SG_FULL_RESID", 0x02, 0x02 },
{ "SG_RESID_VALID", 0x04, 0x04 }
@@ -1376,7 +1280,7 @@ ahc_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xb4, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
{ "DISCONNECTED", 0x04, 0x04 },
{ "ULTRAENB", 0x08, 0x08 },
{ "MK_MESSAGE", 0x10, 0x10 },
@@ -1394,7 +1298,7 @@ ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xb8, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
{ "TWIN_CHNLB", 0x80, 0x80 },
{ "OID", 0x0f, 0x0f },
{ "TWIN_TID", 0x70, 0x70 },
@@ -1408,7 +1312,7 @@ ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xb9, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
+static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
{ "SCB_XFERLEN_ODD", 0x80, 0x80 },
{ "LID", 0x3f, 0x3f }
};
@@ -1455,14 +1359,7 @@ ahc_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xbf, regvalue, cur_col, wrap));
}
-int
-ahc_scb_64_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
- return (ahc_print_register(NULL, 0, "SCB_64_SPARE",
- 0xc0, regvalue, cur_col, wrap));
-}
-
-static ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = {
+static const ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = {
{ "DO_2840", 0x01, 0x01 },
{ "CK_2840", 0x02, 0x02 },
{ "CS_2840", 0x04, 0x04 }
@@ -1475,7 +1372,7 @@ ahc_seectl_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xc0, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t STATUS_2840_parse_table[] = {
+static const ahc_reg_parse_entry_t STATUS_2840_parse_table[] = {
{ "DI_2840", 0x01, 0x01 },
{ "EEPROM_TF", 0x80, 0x80 },
{ "ADSEL", 0x1e, 0x1e },
@@ -1524,7 +1421,7 @@ ahc_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xea, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CCSGCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t CCSGCTL_parse_table[] = {
{ "CCSGRESET", 0x01, 0x01 },
{ "SG_FETCH_NEEDED", 0x02, 0x02 },
{ "CCSGEN", 0x08, 0x08 },
@@ -1552,7 +1449,7 @@ ahc_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xed, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = {
+static const ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = {
{ "CCSCBRESET", 0x01, 0x01 },
{ "CCSCBDIR", 0x04, 0x04 },
{ "CCSCBEN", 0x08, 0x08 },
@@ -1610,7 +1507,7 @@ ahc_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xf8, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
+static const ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
{ "SDSCB_ROLLOVER", 0x10, 0x10 },
{ "SNSCB_ROLLOVER", 0x20, 0x20 },
{ "SCB_AVAIL", 0x40, 0x40 },
@@ -1625,7 +1522,7 @@ ahc_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xfa, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = {
+static const ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = {
{ "RD_DFTHRSH_MIN", 0x00, 0x00 },
{ "WR_DFTHRSH_MIN", 0x00, 0x00 },
{ "RD_DFTHRSH_25", 0x01, 0x01 },
@@ -1653,7 +1550,7 @@ ahc_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xfb, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
+static const ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
{ "LAST_SEG_DONE", 0x01, 0x01 },
{ "LAST_SEG", 0x02, 0x02 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
@@ -1666,7 +1563,7 @@ ahc_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
0xfc, regvalue, cur_col, wrap));
}
-static ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
+static const ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
{ "LAST_SEG_DONE", 0x01, 0x01 },
{ "LAST_SEG", 0x02, 0x02 },
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
diff --git a/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped b/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped
index 4cee085..07e93fb 100644
--- a/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped
+++ b/drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped
@@ -5,7 +5,7 @@
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
*/
-static uint8_t seqprog[] = {
+static const uint8_t seqprog[] = {
0xb2, 0x00, 0x00, 0x08,
0xf7, 0x11, 0x22, 0x08,
0x00, 0x65, 0xee, 0x59,
@@ -1081,7 +1081,7 @@ ahc_patch0_func(struct ahc_softc *ahc)
return (0);
}
-static struct patch {
+static const struct patch {
ahc_patch_func_t *patch_func;
uint32_t begin :10,
skip_instr :10,
@@ -1291,7 +1291,7 @@ static struct patch {
{ ahc_patch4_func, 865, 12, 1 }
};
-static struct cs {
+static const struct cs {
uint16_t begin;
uint16_t end;
} critical_sections[] = {
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-25 13:01 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Hannes Reinecke
@ 2008-04-26 0:42 ` Denys Vlasenko
2008-04-28 7:18 ` Hannes Reinecke
2008-04-27 13:48 ` James Bottomley
1 sibling, 1 reply; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-26 0:42 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: James Bottomley, linux-scsi, Andrew Morton
Hi Hannes,
On Friday 25 April 2008 15:01, Hannes Reinecke wrote:
> > Add "dont_generate_debug_code" syntax handling to aicasm_gram.y
> >
> > aic79xx.reg, aic7xxx.reg: add dont_generate_debug_code keyword
> > for registers which are never referenced by the driver.
> >
> > aicasm.c, aicasm_symbol.[ch]: don't emit code for those regs;
> > also add "const" keyword to generated code in few places.
> >
> > Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
>
> No.
> Adding a symbol to each and every register definition
> which has to be hand-crafted anyway is not the correct way.
>
> I would prefer this: Add a 'count' variable to each symbol
> which gets increased every time the symbol is referenced.
> And then modify the register definition to include counts
> for symbols which are referenced from the source code only
> and not from the sequencer code.
To be honest, I don't understand how your patch achieves it.
I am not familiar enough with the way aicasm machinery works.
Do you have time/will to explain it to me?
> This will give us an automatic usage count for the symbols
> with only minimal hand-crafting.
I tested your patches atop my patches 1,2,3 versus my patches
1...5, and versus original scsi-misc-2.6-2008_04_15.
They build successfully, although they result in bigger code:
text data bss dec hex filename
Original:
262976 47922 1188 312086 4c316 scsi-misc-2.6-2008_04_15.org-DEBUG/drivers/scsi/aic7xxx/built-in.o
Your patches:
233623 2346 1188 237157 39e65 scsi-misc-2.6-2008_04_15.ph5-DEBUG/drivers/scsi/aic7xxx/built-in.o
My patches:
211224 2346 1188 214758 346e6 scsi-misc-2.6-2008_04_15.p5-DEBUG/drivers/scsi/aic7xxx/built-in.o
As compared to my patches there are more than 20 kb
of unused code. My patches can be improved too.
"make namespacecheck" shows unused functions' names.
Here are they. Those with '+' are linked in aic7xxx/built-in.o
only with your patches, the rest are linked with mine too.
There are a few with '-' (reversed situation).
Ideally, they all should be eliminated.
--- TODO.lst Sat Apr 26 02:32:09 2008
+++ TODO_h.lst Sat Apr 26 02:31:36 2008
@@ -1,122 +1,299 @@
drivers/scsi/aic7xxx/aic79xx_core.o
ahd_inq
ahd_inw
ahd_outq
ahd_outw
drivers/scsi/aic7xxx/aic79xx_osm.o
ahd_insb
drivers/scsi/aic7xxx/aic79xx_reg_print.o
+ ahd_abrtbitptr_print
+ ahd_abrtbyteptr_print
+ ahd_accum_print
ahd_accum_save_print
ahd_allocfifo_scbptr_print
+ ahd_allones_print
+ ahd_allzeros_print
+ ahd_annexcol_print
+ ahd_annexdat_print
ahd_arg_1_print
ahd_arg_2_print
+ ahd_attrptr_print
+ ahd_brdctl_print
+ ahd_brddat_print
+ ahd_ccscbaddr_print
+ ahd_ccscbram_print
+ ahd_ccsgaddr_print
+ ahd_ccsgram_print
+ ahd_cdblimit_print
+ ahd_clrint_print
+ ahd_clrlqiint0_print
+ ahd_clrlqiint1_print
+ ahd_clrlqoint0_print
+ ahd_clrlqoint1_print
+ ahd_clrseqintsrc_print
+ ahd_clrseqintstat_print
+ ahd_clrsint0_print
+ ahd_clrsint1_print
+ ahd_clrsint2_print
+ ahd_clrsint3_print
+ ahd_cmdlenptr_print
+ ahd_cmdptr_print
ahd_cmds_pending_print
ahd_cmdsize_table_print
ahd_complete_dma_scb_head_print
ahd_complete_dma_scb_tail_print
ahd_complete_on_qfreeze_head_print
ahd_complete_scb_dmainprog_head_print
ahd_complete_scb_head_print
- ahd_data_count_odd_print
+ ahd_curaddr_print
+ ahd_currscb_print
+ ahd_dchspltstat0_print
+ ahd_dchspltstat1_print
+ ahd_df0pcistat_print
+ ahd_dfdat_print
+ ahd_dff_thrsh_print
+ ahd_dindex_print
+ ahd_dindir_print
ahd_dmaparams_print
+ ahd_dscommand0_print
+ ahd_dspdatactl_print
+ ahd_dspselect_print
+ ahd_error_print
+ ahd_flagptr_print
+ ahd_flags_print
+ ahd_gsfifo_print
+ ahd_haddr_print
+ ahd_hcnt_print
+ ahd_hcntrl_print
+ ahd_hescb_qoff_print
+ ahd_hnscb_qoff_print
ahd_initiator_tag_print
ahd_int_coalescing_cmdcount_print
ahd_int_coalescing_maxcmds_print
ahd_int_coalescing_mincmds_print
ahd_int_coalescing_timer_print
+ ahd_intvec1_addr_print
+ ahd_intvec2_addr_print
+ ahd_iownid_print
ahd_kernel_tqinpos_print
ahd_last_msg_print
+ ahd_lastscb_print
ahd_local_hs_mailbox_print
ahd_longjmp_addr_print
+ ahd_lqctl1_print
+ ahd_lqctl2_print
+ ahd_lqimode0_print
+ ahd_lqimode1_print
+ ahd_lqin_print
+ ahd_lqistate_print
+ ahd_lqomode0_print
+ ahd_lqomode1_print
+ ahd_lqoscsctl_print
+ ahd_lqostate_print
+ ahd_lunlen_print
+ ahd_lunptr_print
+ ahd_maxcmd_print
+ ahd_maxcmdcnt_print
+ ahd_mode_ptr_print
ahd_msg_out_print
+ ahd_multargid_print
+ ahd_negconopts_print
+ ahd_negoaddr_print
+ ahd_negoffset_print
+ ahd_negperiod_print
+ ahd_negppropts_print
ahd_next_queued_scb_addr_print
+ ahd_nextscb_print
+ ahd_none_print
+ ahd_optionmode_print
+ ahd_os_space_cnt_print
+ ahd_pcixctl_print
+ ahd_prgmcnt_print
+ ahd_qnextptr_print
+ ahd_qoff_ctlsta_print
ahd_qoutfifo_entry_valid_tag_print
ahd_qoutfifo_next_addr_print
ahd_reg0_print
- ahd_reg1_print
ahd_reg_isr_print
ahd_saved_lun_print
ahd_saved_scsiid_print
+ ahd_sblkctl_print
ahd_scb_base_print
ahd_scb_busaddr_print
ahd_scb_cdb_len_print
ahd_scb_datacnt_print
ahd_scb_dataptr_print
ahd_scb_disconnected_lists_print
ahd_scb_lun_print
ahd_scb_next2_print
ahd_scb_next_print
ahd_scb_residual_datacnt_print
ahd_scb_residual_sgptr_print
ahd_scb_scsi_status_print
ahd_scb_sense_busaddr_print
ahd_scb_sgptr_print
- ahd_scb_spare_print
ahd_scb_tag_print
- ahd_scb_target_data_dir_print
- ahd_scb_target_itag_print
- ahd_scb_target_phases_print
ahd_scb_task_attribute_print
ahd_scb_task_management_print
+ ahd_scbautoptr_print
+ ahd_scbhaddr_print
+ ahd_scbhcnt_print
+ ahd_scbptr_print
+ ahd_scschkn_print
+ ahd_scsidat_print
ahd_scsiseq_template_print
+ ahd_scsisigo_print
+ ahd_sdscb_qoff_print
+ ahd_seeadr_print
+ ahd_seectl_print
+ ahd_seedat_print
+ ahd_seestat_print
+ ahd_seqintcode_print
+ ahd_seqram_print
+ ahd_sescb_qoff_print
+ ahd_sg_cache_pre_print
+ ahd_sghaddr_print
+ ahd_sghcnt_print
+ ahd_sgspltstat0_print
+ ahd_sgspltstat1_print
+ ahd_shaddr_print
ahd_shared_data_addr_print
+ ahd_shcnt_print
+ ahd_simode3_print
+ ahd_sindex_print
+ ahd_sindir_print
+ ahd_snscb_qoff_print
ahd_sram_base_print
+ ahd_stack_print
+ ahd_swtimer_print
+ ahd_sxfrctl0_print
+ ahd_sxfrctl1_print
+ ahd_targidin_print
+ ahd_targpcistat_print
+ ahd_townid_print
ahd_tqinpos_print
ahd_waiting_scb_tails_print
ahd_waiting_tid_head_print
ahd_waiting_tid_tail_print
+ ahd_wrtbiasctl_print
drivers/scsi/aic7xxx/aic7xxx_core.o
ahc_inq
ahc_outq
drivers/scsi/aic7xxx/aic7xxx_osm.o
ahc_insb
drivers/scsi/aic7xxx/aic7xxx_reg_print.o
+ ahc_accum_print
+ ahc_allones_print
+ ahc_allzeros_print
ahc_arg_1_print
ahc_arg_2_print
+ ahc_brdctl_print
+ ahc_busspd_print
+ ahc_bustime_print
ahc_busy_targets_print
- ahc_cmdsize_table_tail_print
- ahc_complete_scbh_print
+ ahc_cchaddr_print
+ ahc_cchcnt_print
+ ahc_ccscbaddr_print
+ ahc_ccscbcnt_print
+ ahc_ccscbctl_print
+ ahc_ccscbptr_print
+ ahc_ccscbram_print
+ ahc_ccsgaddr_print
+ ahc_ccsgctl_print
+ ahc_ccsgram_print
+ ahc_clrint_print
+ ahc_clrsint0_print
+ ahc_clrsint1_print
+ ahc_crccontrol1_print
+ ahc_dfdat_print
+ ahc_dff_thrsh_print
+ ahc_dfwaddr_print
+ ahc_dindex_print
+ ahc_dindir_print
ahc_disc_dsb_print
ahc_disconnected_scbh_print
ahc_dmaparams_print
+ ahc_dscommand0_print
+ ahc_dscommand1_print
+ ahc_dspcistatus_print
+ ahc_flags_print
ahc_free_scbh_print
ahc_ha_274_biosctrl_print
ahc_ha_274_biosglobal_print
+ ahc_haddr_print
+ ahc_hcnt_print
+ ahc_hcntrl_print
+ ahc_hnscb_qoff_print
ahc_hostconf_print
+ ahc_hs_mailbox_print
ahc_hscb_addr_print
ahc_intdef_print
+ ahc_intstat_print
ahc_kernel_qinpos_print
ahc_kernel_tqinpos_print
ahc_last_msg_print
ahc_msg_out_print
ahc_mwi_residual_print
ahc_next_queued_scb_print
+ ahc_none_print
+ ahc_optionmode_print
+ ahc_qinfifo_print
ahc_qinpos_print
+ ahc_qoff_ctlsta_print
+ ahc_qoutfifo_print
ahc_qoutpos_print
ahc_saved_lun_print
ahc_saved_scsiid_print
ahc_scb_64_btt_print
- ahc_scb_64_spare_print
ahc_scb_base_print
ahc_scb_cdb_len_print
ahc_scb_cdb_ptr_print
ahc_scb_datacnt_print
ahc_scb_dataptr_print
ahc_scb_next_print
ahc_scb_residual_sgptr_print
ahc_scb_scsi_status_print
ahc_scb_scsioffset_print
ahc_scb_scsirate_print
ahc_scb_sgptr_print
ahc_scb_target_data_dir_print
ahc_scb_target_itag_print
ahc_scb_target_phases_print
+ ahc_scbbaddr_print
+ ahc_scbcnt_print
+ ahc_scbptr_print
ahc_scsiconf_print
+ ahc_scsidatl_print
+ ahc_scsiid_print
+ ahc_scsiid_ultra2_print
ahc_scsiseq_template_print
+ ahc_scsisigo_print
+ ahc_sdscb_qoff_print
+ ahc_seectl_2840_print
+ ahc_seectl_print
+ ahc_selid_print
+ ahc_seltimer_print
ahc_seq_flags2_print
+ ahc_seqaddr0_print
+ ahc_seqaddr1_print
+ ahc_seqram_print
+ ahc_sfunct_print
+ ahc_sg_cache_pre_print
+ ahc_sg_cache_shadow_print
+ ahc_shaddr_print
ahc_shared_data_addr_print
+ ahc_sindex_print
+ ahc_sindir_print
+ ahc_snscb_qoff_print
+ ahc_spiocap_print
ahc_sram_base_print
+ ahc_stack_print
+ ahc_status_2840_print
+ ahc_stcnt_print
+ ahc_sxfrctl1_print
ahc_targ_offset_print
+ ahc_targcrccnt_print
+ ahc_targid_print
ahc_tqinpos_print
ahc_ultra_enb_print
ahc_waiting_scbh_print
--
vda
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/5] aic7xxx: deinline large or slow functions
2008-04-25 2:32 [PATCH 1/5] aic7xxx: deinline large or slow functions Denys Vlasenko
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
2008-04-25 6:28 ` [PATCH 1/5] aic7xxx: deinline large or slow functions Hannes Reinecke
@ 2008-04-27 13:41 ` James Bottomley
2008-04-27 14:02 ` Denys Vlasenko
2 siblings, 1 reply; 18+ messages in thread
From: James Bottomley @ 2008-04-27 13:41 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: Hannes Reinecke, linux-scsi, Andrew Morton
On Fri, 2008-04-25 at 04:32 +0200, Denys Vlasenko wrote:
> Hi Hannes,
>
> I reworked my patches as you requested.
>
> The first one (in this mail) was ACKed by you, so it's just a resend.
>
> Following pathes were not ACKed and are modified.
> Please take a look.
>
>
>
> Deinlines and moves big functions from .h to .c files.
> Adds prototypes for ahc_lookup_scb and ahd_lookup_scb to .h files.
The first three won't apply. It looks like they're splits of this
existing one (at least quilt thinks they're all reverse applyable). If
there's anything I missed, just re-send against scsi-misc because the
patch stack is a bit deep and convoluted here in aic7xxx.
commit be0d67680d524981dd65c661efe3c9cbd52a684f
Author: Denys Vlasenko <vda.linux@googlemail.com>
Date: Sun Mar 23 04:41:22 2008 +0100
[SCSI] aic7xxx, aic79xx: deinline functions
Deinlines and moves big functions from .h to .c files.
Adds prototypes for ahc_lookup_scb and ahd_lookup_scb to .h files.
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
James
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-25 13:01 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Hannes Reinecke
2008-04-26 0:42 ` Denys Vlasenko
@ 2008-04-27 13:48 ` James Bottomley
1 sibling, 0 replies; 18+ messages in thread
From: James Bottomley @ 2008-04-27 13:48 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: Denys Vlasenko, linux-scsi, Andrew Morton
On Fri, 2008-04-25 at 15:01 +0200, Hannes Reinecke wrote:
> Hi Denys,
>
> Denys Vlasenko wrote:
> > Add "dont_generate_debug_code" syntax handling to aicasm_gram.y
> >
> > aic79xx.reg, aic7xxx.reg: add dont_generate_debug_code keyword
> > for registers which are never referenced by the driver.
> >
> > aicasm.c, aicasm_symbol.[ch]: don't emit code for those regs;
> > also add "const" keyword to generated code in few places.
> >
> > Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
> No.
> Adding a symbol to each and every register definition
> which has to be hand-crafted anyway is not the correct way.
>
> I would prefer this: Add a 'count' variable to each symbol
> which gets increased every time the symbol is referenced.
> And then modify the register definition to include counts
> for symbols which are referenced from the source code only
> and not from the sequencer code.
>
> This will give us an automatic usage count for the symbols
> with only minimal hand-crafting.
>
> James, please apply.
Well .. I have done, but you can take a black mark for this ... there's
no Signed-off-by line.
James
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/5] aic7xxx: deinline large or slow functions
2008-04-27 13:41 ` James Bottomley
@ 2008-04-27 14:02 ` Denys Vlasenko
2008-04-27 14:20 ` Denys Vlasenko
0 siblings, 1 reply; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-27 14:02 UTC (permalink / raw)
To: James Bottomley; +Cc: Hannes Reinecke, linux-scsi, Andrew Morton
On Sunday 27 April 2008 15:41, James Bottomley wrote:
> > The first one (in this mail) was ACKed by you, so it's just a resend.
> >
> > Following pathes were not ACKed and are modified.
> > Please take a look.
>
> The first three won't apply. It looks like they're splits of this
> existing one (at least quilt thinks they're all reverse applyable).
Most likely the first one was applied.
Try applying patches 2 and 3.
--
vda
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/5] aic7xxx: deinline large or slow functions
2008-04-27 14:02 ` Denys Vlasenko
@ 2008-04-27 14:20 ` Denys Vlasenko
0 siblings, 0 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-27 14:20 UTC (permalink / raw)
To: James Bottomley; +Cc: Hannes Reinecke, linux-scsi, Andrew Morton
On Sunday 27 April 2008 16:02, Denys Vlasenko wrote:
> On Sunday 27 April 2008 15:41, James Bottomley wrote:
> > > The first one (in this mail) was ACKed by you, so it's just a resend.
> > >
> > > Following pathes were not ACKed and are modified.
> > > Please take a look.
> >
> > The first three won't apply. It looks like they're splits of this
> > existing one (at least quilt thinks they're all reverse applyable).
>
> Most likely the first one was applied.
> Try applying patches 2 and 3.
I just tested it. Patch 1 is already in scsi-misc-2.6,
patches 2 and 3 apply cleanly:
# patch -p1 </tmp/aic_debloat_2.diff
patching file drivers/scsi/aic7xxx/aic79xx.h
patching file drivers/scsi/aic7xxx/aic79xx_core.c
patching file drivers/scsi/aic7xxx/aic79xx_inline.h
patching file drivers/scsi/aic7xxx/aic79xx_osm.c
patching file drivers/scsi/aic7xxx/aic79xx_osm.h
patching file drivers/scsi/aic7xxx/aic79xx_pci.c
patching file drivers/scsi/aic7xxx/aic7xxx.h
patching file drivers/scsi/aic7xxx/aic7xxx_core.c
patching file drivers/scsi/aic7xxx/aic7xxx_inline.h
patching file drivers/scsi/aic7xxx/aic7xxx_osm.c
patching file drivers/scsi/aic7xxx/aic7xxx_osm.h
patching file drivers/scsi/aic7xxx/aic7xxx_proc.c
# patch -p1 </tmp/aic_debloat_3.diff
patching file drivers/scsi/aic7xxx/aic79xx.h
patching file drivers/scsi/aic7xxx/aic79xx_core.c
patching file drivers/scsi/aic7xxx/aic79xx_osm.c
patching file drivers/scsi/aic7xxx/aic79xx_osm_pci.c
patching file drivers/scsi/aic7xxx/aic79xx_pci.c
patching file drivers/scsi/aic7xxx/aic79xx_proc.c
patching file drivers/scsi/aic7xxx/aic7xxx.h
patching file drivers/scsi/aic7xxx/aic7xxx_93cx6.c
patching file drivers/scsi/aic7xxx/aic7xxx_core.c
patching file drivers/scsi/aic7xxx/aic7xxx_osm.c
patching file drivers/scsi/aic7xxx/aic7xxx_osm_pci.c
patching file drivers/scsi/aic7xxx/aic7xxx_pci.c
patching file drivers/scsi/aic7xxx/aic7xxx_proc.c
--
vda
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-26 0:42 ` Denys Vlasenko
@ 2008-04-28 7:18 ` Hannes Reinecke
2008-04-28 8:25 ` Denys Vlasenko
0 siblings, 1 reply; 18+ messages in thread
From: Hannes Reinecke @ 2008-04-28 7:18 UTC (permalink / raw)
To: Denys Vlasenko; +Cc: linux-scsi
Denys Vlasenko wrote:
> Hi Hannes,
>
> On Friday 25 April 2008 15:01, Hannes Reinecke wrote:
>>> Add "dont_generate_debug_code" syntax handling to aicasm_gram.y
>>>
>>> aic79xx.reg, aic7xxx.reg: add dont_generate_debug_code keyword
>>> for registers which are never referenced by the driver.
>>>
>>> aicasm.c, aicasm_symbol.[ch]: don't emit code for those regs;
>>> also add "const" keyword to generated code in few places.
>>>
>>> Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
>> No.
>> Adding a symbol to each and every register definition
>> which has to be hand-crafted anyway is not the correct way.
>>
>> I would prefer this: Add a 'count' variable to each symbol
>> which gets increased every time the symbol is referenced.
>> And then modify the register definition to include counts
>> for symbols which are referenced from the source code only
>> and not from the sequencer code.
>
> To be honest, I don't understand how your patch achieves it.
> I am not familiar enough with the way aicasm machinery works.
>
Ach, that's just straight lex/yacc stuff :-)
No, seriously, it's not that hard to understand.
Basically aicasm builds a list of all used symbols, then
builds a reference table on to of that list whenever a
symbol is referenced in the actual code, and then does
some cleanup etc. to be able to put out proper sequencer
code.
So the trick here is that we can add a 'count' field to
the underlying symbol table, which will be incremented
everytime this symbol is referenced by the sequencer code.
Nice and clean.
In theory.
>> This will give us an automatic usage count for the symbols
>> with only minimal hand-crafting.
>
> I tested your patches atop my patches 1,2,3 versus my patches
> 1...5, and versus original scsi-misc-2.6-2008_04_15.
> They build successfully, although they result in bigger code:
>
[ .. ]
>
> As compared to my patches there are more than 20 kb
> of unused code. My patches can be improved too.
> "make namespacecheck" shows unused functions' names.
>
Yes, I know. There is a snag to the above reasoning:
Symbols are not only referenced by the sequencer code, but
also by the actual driver. And there are symbols which
are referenced from the driver source code only, not from
the sequencer. So aicasm will _not_ catch those.
That's why I added to 'count' field explicitely to some
symbols; these are referenced from the source code only.
But now we're facing another problem: Those symbols
referenced from the sequencer code only will in most
cases _not_ be printed via the autogenerated _print
functions.
So what we really need to do here to do this properly
is to write a preprocessor, which checks the _used_
*_print() functions in the source code and generates
the aic7*xx_reg_print.c file on the fly. And remove
this code from aicasm entirely.
But this really might be considered a bit of an
overkill. But I wouldn't stand in the way of anyone
trying to do so.
Cheers,
Hannes
--
Dr. Hannes Reinecke zSeries & Storage
hare@suse.de +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Markus Rex, HRB 16746 (AG Nürnberg)
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-28 7:18 ` Hannes Reinecke
@ 2008-04-28 8:25 ` Denys Vlasenko
2008-05-03 8:40 ` Denys Vlasenko
0 siblings, 1 reply; 18+ messages in thread
From: Denys Vlasenko @ 2008-04-28 8:25 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: linux-scsi
On Monday 28 April 2008 09:18, Hannes Reinecke wrote:
> >> I would prefer this: Add a 'count' variable to each symbol
> >> which gets increased every time the symbol is referenced.
> >> And then modify the register definition to include counts
> >> for symbols which are referenced from the source code only
> >> and not from the sequencer code.
> >
> > To be honest, I don't understand how your patch achieves it.
> > I am not familiar enough with the way aicasm machinery works.
>
> Ach, that's just straight lex/yacc stuff :-)
> No, seriously, it's not that hard to understand.
> Basically aicasm builds a list of all used symbols, then
> builds a reference table on to of that list whenever a
> symbol is referenced in the actual code, and then does
> some cleanup etc. to be able to put out proper sequencer
> code.
>
> So the trick here is that we can add a 'count' field to
> the underlying symbol table, which will be incremented
> everytime this symbol is referenced by the sequencer code.
> Nice and clean.
>
> In theory.
>
> >> This will give us an automatic usage count for the symbols
> >> with only minimal hand-crafting.
> >
> > I tested your patches atop my patches 1,2,3 versus my patches
> > 1...5, and versus original scsi-misc-2.6-2008_04_15.
> > They build successfully, although they result in bigger code:
> >
> [ .. ]
> >
> > As compared to my patches there are more than 20 kb
> > of unused code. My patches can be improved too.
> > "make namespacecheck" shows unused functions' names.
> >
> Yes, I know. There is a snag to the above reasoning:
> Symbols are not only referenced by the sequencer code, but
> also by the actual driver. And there are symbols which
> are referenced from the driver source code only, not from
> the sequencer. So aicasm will _not_ catch those.
>
> That's why I added to 'count' field explicitely to some
> symbols; these are referenced from the source code only.
Why some of these added counts are not 1 but, for example, 19
(CLRINT register)?
> But now we're facing another problem: Those symbols
> referenced from the sequencer code only will in most
> cases _not_ be printed via the autogenerated _print
> functions.
>
> So what we really need to do here to do this properly
> is to write a preprocessor, which checks the _used_
> *_print() functions in the source code and generates
> the aic7*xx_reg_print.c file on the fly. And remove
> this code from aicasm entirely.
I agree that this would be the proper solution in a sense
that it would autodetect and generate only what is needed.
> But this really might be considered a bit of an
> overkill.
Since this is an ad-hoc system, instead of spending time
on more difficult system which does this detection
we can simply manually instruct aicasm to not generate
*_print() functions which won't be ever called by the driver.
Basically this would be a respin of my patch #4.
After you introduced reference counts, I will need
to add much smaller number of "dont_generate_debug_code"
fields than before.
Are you ok with this in principle?
--
vda
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data
2008-04-28 8:25 ` Denys Vlasenko
@ 2008-05-03 8:40 ` Denys Vlasenko
0 siblings, 0 replies; 18+ messages in thread
From: Denys Vlasenko @ 2008-05-03 8:40 UTC (permalink / raw)
To: Hannes Reinecke; +Cc: linux-scsi, Andrew Morton
On Monday 28 April 2008 10:25, Denys Vlasenko wrote:
> > But now we're facing another problem: Those symbols
> > referenced from the sequencer code only will in most
> > cases _not_ be printed via the autogenerated _print
> > functions.
> >
> > So what we really need to do here to do this properly
> > is to write a preprocessor, which checks the _used_
> > *_print() functions in the source code and generates
> > the aic7*xx_reg_print.c file on the fly. And remove
> > this code from aicasm entirely.
>
> I agree that this would be the proper solution in a sense
> that it would autodetect and generate only what is needed.
>
> > But this really might be considered a bit of an
> > overkill.
>
> Since this is an ad-hoc system, instead of spending time
> on more difficult system which does this detection
> we can simply manually instruct aicasm to not generate
> *_print() functions which won't be ever called by the driver.
>
> Basically this would be a respin of my patch #4.
> After you introduced reference counts, I will need
> to add much smaller number of "dont_generate_debug_code"
> fields than before.
>
> Are you ok with this in principle?
Ping...
--
vda
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2008-05-03 8:41 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-04-25 2:32 [PATCH 1/5] aic7xxx: deinline large or slow functions Denys Vlasenko
2008-04-25 2:34 ` [PATCH 2/5] aic7xxx: add static Denys Vlasenko
2008-04-25 2:36 ` [PATCH 3/5] aic7xxx: add const Denys Vlasenko
2008-04-25 2:41 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Denys Vlasenko
2008-04-25 2:44 ` [PATCH 5/5] aic7xxx: update shipped files Denys Vlasenko
2008-04-25 13:03 ` Hannes Reinecke
2008-04-25 13:01 ` [PATCH 4/5] aic7xxx: teach aicasm to not emit unused debug code/data Hannes Reinecke
2008-04-26 0:42 ` Denys Vlasenko
2008-04-28 7:18 ` Hannes Reinecke
2008-04-28 8:25 ` Denys Vlasenko
2008-05-03 8:40 ` Denys Vlasenko
2008-04-27 13:48 ` James Bottomley
2008-04-25 12:47 ` [PATCH 3/5] aic7xxx: add const Hannes Reinecke
2008-04-25 12:46 ` [PATCH 2/5] aic7xxx: add static Hannes Reinecke
2008-04-25 6:28 ` [PATCH 1/5] aic7xxx: deinline large or slow functions Hannes Reinecke
2008-04-27 13:41 ` James Bottomley
2008-04-27 14:02 ` Denys Vlasenko
2008-04-27 14:20 ` Denys Vlasenko
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