Re: [PATCH v2 07/11] qla2xxx: Avoid side effects when using endianizer macros.

Johannes Thumshirn
2016-01-28T09:00:10Z

On Wed, Jan 27, 2016 at 12:03:34PM -0500, Himanshu Madhani wrote:
> From: Joe Carnuccio <joe.carnuccio@qlogic.com>
>
> Signed-off-by: Joe Carnuccio <joe.carnuccio@qlogic.com>
> Signed-off-by: Himanshu Madhani <himanshu.madhani@qlogic.com>
> ---
> drivers/scsi/qla2xxx/qla_attr.c | 4 +-
> drivers/scsi/qla2xxx/qla_dbg.c | 141 ++++++++++++++++++++-----------------
> drivers/scsi/qla2xxx/qla_init.c | 16 ++--
> drivers/scsi/qla2xxx/qla_inline.h | 4 +-
> drivers/scsi/qla2xxx/qla_mbx.c | 16 ++--
> drivers/scsi/qla2xxx/qla_sup.c | 23 +++---
> 6 files changed, 106 insertions(+), 98 deletions(-)
>
> diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
> index fadce04..4dc06a13 100644
> --- a/drivers/scsi/qla2xxx/qla_attr.c
> +++ b/drivers/scsi/qla2xxx/qla_attr.c
> @@ -272,8 +272,8 @@ qla2x00_sysfs_write_nvram(struct file *filp, struct kobject *kobj,
>
> iter = (uint32_t *)buf;
> chksum = 0;
> - for (cnt = 0; cnt < ((count >> 2) - 1); cnt++)
> - chksum += le32_to_cpu(*iter++);
> + for (cnt = 0; cnt < ((count >> 2) - 1); cnt++, iter++)
> + chksum += le32_to_cpu(*iter);
> chksum = ~chksum + 1;
> *iter = cpu_to_le32(chksum);
> } else {
> diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
> index aa6694b..b64c504 100644
> --- a/drivers/scsi/qla2xxx/qla_dbg.c
> +++ b/drivers/scsi/qla2xxx/qla_dbg.c
> @@ -294,8 +294,8 @@ qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase,
>
> WRT_REG_DWORD(&reg->iobase_addr, iobase);
> dmp_reg = &reg->iobase_window;
> - while (count--)
> - *buf++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for ( ; count--; dmp_reg++)
> + *buf++ = htonl(RD_REG_DWORD(dmp_reg));
>
> return buf;
> }
> @@ -457,8 +457,8 @@ qla2xxx_read_window(struct device_reg_2xxx __iomem *reg, uint32_t count,
> {
> uint16_t __iomem *dmp_reg = &reg->u.isp2300.fb_cmd;
>
> - while (count--)
> - *buf++ = htons(RD_REG_WORD(dmp_reg++));
> + for ( ; count--; dmp_reg++)
> + *buf++ = htons(RD_REG_WORD(dmp_reg));
> }
>
> static inline void *
> @@ -733,16 +733,18 @@ qla2300_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> if (rval == QLA_SUCCESS) {
> dmp_reg = &reg->flash_address;
> - for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
> - fw->pbiu_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++, dmp_reg++)
> + fw->pbiu_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> dmp_reg = &reg->u.isp2300.req_q_in;
> - for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2; cnt++)
> - fw->risc_host_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->risc_host_reg) / 2;
> + cnt++, dmp_reg++)
> + fw->risc_host_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> dmp_reg = &reg->u.isp2300.mailbox0;
> - for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2;
> + cnt++, dmp_reg++)
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> WRT_REG_WORD(&reg->ctrl_status, 0x40);
> qla2xxx_read_window(reg, 32, fw->resp_dma_reg);
> @@ -752,8 +754,9 @@ qla2300_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> WRT_REG_WORD(&reg->ctrl_status, 0x00);
> dmp_reg = &reg->risc_hw;
> - for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
> - fw->risc_hdw_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2;
> + cnt++, dmp_reg++)
> + fw->risc_hdw_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> WRT_REG_WORD(&reg->pcr, 0x2000);
> qla2xxx_read_window(reg, 16, fw->risc_gp0_reg);
> @@ -896,25 +899,25 @@ qla2100_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> }
> if (rval == QLA_SUCCESS) {
> dmp_reg = &reg->flash_address;
> - for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++)
> - fw->pbiu_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->pbiu_reg) / 2; cnt++, dmp_reg++)
> + fw->pbiu_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> dmp_reg = &reg->u.isp2100.mailbox0;
> - for (cnt = 0; cnt < ha->mbx_count; cnt++) {
> + for (cnt = 0; cnt < ha->mbx_count; cnt++, dmp_reg++) {
> if (cnt == 8)
> dmp_reg = &reg->u_end.isp2200.mailbox8;
>
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
> }
>
> dmp_reg = &reg->u.isp2100.unused_2[0];
> - for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++)
> - fw->dma_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->dma_reg) / 2; cnt++, dmp_reg++)
> + fw->dma_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> WRT_REG_WORD(&reg->ctrl_status, 0x00);
> dmp_reg = &reg->risc_hw;
> - for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++)
> - fw->risc_hdw_reg[cnt] = htons(RD_REG_WORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->risc_hdw_reg) / 2; cnt++, dmp_reg++)
> + fw->risc_hdw_reg[cnt] = htons(RD_REG_WORD(dmp_reg));
>
> WRT_REG_WORD(&reg->pcr, 0x2000);
> qla2xxx_read_window(reg, 16, fw->risc_gp0_reg);
> @@ -1096,8 +1099,8 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Host interface registers. */
> dmp_reg = &reg->flash_addr;
> - for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
> - fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++, dmp_reg++)
> + fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Disable interrupts. */
> WRT_REG_DWORD(&reg->ictrl, 0);
> @@ -1129,8 +1132,8 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Mailbox registers. */
> mbx_reg = &reg->mailbox0;
> - for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg++));
> + for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++, dmp_reg++)
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg));
>
> /* Transfer sequence registers. */
> iter_reg = fw->xseq_gp_reg;
> @@ -1168,20 +1171,20 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> iter_reg = fw->req0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->resp0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->req1_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Transmit DMA registers. */
> iter_reg = fw->xmt0_dma_reg;
> @@ -1359,8 +1362,10 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> RD_REG_DWORD(&reg->iobase_addr);
> WRT_REG_DWORD(&reg->iobase_window, 0x01);
> dmp_reg = &reg->iobase_c4;
> - fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
> - fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
> + fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> + fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
> fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
>
> @@ -1369,8 +1374,8 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Host interface registers. */
> dmp_reg = &reg->flash_addr;
> - for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
> - fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++, dmp_reg++)
> + fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Disable interrupts. */
> WRT_REG_DWORD(&reg->ictrl, 0);
> @@ -1418,8 +1423,8 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Mailbox registers. */
> mbx_reg = &reg->mailbox0;
> - for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg++));
> + for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++, mbx_reg++)
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg));
>
> /* Transfer sequence registers. */
> iter_reg = fw->xseq_gp_reg;
> @@ -1482,20 +1487,20 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> iter_reg = fw->req0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->resp0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->req1_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Transmit DMA registers. */
> iter_reg = fw->xmt0_dma_reg;
> @@ -1680,8 +1685,10 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> RD_REG_DWORD(&reg->iobase_addr);
> WRT_REG_DWORD(&reg->iobase_window, 0x01);
> dmp_reg = &reg->iobase_c4;
> - fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
> - fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
> + fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> + fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
> fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
>
> @@ -1690,8 +1697,8 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Host interface registers. */
> dmp_reg = &reg->flash_addr;
> - for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
> - fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++, dmp_reg++)
> + fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Disable interrupts. */
> WRT_REG_DWORD(&reg->ictrl, 0);
> @@ -1739,8 +1746,8 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Mailbox registers. */
> mbx_reg = &reg->mailbox0;
> - for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg++));
> + for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++, mbx_reg++)
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg));
>
> /* Transfer sequence registers. */
> iter_reg = fw->xseq_gp_reg;
> @@ -1803,20 +1810,20 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> iter_reg = fw->req0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->resp0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->req1_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Transmit DMA registers. */
> iter_reg = fw->xmt0_dma_reg;
> @@ -2023,8 +2030,10 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> RD_REG_DWORD(&reg->iobase_addr);
> WRT_REG_DWORD(&reg->iobase_window, 0x01);
> dmp_reg = &reg->iobase_c4;
> - fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
> - fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
> + fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> + fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg));
> + dmp_reg++;
> fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
> fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
>
> @@ -2033,8 +2042,8 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Host interface registers. */
> dmp_reg = &reg->flash_addr;
> - for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
> - fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++, dmp_reg++)
> + fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Disable interrupts. */
> WRT_REG_DWORD(&reg->ictrl, 0);
> @@ -2082,8 +2091,8 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
>
> /* Mailbox registers. */
> mbx_reg = &reg->mailbox0;
> - for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
> - fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg++));
> + for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++, dmp_reg++)
> + fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg));
>
> /* Transfer sequence registers. */
> iter_reg = fw->xseq_gp_reg;
> @@ -2178,20 +2187,20 @@ qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
> iter_reg = fw->req0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->resp0_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> iter_reg = fw->req1_dma_reg;
> iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
> dmp_reg = &reg->iobase_q;
> - for (cnt = 0; cnt < 7; cnt++)
> - *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
> + for (cnt = 0; cnt < 7; cnt++, dmp_reg++)
> + *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg));
>
> /* Transmit DMA registers. */
> iter_reg = fw->xmt0_dma_reg;
> diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
> index ffbc655..8001c89 100644
> --- a/drivers/scsi/qla2xxx/qla_init.c
> +++ b/drivers/scsi/qla2xxx/qla_init.c
> @@ -5125,8 +5125,8 @@ qla24xx_nvram_config(scsi_qla_host_t *vha)
> dptr = (uint32_t *)nv;
> ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
> ha->nvram_size);
> - for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
> - chksum += le32_to_cpu(*dptr++);
> + for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
> + chksum += le32_to_cpu(*dptr);
>
> ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
> "Contents of NVRAM\n");
> @@ -5379,8 +5379,8 @@ uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
> wptr = (uint32_t *)(&pri_image_status);
> cnt = size;
>
> - for (chksum = 0; cnt; cnt--)
> - chksum += le32_to_cpu(*wptr++);
> + for (chksum = 0; cnt--; wptr++)
> + chksum += le32_to_cpu(*wptr);
> if (chksum) {
> ql_dbg(ql_dbg_init, vha, 0x018c,
> "Checksum validation failed for primary image (0x%x)\n",
> @@ -5407,8 +5407,8 @@ check_sec_image:
>
> wptr = (uint32_t *)(&sec_image_status);
> cnt = size;
> - for (chksum = 0; cnt; cnt--)
> - chksum += le32_to_cpu(*wptr++);
> + for (chksum = 0; cnt--; wptr++)
> + chksum += le32_to_cpu(*wptr);
> if (chksum) {
> ql_dbg(ql_dbg_init, vha, 0x018e,
> "Checksum validation failed for secondary image (0x%x)\n",
> @@ -6161,8 +6161,8 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
> ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
> ha->nvram_size);
> dptr = (uint32_t *)nv;
> - for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
> - chksum += le32_to_cpu(*dptr++);
> + for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
> + chksum += le32_to_cpu(*dptr);
>
> ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
> "Contents of NVRAM:\n");
> diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h
> index a6b7f15..edc48f3 100644
> --- a/drivers/scsi/qla2xxx/qla_inline.h
> +++ b/drivers/scsi/qla2xxx/qla_inline.h
> @@ -87,8 +87,8 @@ host_to_adap(uint8_t *src, uint8_t *dst, uint32_t bsize)
> __le32 *odest = (__le32 *) dst;
> uint32_t iter = bsize >> 2;
>
> - for (; iter ; iter--)
> - *odest++ = cpu_to_le32(*isrc++);
> + for ( ; iter--; isrc++)
> + *odest++ = cpu_to_le32(*isrc);
> }
>
> static inline void
> diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
> index 3dd3398..968b846 100644
> --- a/drivers/scsi/qla2xxx/qla_mbx.c
> +++ b/drivers/scsi/qla2xxx/qla_mbx.c
> @@ -2759,7 +2759,7 @@ qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
> int rval;
> mbx_cmd_t mc;
> mbx_cmd_t *mcp = &mc;
> - uint32_t *siter, *diter, dwords;
> + uint32_t *iter, dwords;
> struct qla_hw_data *ha = vha->hw;
>
> ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
> @@ -2801,9 +2801,9 @@ qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
> "Done %s.\n", __func__);
> dwords = offsetof(struct link_statistics,
> link_up_cnt) / 4;
> - siter = diter = &stats->link_fail_cnt;
> - while (dwords--)
> - *diter++ = le32_to_cpu(*siter++);
> + iter = &stats->link_fail_cnt;
> + for ( ; dwords--; iter++)
> + le32_to_cpus(iter);
> }
> } else {
> /* Failed. */
> @@ -2820,7 +2820,7 @@ qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
> int rval;
> mbx_cmd_t mc;
> mbx_cmd_t *mcp = &mc;
> - uint32_t *siter, *diter, dwords;
> + uint32_t *iter, dwords;
>
> ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
> "Entered %s.\n", __func__);
> @@ -2849,9 +2849,9 @@ qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
> "Done %s.\n", __func__);
> /* Copy over data -- firmware data is LE. */
> dwords = sizeof(struct link_statistics) / 4;
> - siter = diter = &stats->link_fail_cnt;
> - while (dwords--)
> - *diter++ = le32_to_cpu(*siter++);
> + iter = &stats->link_fail_cnt;
> + for ( ; dwords--; iter++)
> + le32_to_cpus(iter);
> }
> } else {
> /* Failed. */
> diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
> index 786ead2..5e93923 100644
> --- a/drivers/scsi/qla2xxx/qla_sup.c
> +++ b/drivers/scsi/qla2xxx/qla_sup.c
> @@ -610,8 +610,8 @@ qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start)
>
> wptr = (uint16_t *)req->ring;
> cnt = sizeof(struct qla_flt_location) >> 1;
> - for (chksum = 0; cnt; cnt--)
> - chksum += le16_to_cpu(*wptr++);
> + for (chksum = 0; cnt--; wptr++)
> + chksum += le16_to_cpu(*wptr);
> if (chksum) {
> ql_log(ql_log_fatal, vha, 0x0045,
> "Inconsistent FLTL detected: checksum=0x%x.\n", chksum);
> @@ -702,8 +702,8 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
> }
>
> cnt = (sizeof(struct qla_flt_header) + le16_to_cpu(flt->length)) >> 1;
> - for (chksum = 0; cnt; cnt--)
> - chksum += le16_to_cpu(*wptr++);
> + for (chksum = 0; cnt--; wptr++)
> + chksum += le16_to_cpu(*wptr);
> if (chksum) {
> ql_log(ql_log_fatal, vha, 0x0048,
> "Inconsistent FLT detected: version=0x%x length=0x%x checksum=0x%x.\n",
> @@ -930,9 +930,8 @@ qla2xxx_get_fdt_info(scsi_qla_host_t *vha)
> fdt->sig[3] != 'D')
> goto no_flash_data;
>
> - for (cnt = 0, chksum = 0; cnt < sizeof(struct qla_fdt_layout) >> 1;
> - cnt++)
> - chksum += le16_to_cpu(*wptr++);
> + for (cnt = 0, chksum = 0; cnt < sizeof(*fdt) >> 1; cnt++, wptr++)
> + chksum += le16_to_cpu(*wptr);
> if (chksum) {
> ql_dbg(ql_dbg_init, vha, 0x004c,
> "Inconsistent FDT detected:"
> @@ -1027,7 +1026,8 @@ qla2xxx_get_idc_param(scsi_qla_host_t *vha)
> ha->fcoe_dev_init_timeout = QLA82XX_ROM_DEV_INIT_TIMEOUT;
> ha->fcoe_reset_timeout = QLA82XX_ROM_DRV_RESET_ACK_TIMEOUT;
> } else {
> - ha->fcoe_dev_init_timeout = le32_to_cpu(*wptr++);
> + ha->fcoe_dev_init_timeout = le32_to_cpu(*wptr);
> + wptr++;
> ha->fcoe_reset_timeout = le32_to_cpu(*wptr);
> }
> ql_dbg(ql_dbg_init, vha, 0x004e,
> @@ -1104,10 +1104,9 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha)
> ha->isp_ops->read_optrom(vha, (uint8_t *)data,
> ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE);
>
> - cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) *
> - sizeof(struct qla_npiv_entry)) >> 1;
> - for (wptr = data, chksum = 0; cnt; cnt--)
> - chksum += le16_to_cpu(*wptr++);
> + cnt = (sizeof(hdr) + le16_to_cpu(hdr.entries) * sizeof(*entry)) >> 1;
> + for (wptr = data, chksum = 0; cnt--; wptr++)
> + chksum += le16_to_cpu(*wptr);
> if (chksum) {
> ql_dbg(ql_dbg_user, vha, 0x7092,
> "Inconsistent NPIV-Config "
> --
> 1.7.7
>
> --
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Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
--
Johannes Thumshirn Storage
jthumshirn@suse.de +49 911 74053 689
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
Key fingerprint = EC38 9CAB C2C4 F25D 8600 D0D0 0393 969D 2D76 0850
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