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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id i66sm39133pfc.12.2020.07.14.13.02.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jul 2020 13:02:33 -0700 (PDT) Date: Tue, 14 Jul 2020 13:00:27 -0700 From: Bjorn Andersson To: Eric Biggers Cc: Rob Herring , Andy Gross , SCSI , linux-arm-msm , linux-fscrypt@vger.kernel.org, Alim Akhtar , Avri Altman , Barani Muthukumaran , Can Guo , Elliot Berman , John Stultz , "Martin K. Petersen" , Satya Tangirala , Steev Klimaszewski , Thara Gopinath Subject: Re: [PATCH v6 3/5] arm64: dts: sdm845: add Inline Crypto Engine registers and clock Message-ID: <20200714200027.GH388985@builder.lan> References: <20200710072013.177481-4-ebiggers@kernel.org> <20200714161516.GA1064009@gmail.com> <20200714164353.GB1064009@gmail.com> <20200714171203.GC1064009@gmail.com> <20200714173111.GG388985@builder.lan> <20200714174345.GE1218486@builder.lan> <20200714175718.GD1064009@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200714175718.GD1064009@gmail.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org On Tue 14 Jul 10:57 PDT 2020, Eric Biggers wrote: > On Tue, Jul 14, 2020 at 10:43:45AM -0700, Bjorn Andersson wrote: > > On Tue 14 Jul 10:31 PDT 2020, Bjorn Andersson wrote: > > > > > On Tue 14 Jul 10:12 PDT 2020, Eric Biggers wrote: > > > > > > > On Tue, Jul 14, 2020 at 10:59:44AM -0600, Rob Herring wrote: > > > > > On Tue, Jul 14, 2020 at 10:43 AM Eric Biggers wrote: > > > > > > > > > > > > On Tue, Jul 14, 2020 at 10:35:12AM -0600, Rob Herring wrote: > > > > > > > On Tue, Jul 14, 2020 at 10:15 AM Eric Biggers wrote: > > > > > > > > > > > > > > > > On Tue, Jul 14, 2020 at 10:16:04AM -0400, Martin K. Petersen wrote: > > > > > > > > > > > > > > > > > > Eric, > > > > > > > > > > > > > > > > > > > Add the vendor-specific registers and clock for Qualcomm ICE (Inline > > > > > > > > > > Crypto Engine) to the device tree node for the UFS host controller on > > > > > > > > > > sdm845, so that the ufs-qcom driver will be able to use inline crypto. > > > > > > > > > > > > > > > > > > I would like to see an Acked-by for this patch before I merge it. > > > > > > > > > > > > > > > > > > > > > > > > > Andy, Bjorn, or Rob: can you give Acked-by? > > > > > > > > > > > > > > DTS changes should go in via the QCom tree. > > > > > > > > > > > > > > > > > > > So, the DTS patch can't be applied without the driver patches since then the > > > > > > driver would misinterpret the ICE registers as the dev_ref_clk_ctrl registers. > > > > > > > > > > That sounds broken, but there's no context here for me to comment > > > > > further. DTS changes should work with old/stable kernels. I'd suggest > > > > > you get a review from Bjorn on the driver first. > > > > > > > > > > > > > The "breaking" change is that the dev_ref_clk_ctrl registers are now identified > > > > by name instead of assumed to be index 1. > > > > > > > > A reviewer had complained about the device-mapper bindings of this driver before > > > > (https://lkml.kernel.org/r/158334171487.7173.5606223900174949177@swboyd.mtv.corp.google.com). > > > > Changing to identifying the registers by name seemed like an improvement. > > > > > > > > If needed I can add a hole at index 1 to make the DTS changes work with > > > > old/stable kernels too, but I didn't know that is a requirement. (Normally for > > > > Linux kernel development, kernel-internal refactoring is always allowed > > > > upstream.) If I do this, would this hack have to be carried forever, or would > > > > we be able to fix it up eventually? Is there any deprecation period for DTS, or > > > > do the latest DTS have to work with a 20 year old kernel? > > > > > > > > > > The problem here is that DT binding refactoring is not kernel-internal. > > > It's two different projects living in the same git. > > > > > > There's a wish from various people that we make sure that new DTS > > > continues to work with existing kernels. This is a nice in theory > > > there's a lot of examples where we simply couldn't anticipate how future > > > bindings would look. A particular example is that this prohibits most > > > advancement in power management. > > > > > > > > > But afaict what you describe above would make a new kernel failing to > > > operate with the old DTS and that we have agreed to avoid. > > > So I think the appropriate way to deal with this is to request the reg > > > byname to detect the new binding and if that fails then assume that > > > index 1 is dev_ref_clk_ctrl. > > > > > > > I took another look at the git history and I can't find a single dts - > > either upstream or in any downstream tree - that specifies that second > > reg. > > > > So per my argument below, if you could include a patch that just removes > > the "dev_ref_clk_ctrl_mem" reference from the binding and driver I would > > be happy to r-b that and ack this patch. > > > > Regards, > > Bjorn > > > > > > > > There are cases where we just decide not to be backwards compatible, but > > > it's pretty rare. As for deprecation, I think 1-2 LTS releases is > > > sufficient, at that time scale it doesn't make sense to sit with an old > > > DTB anyways (given the current pace of advancements in the kernel). > > > > > Great, I'll remove the driver support for "dev_ref_clk_ctrl" then. However, > that doesn't solve the problem of the new DTS breaking old drivers, since old > drivers assume that reg[1] is dev_ref_clk_ctrl. > > This patch makes the DTS look like: > > reg = <0 0x01d84000 0 0x2500>, > <0 0x01d90000 0 0x8000>; > reg-names = "std", "ice"; > > The "ice" registers are new and are accessed by name instead of by index. > > But these also happen to be in reg[1]. Old drivers will see that reg[1] is > present and assume it is dev_ref_clk_ctrl. > > To work around this, I could leave a blank reg[1] entry: > > reg = <0 0x01d84000 0 0x2500>, > <0 0 0 0>, > <0 0x01d90000 0 0x8000>; > reg-names = "std", "dev_ref_clk_ctrl", "ice"; > > Do I need to do that? > No, let's not complicate it without good reason. SDM845 has hw_ver.major == 3, so we're not taking the else-path in ufs_qcom_init(). So I should be able to just merge this patch for 5.9 through the qcom tree after all (your code handles that it's not there and the existing code doesn't care). The two platforms that I can find that has UFS controller of hw_ver.major == 1 is APQ8084 and MSM8994, so I simply didn't look at an old enough downstream tree (msm-3.10) to find anyone specifying reg[1]. The reg specified is however coming from the TLMM (pinctrl-msm) hardware block, so it should not be directly remapped in the UFS driver... But regardless, that has not been seen in an upstream dts and per your patch 2 we would add that reg by name when that happens. There's recent activity on upstreaming more of the MSM8994 support, so perhaps then it's best to leave this snippet in the driver for now. Summary: Martin merges (merged?) patch 1, 2, 4 and 5 in the scsi tree, I'll merge this patch as is in the qcom tree and we'll just leave the dev_ref_clk handling as is for now then. Regards, Bjorn