From: Sumit Saxena <sumit.saxena@broadcom.com>
To: linux-scsi@vger.kernel.org
Cc: martin.petersen@oracle.com, bvanassche@acm.org, hch@lst.de,
hare@suse.de, himanshu.madhani@oracle.com,
sathya.prakash@broadcom.com, kashyap.desai@broadcom.com,
chandrakanth.patil@broadcom.com, sreekanth.reddy@broadcom.com,
prayas.patel@broadcom.com,
Sumit Saxena <sumit.saxena@broadcom.com>
Subject: [PATCH v7 3/8] mpi3mr: Move data structures/definitions from MPI headers to uapi header
Date: Fri, 29 Apr 2022 17:16:36 -0400 [thread overview]
Message-ID: <20220429211641.642010-4-sumit.saxena@broadcom.com> (raw)
In-Reply-To: <20220429211641.642010-1-sumit.saxena@broadcom.com>
[-- Attachment #1: Type: text/plain, Size: 12502 bytes --]
This patch moves the data structures/definitions which are used by
userspace applications from MPI headers to uapi/scsi/scsi_bsg_mpi3mr.h
Reported by: Stephen Rothwell <sfr@canb.auug.org.au>
Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com>
Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
drivers/scsi/mpi3mr/mpi/mpi30_init.h | 53 ------------
drivers/scsi/mpi3mr/mpi/mpi30_ioc.h | 17 ----
drivers/scsi/mpi3mr/mpi/mpi30_pci.h | 31 +------
drivers/scsi/mpi3mr/mpi3mr.h | 1 +
include/uapi/scsi/scsi_bsg_mpi3mr.h | 117 +++++++++++++++++++++++++++
5 files changed, 119 insertions(+), 100 deletions(-)
diff --git a/drivers/scsi/mpi3mr/mpi/mpi30_init.h b/drivers/scsi/mpi3mr/mpi/mpi30_init.h
index e2e8b22e9122..aac11c58cca9 100644
--- a/drivers/scsi/mpi3mr/mpi/mpi30_init.h
+++ b/drivers/scsi/mpi3mr/mpi/mpi30_init.h
@@ -115,57 +115,4 @@ struct mpi3_scsi_io_reply {
#define MPI3_SCSI_RSP_ARI0_MASK (0xff000000)
#define MPI3_SCSI_RSP_ARI0_SHIFT (24)
#define MPI3_SCSI_TASKTAG_UNKNOWN (0xffff)
-struct mpi3_scsi_task_mgmt_request {
- __le16 host_tag;
- u8 ioc_use_only02;
- u8 function;
- __le16 ioc_use_only04;
- u8 ioc_use_only06;
- u8 msg_flags;
- __le16 change_count;
- __le16 dev_handle;
- __le16 task_host_tag;
- u8 task_type;
- u8 reserved0f;
- __le16 task_request_queue_id;
- __le16 reserved12;
- __le32 reserved14;
- u8 lun[8];
-};
-
-#define MPI3_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x08)
-#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
-#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK_SET (0x02)
-#define MPI3_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
-#define MPI3_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
-#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
-#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
-#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_ACA (0x08)
-#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK_SET (0x09)
-#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_ASYNC_EVENT (0x0a)
-#define MPI3_SCSITASKMGMT_TASKTYPE_I_T_NEXUS_RESET (0x0b)
-struct mpi3_scsi_task_mgmt_reply {
- __le16 host_tag;
- u8 ioc_use_only02;
- u8 function;
- __le16 ioc_use_only04;
- u8 ioc_use_only06;
- u8 msg_flags;
- __le16 ioc_use_only08;
- __le16 ioc_status;
- __le32 ioc_log_info;
- __le32 termination_count;
- __le32 response_data;
- __le32 reserved18;
-};
-
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_COMPLETE (0x00)
-#define MPI3_SCSITASKMGMT_RSPCODE_INVALID_FRAME (0x02)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_FUNCTION_NOT_SUPPORTED (0x04)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_FAILED (0x05)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_SUCCEEDED (0x08)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_INVALID_LUN (0x09)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_OVERLAPPED_TAG (0x0a)
-#define MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC (0x80)
-#define MPI3_SCSITASKMGMT_RSPCODE_TM_NVME_DENIED (0x81)
#endif
diff --git a/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h b/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
index 33fc05f218d6..214e4c65e576 100644
--- a/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
+++ b/drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
@@ -637,23 +637,6 @@ struct mpi3_event_data_diag_buffer_status_change {
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RELEASED (0x01)
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_PAUSED (0x02)
#define MPI3_EVENT_DIAG_BUFFER_STATUS_CHANGE_RC_RESUMED (0x03)
-#define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200)
-#define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100)
-#define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080)
-#define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040)
-#define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020)
-#define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010)
-#define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008)
-#define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004)
-#define MPI3_PEL_LOCALE_FLAGS_PD (0x0002)
-#define MPI3_PEL_LOCALE_FLAGS_VD (0x0001)
-#define MPI3_PEL_CLASS_DEBUG (0x00)
-#define MPI3_PEL_CLASS_PROGRESS (0x01)
-#define MPI3_PEL_CLASS_INFORMATIONAL (0x02)
-#define MPI3_PEL_CLASS_WARNING (0x03)
-#define MPI3_PEL_CLASS_CRITICAL (0x04)
-#define MPI3_PEL_CLASS_FATAL (0x05)
-#define MPI3_PEL_CLASS_FAULT (0x06)
#define MPI3_PEL_CLEARTYPE_CLEAR (0x00)
#define MPI3_PEL_WAITTIME_INFINITE_WAIT (0x00)
#define MPI3_PEL_ACTION_GET_SEQNUM (0x01)
diff --git a/drivers/scsi/mpi3mr/mpi/mpi30_pci.h b/drivers/scsi/mpi3mr/mpi/mpi30_pci.h
index 77270f577f90..901dbd788940 100644
--- a/drivers/scsi/mpi3mr/mpi/mpi30_pci.h
+++ b/drivers/scsi/mpi3mr/mpi/mpi30_pci.h
@@ -5,24 +5,6 @@
*/
#ifndef MPI30_PCI_H
#define MPI30_PCI_H 1
-#ifndef MPI3_NVME_ENCAP_CMD_MAX
-#define MPI3_NVME_ENCAP_CMD_MAX (1)
-#endif
-struct mpi3_nvme_encapsulated_request {
- __le16 host_tag;
- u8 ioc_use_only02;
- u8 function;
- __le16 ioc_use_only04;
- u8 ioc_use_only06;
- u8 msg_flags;
- __le16 change_count;
- __le16 dev_handle;
- __le16 encapsulated_command_length;
- __le16 flags;
- __le32 data_length;
- __le32 reserved14[3];
- __le32 command[MPI3_NVME_ENCAP_CMD_MAX];
-};
#define MPI3_NVME_FLAGS_FORCE_ADMIN_ERR_REPLY_MASK (0x0002)
#define MPI3_NVME_FLAGS_FORCE_ADMIN_ERR_REPLY_FAIL_ONLY (0x0000)
@@ -30,16 +12,5 @@ struct mpi3_nvme_encapsulated_request {
#define MPI3_NVME_FLAGS_SUBMISSIONQ_MASK (0x0001)
#define MPI3_NVME_FLAGS_SUBMISSIONQ_IO (0x0000)
#define MPI3_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0001)
-struct mpi3_nvme_encapsulated_error_reply {
- __le16 host_tag;
- u8 ioc_use_only02;
- u8 function;
- __le16 ioc_use_only04;
- u8 ioc_use_only06;
- u8 msg_flags;
- __le16 ioc_use_only08;
- __le16 ioc_status;
- __le32 ioc_log_info;
- __le32 nvme_completion_entry[4];
-};
+
#endif
diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h
index 877b0925dbc5..fb05aab48aa7 100644
--- a/drivers/scsi/mpi3mr/mpi3mr.h
+++ b/drivers/scsi/mpi3mr/mpi3mr.h
@@ -38,6 +38,7 @@
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include <scsi/scsi_tcq.h>
+#include <uapi/scsi/scsi_bsg_mpi3mr.h>
#include "mpi/mpi30_transport.h"
#include "mpi/mpi30_cnfg.h"
diff --git a/include/uapi/scsi/scsi_bsg_mpi3mr.h b/include/uapi/scsi/scsi_bsg_mpi3mr.h
index 66697d963f64..b2c88d5d9c4c 100644
--- a/include/uapi/scsi/scsi_bsg_mpi3mr.h
+++ b/include/uapi/scsi/scsi_bsg_mpi3mr.h
@@ -454,4 +454,121 @@ struct mpi3mr_bsg_packet {
struct mpi3mr_bsg_mptcmd mptcmd;
} cmd;
};
+
+
+/* MPI3: NVMe Encasulation related definitions */
+#ifndef MPI3_NVME_ENCAP_CMD_MAX
+#define MPI3_NVME_ENCAP_CMD_MAX (1)
+#endif
+
+struct mpi3_nvme_encapsulated_request {
+ __le16 host_tag;
+ __u8 ioc_use_only02;
+ __u8 function;
+ __le16 ioc_use_only04;
+ __u8 ioc_use_only06;
+ __u8 msg_flags;
+ __le16 change_count;
+ __le16 dev_handle;
+ __le16 encapsulated_command_length;
+ __le16 flags;
+ __le32 data_length;
+ __le32 reserved14[3];
+ __le32 command[MPI3_NVME_ENCAP_CMD_MAX];
+};
+
+struct mpi3_nvme_encapsulated_error_reply {
+ __le16 host_tag;
+ __u8 ioc_use_only02;
+ __u8 function;
+ __le16 ioc_use_only04;
+ __u8 ioc_use_only06;
+ __u8 msg_flags;
+ __le16 ioc_use_only08;
+ __le16 ioc_status;
+ __le32 ioc_log_info;
+ __le32 nvme_completion_entry[4];
+};
+
+/* MPI3: task management related definitions */
+struct mpi3_scsi_task_mgmt_request {
+ __le16 host_tag;
+ __u8 ioc_use_only02;
+ __u8 function;
+ __le16 ioc_use_only04;
+ __u8 ioc_use_only06;
+ __u8 msg_flags;
+ __le16 change_count;
+ __le16 dev_handle;
+ __le16 task_host_tag;
+ __u8 task_type;
+ __u8 reserved0f;
+ __le16 task_request_queue_id;
+ __le16 reserved12;
+ __le32 reserved14;
+ __u8 lun[8];
+};
+
+#define MPI3_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x08)
+#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
+#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK_SET (0x02)
+#define MPI3_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
+#define MPI3_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
+#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
+#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
+#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_ACA (0x08)
+#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK_SET (0x09)
+#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_ASYNC_EVENT (0x0a)
+#define MPI3_SCSITASKMGMT_TASKTYPE_I_T_NEXUS_RESET (0x0b)
+struct mpi3_scsi_task_mgmt_reply {
+ __le16 host_tag;
+ __u8 ioc_use_only02;
+ __u8 function;
+ __le16 ioc_use_only04;
+ __u8 ioc_use_only06;
+ __u8 msg_flags;
+ __le16 ioc_use_only08;
+ __le16 ioc_status;
+ __le32 ioc_log_info;
+ __le32 termination_count;
+ __le32 response_data;
+ __le32 reserved18;
+};
+
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_COMPLETE (0x00)
+#define MPI3_SCSITASKMGMT_RSPCODE_INVALID_FRAME (0x02)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_FUNCTION_NOT_SUPPORTED (0x04)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_FAILED (0x05)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_SUCCEEDED (0x08)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_INVALID_LUN (0x09)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_OVERLAPPED_TAG (0x0a)
+#define MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC (0x80)
+#define MPI3_SCSITASKMGMT_RSPCODE_TM_NVME_DENIED (0x81)
+
+/* MPI3: PEL related definitions */
+#define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200)
+#define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100)
+#define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080)
+#define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040)
+#define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020)
+#define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010)
+#define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008)
+#define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004)
+#define MPI3_PEL_LOCALE_FLAGS_PD (0x0002)
+#define MPI3_PEL_LOCALE_FLAGS_VD (0x0001)
+#define MPI3_PEL_CLASS_DEBUG (0x00)
+#define MPI3_PEL_CLASS_PROGRESS (0x01)
+#define MPI3_PEL_CLASS_INFORMATIONAL (0x02)
+#define MPI3_PEL_CLASS_WARNING (0x03)
+#define MPI3_PEL_CLASS_CRITICAL (0x04)
+#define MPI3_PEL_CLASS_FATAL (0x05)
+#define MPI3_PEL_CLASS_FAULT (0x06)
+
+/* MPI3: Function definitions */
+#define MPI3_BSG_FUNCTION_MGMT_PASSTHROUGH (0x0a)
+#define MPI3_BSG_FUNCTION_SCSI_IO (0x20)
+#define MPI3_BSG_FUNCTION_SCSI_TASK_MGMT (0x21)
+#define MPI3_BSG_FUNCTION_SMP_PASSTHROUGH (0x22)
+#define MPI3_BSG_FUNCTION_NVME_ENCAPSULATED (0x24)
+
#endif
--
2.27.0
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next prev parent reply other threads:[~2022-04-29 21:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-29 21:16 [PATCH v7 0/8] mpi3mr: add BSG interface support for controller management Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 1/8] mpi3mr: Add bsg device support Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 2/8] mpi3mr: Add support for driver commands Sumit Saxena
2022-04-29 21:16 ` Sumit Saxena [this message]
2022-04-29 21:16 ` [PATCH v7 4/8] mpi3mr: Add support for MPT commands Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 5/8] mpi3mr: Add support for PEL commands Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 6/8] mpi3mr: Expose adapter state to sysfs Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 7/8] mpi3mr: Add support for NVMe passthrough Sumit Saxena
2022-04-29 21:16 ` [PATCH v7 8/8] mpi3mr: Update driver version to 8.0.0.69.0 Sumit Saxena
2022-05-02 21:43 ` [PATCH v7 0/8] mpi3mr: add BSG interface support for controller management Martin K. Petersen
2022-05-11 2:38 ` Martin K. Petersen
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