From: Stanley Chu <stanley.chu@mediatek.com>
To: <linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<martin.petersen@oracle.com>, <avri.altman@wdc.com>,
<alim.akhtar@samsung.com>, <jejb@linux.ibm.com>,
<bvanassche@acm.org>
Cc: <peter.wang@mediatek.com>, <chun-hung.wu@mediatek.com>,
<alice.chao@mediatek.com>, <powen.kao@mediatek.com>,
<mason.zhang@mediatek.com>, <qilin.tan@mediatek.com>,
<lin.gui@mediatek.com>, <eddie.huang@mediatek.com>,
<tun-yu.yu@mediatek.com>, <cc.chou@mediatek.com>,
<chaotian.jing@mediatek.com>, <jiajie.hao@mediatek.com>,
<stanley.chu@mediatek.com>
Subject: [PATCH v3 08/10] scsi: ufs-mediatek: Support low-power mode for parents of VCCQx
Date: Tue, 14 Jun 2022 22:16:53 +0800 [thread overview]
Message-ID: <20220614141655.14409-9-stanley.chu@mediatek.com> (raw)
In-Reply-To: <20220614141655.14409-1-stanley.chu@mediatek.com>
Provide the facility to configure parents of VCCQx power rails
as low-power or full-power mode in MediaTek UFS platforms.
Signed-off-by: Alice Chao <alice.chao@mediatek.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
---
drivers/ufs/host/ufs-mediatek.c | 45 +++++++++++++++++++++++----------
drivers/ufs/host/ufs-mediatek.h | 4 +++
2 files changed, 36 insertions(+), 13 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 9337ce27329b..2c1e55f8d7c6 100755
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1013,10 +1013,29 @@ static int ufs_mtk_link_set_lpm(struct ufs_hba *hba)
return 0;
}
-static void ufs_mtk_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
+static void ufs_mtk_vccqx_set_lpm(struct ufs_hba *hba, bool lpm)
{
struct ufs_vreg *vccqx = NULL;
+ if (hba->vreg_info.vccq)
+ vccqx = hba->vreg_info.vccq;
+ else
+ vccqx = hba->vreg_info.vccq2;
+
+ regulator_set_mode(vccqx->reg,
+ lpm ? REGULATOR_MODE_IDLE : REGULATOR_MODE_NORMAL);
+}
+
+static void ufs_mtk_vsx_set_lpm(struct ufs_hba *hba, bool lpm)
+{
+ struct arm_smccc_res res;
+
+ ufs_mtk_device_pwr_ctrl(!lpm,
+ (unsigned long)hba->dev_info.wspecversion, res);
+}
+
+static void ufs_mtk_dev_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
+{
if (!hba->vreg_info.vccq && !hba->vreg_info.vccq2)
return;
@@ -1032,13 +1051,13 @@ static void ufs_mtk_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
if (lpm && hba->vreg_info.vcc->enabled)
return;
- if (hba->vreg_info.vccq)
- vccqx = hba->vreg_info.vccq;
- else
- vccqx = hba->vreg_info.vccq2;
-
- regulator_set_mode(vccqx->reg,
- lpm ? REGULATOR_MODE_IDLE : REGULATOR_MODE_NORMAL);
+ if (lpm) {
+ ufs_mtk_vccqx_set_lpm(hba, lpm);
+ ufs_mtk_vsx_set_lpm(hba, lpm);
+ } else {
+ ufs_mtk_vsx_set_lpm(hba, lpm);
+ ufs_mtk_vccqx_set_lpm(hba, lpm);
+ }
}
static void ufs_mtk_auto_hibern8_disable(struct ufs_hba *hba)
@@ -1105,7 +1124,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
int err;
if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)
- ufs_mtk_vreg_set_lpm(hba, false);
+ ufs_mtk_dev_vreg_set_lpm(hba, false);
err = ufs_mtk_mphy_power_on(hba, true);
if (err)
@@ -1283,7 +1302,7 @@ int ufs_mtk_system_suspend(struct device *dev)
ret = ufshcd_system_suspend(dev);
if (!ret)
- ufs_mtk_vreg_set_lpm(hba, true);
+ ufs_mtk_dev_vreg_set_lpm(hba, true);
return ret;
}
@@ -1293,7 +1312,7 @@ int ufs_mtk_system_resume(struct device *dev)
int ret = 0;
struct ufs_hba *hba = dev_get_drvdata(dev);
- ufs_mtk_vreg_set_lpm(hba, false);
+ ufs_mtk_dev_vreg_set_lpm(hba, false);
ret = ufshcd_system_resume(dev);
@@ -1308,7 +1327,7 @@ int ufs_mtk_runtime_suspend(struct device *dev)
ret = ufshcd_runtime_suspend(dev);
if (!ret)
- ufs_mtk_vreg_set_lpm(hba, true);
+ ufs_mtk_dev_vreg_set_lpm(hba, true);
return ret;
}
@@ -1318,7 +1337,7 @@ int ufs_mtk_runtime_resume(struct device *dev)
struct ufs_hba *hba = dev_get_drvdata(dev);
int ret = 0;
- ufs_mtk_vreg_set_lpm(hba, false);
+ ufs_mtk_dev_vreg_set_lpm(hba, false);
ret = ufshcd_runtime_resume(dev);
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 9117427ca6c4..eb26306a719f 100755
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -83,6 +83,7 @@ enum {
#define UFS_MTK_SIP_DEVICE_RESET BIT(1)
#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2)
#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3)
+#define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7)
/*
* VS_DEBUGCLOCKENABLE
@@ -199,4 +200,7 @@ struct ufs_mtk_host {
#define ufs_mtk_device_reset_ctrl(high, res) \
ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, res, high)
+#define ufs_mtk_device_pwr_ctrl(on, ufs_ver, res) \
+ ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, res, on, ufs_ver)
+
#endif /* !_UFS_MEDIATEK_H */
--
2.18.0
next prev parent reply other threads:[~2022-06-14 14:17 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-14 14:16 [PATCH v3 00/10] scsi: ufs: Fix PMC and low-power mode on MediaTek UFS platforms Stanley Chu
2022-06-14 14:16 ` [PATCH v3 01/10] scsi: ufs: Export ufshcd_uic_change_pwr_mode() Stanley Chu
2022-06-14 14:16 ` [PATCH v3 02/10] scsi: ufs: Fix ADAPT logic for HS-G5 Stanley Chu
2022-06-14 14:16 ` [PATCH v3 03/10] scsi: ufs-mediatek: Introduce workaround for power mode change Stanley Chu
2022-06-14 16:46 ` Bart Van Assche
2022-06-15 3:49 ` Stanley Chu
2022-06-14 14:16 ` [PATCH v3 04/10] scsi: ufs-mediatek: Fix the timing of configuring device regulators Stanley Chu
2022-06-14 16:33 ` Bart Van Assche
2022-06-15 3:49 ` Stanley Chu
2022-06-14 14:16 ` [PATCH v3 05/10] scsi: ufs-mediatek: Prevent device regulators setting as LPM incorrectly Stanley Chu
2022-06-14 14:16 ` [PATCH v3 06/10] scsi: ufs-mediatek: Support low-power mode for VCCQ Stanley Chu
2022-06-14 14:16 ` [PATCH v3 07/10] scsi: ufs-mediatek: Support flexible parameters for smc calls Stanley Chu
2022-06-14 16:28 ` Bart Van Assche
2022-06-15 3:48 ` Stanley Chu
2022-06-14 14:16 ` Stanley Chu [this message]
2022-06-14 14:16 ` [PATCH v3 09/10] scsi: ufs: Export regulator functions Stanley Chu
2022-06-14 14:16 ` [PATCH v3 10/10] scsi: ufs-mediatek: Support multiple VCC sources Stanley Chu
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