* [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS
2023-09-27 8:18 [PATCH V3 0/4] Add UFS host controller and Phy nodes for sc7280 Nitin Rawat
@ 2023-09-27 8:18 ` Nitin Rawat
2023-09-27 8:29 ` Nitin Rawat
0 siblings, 1 reply; 5+ messages in thread
From: Nitin Rawat @ 2023-09-27 8:18 UTC (permalink / raw)
To: agross, andersson, konrad.dybcio, mani, alim.akhtar, bvanassche,
avri.altman, robh+dt, krzysztof.kozlowski+dt, conor+dt,
cros-qcom-dts-watchers
Cc: linux-arm-msm, linux-scsi, linux-kernel, devicetree, Nitin Rawat
Align the binding property for clock such that "clocks" property
comes first followed by "clock-names" property.
Change-Id: I53282da8eee8ec349d315de7ada56c99bb12b00d
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
---
.../devicetree/bindings/ufs/qcom,ufs.yaml | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index 802640efa956..d17bdc4e934f 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -295,14 +295,6 @@ examples:
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
interconnect-names = "ufs-ddr", "cpu-ufs";
- clock-names = "core_clk",
- "bus_aggr_clk",
- "iface_clk",
- "core_clk_unipro",
- "ref_clk",
- "tx_lane0_sync_clk",
- "rx_lane0_sync_clk",
- "rx_lane1_sync_clk";
clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
@@ -311,6 +303,14 @@ examples:
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
freq-table-hz = <75000000 300000000>,
<0 0>,
<0 0>,
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS
@ 2023-09-27 8:27 Nitin Rawat
2023-09-28 17:04 ` Rob Herring
0 siblings, 1 reply; 5+ messages in thread
From: Nitin Rawat @ 2023-09-27 8:27 UTC (permalink / raw)
To: agross, andersson, konrad.dybcio, mani, alim.akhtar, bvanassche,
avri.altman, robh+dt, krzysztof.kozlowski+dt, conor+dt,
cros-qcom-dts-watchers
Cc: linux-arm-msm, linux-scsi, linux-kernel, devicetree, Nitin Rawat
Align the binding property for clock such that "clocks" property
comes first followed by "clock-names" property.
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
---
.../devicetree/bindings/ufs/qcom,ufs.yaml | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index 802640efa956..d17bdc4e934f 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -295,14 +295,6 @@ examples:
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
interconnect-names = "ufs-ddr", "cpu-ufs";
- clock-names = "core_clk",
- "bus_aggr_clk",
- "iface_clk",
- "core_clk_unipro",
- "ref_clk",
- "tx_lane0_sync_clk",
- "rx_lane0_sync_clk",
- "rx_lane1_sync_clk";
clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
@@ -311,6 +303,14 @@ examples:
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
freq-table-hz = <75000000 300000000>,
<0 0>,
<0 0>,
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS
2023-09-27 8:18 ` [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS Nitin Rawat
@ 2023-09-27 8:29 ` Nitin Rawat
2023-09-27 9:27 ` Konrad Dybcio
0 siblings, 1 reply; 5+ messages in thread
From: Nitin Rawat @ 2023-09-27 8:29 UTC (permalink / raw)
To: agross, andersson, konrad.dybcio, mani, alim.akhtar, bvanassche,
avri.altman, robh+dt, krzysztof.kozlowski+dt, conor+dt,
cros-qcom-dts-watchers
Cc: linux-arm-msm, linux-scsi, linux-kernel, devicetree
Hi ,
I have reposted this patch by removing the change id. Please ignore this.
Regards,
Nitin
On 9/27/2023 1:48 PM, Nitin Rawat wrote:
> Align the binding property for clock such that "clocks" property
> comes first followed by "clock-names" property.
>
> Change-Id: I53282da8eee8ec349d315de7ada56c99bb12b00d
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> ---
> .../devicetree/bindings/ufs/qcom,ufs.yaml | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index 802640efa956..d17bdc4e934f 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -295,14 +295,6 @@ examples:
> <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
> interconnect-names = "ufs-ddr", "cpu-ufs";
>
> - clock-names = "core_clk",
> - "bus_aggr_clk",
> - "iface_clk",
> - "core_clk_unipro",
> - "ref_clk",
> - "tx_lane0_sync_clk",
> - "rx_lane0_sync_clk",
> - "rx_lane1_sync_clk";
> clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
> <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> <&gcc GCC_UFS_PHY_AHB_CLK>,
> @@ -311,6 +303,14 @@ examples:
> <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
> <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
> <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
> + clock-names = "core_clk",
> + "bus_aggr_clk",
> + "iface_clk",
> + "core_clk_unipro",
> + "ref_clk",
> + "tx_lane0_sync_clk",
> + "rx_lane0_sync_clk",
> + "rx_lane1_sync_clk";
> freq-table-hz = <75000000 300000000>,
> <0 0>,
> <0 0>,
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS
2023-09-27 8:29 ` Nitin Rawat
@ 2023-09-27 9:27 ` Konrad Dybcio
0 siblings, 0 replies; 5+ messages in thread
From: Konrad Dybcio @ 2023-09-27 9:27 UTC (permalink / raw)
To: Nitin Rawat, agross, andersson, mani, alim.akhtar, bvanassche,
avri.altman, robh+dt, krzysztof.kozlowski+dt, conor+dt,
cros-qcom-dts-watchers
Cc: linux-arm-msm, linux-scsi, linux-kernel, devicetree
On 27.09.2023 10:29, Nitin Rawat wrote:
> Hi ,
> I have reposted this patch by removing the change id. Please ignore this.
>
> Regards,
> Nitin
You resent this in a way that totally breaks threading:
* cover letter v3
* patch 1 v3
* patch 2 v3
* patch 3 v3
* patch 4 v3
* patch 4 v3
For such minor changes, you can usually ask the maintainer
to fix it up while applying - worst case scenario they'll
ask you to resend the entire series.
For the contents:
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS
2023-09-27 8:27 [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS Nitin Rawat
@ 2023-09-28 17:04 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2023-09-28 17:04 UTC (permalink / raw)
To: Nitin Rawat
Cc: agross, andersson, konrad.dybcio, mani, alim.akhtar, bvanassche,
avri.altman, krzysztof.kozlowski+dt, conor+dt,
cros-qcom-dts-watchers, linux-arm-msm, linux-scsi, linux-kernel,
devicetree
On Wed, Sep 27, 2023 at 01:57:00PM +0530, Nitin Rawat wrote:
> Align the binding property for clock such that "clocks" property
> comes first followed by "clock-names" property.
Why do we care?
>
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> ---
> .../devicetree/bindings/ufs/qcom,ufs.yaml | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index 802640efa956..d17bdc4e934f 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -295,14 +295,6 @@ examples:
> <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
> interconnect-names = "ufs-ddr", "cpu-ufs";
>
> - clock-names = "core_clk",
> - "bus_aggr_clk",
> - "iface_clk",
> - "core_clk_unipro",
> - "ref_clk",
> - "tx_lane0_sync_clk",
> - "rx_lane0_sync_clk",
> - "rx_lane1_sync_clk";
> clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
> <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> <&gcc GCC_UFS_PHY_AHB_CLK>,
> @@ -311,6 +303,14 @@ examples:
> <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
> <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
> <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
> + clock-names = "core_clk",
> + "bus_aggr_clk",
> + "iface_clk",
> + "core_clk_unipro",
> + "ref_clk",
> + "tx_lane0_sync_clk",
> + "rx_lane0_sync_clk",
> + "rx_lane1_sync_clk";
> freq-table-hz = <75000000 300000000>,
> <0 0>,
> <0 0>,
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
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2023-09-27 8:18 [PATCH V3 0/4] Add UFS host controller and Phy nodes for sc7280 Nitin Rawat
2023-09-27 8:18 ` [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS Nitin Rawat
2023-09-27 8:29 ` Nitin Rawat
2023-09-27 9:27 ` Konrad Dybcio
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