From: Sumit Saxena <sumit.saxena@broadcom.com>
To: martin.petersen@oracle.com
Cc: linux-scsi@vger.kernel.org, sathya.prakash@broadcom.com,
chandrakanth.patil@broadcom.com, ranjan.kumar@broadcom.com,
Sumit Saxena <sumit.saxena@broadcom.com>
Subject: [PATCH 2/5] mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116
Date: Thu, 23 Nov 2023 21:31:29 +0530 [thread overview]
Message-ID: <20231123160132.4155-3-sumit.saxena@broadcom.com> (raw)
In-Reply-To: <20231123160132.4155-1-sumit.saxena@broadcom.com>
[-- Attachment #1: Type: text/plain, Size: 1468 bytes --]
Added PCI IDs checks for the cases where SAS5116 diverges from
SAS4116 in behavior.
Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
---
drivers/scsi/mpi3mr/mpi3mr_fw.c | 3 ++-
drivers/scsi/mpi3mr/mpi3mr_os.c | 5 ++++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index f039f1d98647..0d148c39ebcc 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -1892,7 +1892,8 @@ static int mpi3mr_create_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx)
reply_qid = qidx + 1;
op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD;
- if (!mrioc->pdev->revision)
+ if ((mrioc->pdev->device == MPI3_MFGPAGE_DEVID_SAS4116) &&
+ !mrioc->pdev->revision)
op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD4K;
op_reply_q->ci = 0;
op_reply_q->ephase = 1;
diff --git a/drivers/scsi/mpi3mr/mpi3mr_os.c b/drivers/scsi/mpi3mr/mpi3mr_os.c
index a8d7dbf0159a..91a22e6e5c3f 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_os.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_os.c
@@ -5101,7 +5101,10 @@ mpi3mr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mpi3mr_init_drv_cmd(&mrioc->evtack_cmds[i],
MPI3MR_HOSTTAG_EVTACKCMD_MIN + i);
- if (pdev->revision)
+ if ((pdev->device == MPI3_MFGPAGE_DEVID_SAS4116) &&
+ !pdev->revision)
+ mrioc->enable_segqueue = false;
+ else
mrioc->enable_segqueue = true;
init_waitqueue_head(&mrioc->reset_waitq);
--
2.18.1
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next prev parent reply other threads:[~2023-11-23 15:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-23 16:01 [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers Sumit Saxena
2023-11-23 16:01 ` [PATCH 1/5] mpi3mr: Add support for SAS5116 PCI IDs Sumit Saxena
2023-11-23 16:01 ` Sumit Saxena [this message]
2023-11-23 16:01 ` [PATCH 3/5] mpi3mr: Increase maximum number of PHYs to 64 from 32 Sumit Saxena
2023-11-24 11:45 ` kernel test robot
2023-11-23 16:01 ` [PATCH 4/5] mpi3mr: Add support for status reply descriptor Sumit Saxena
2023-11-23 16:01 ` [PATCH 5/5] mpi3mr: driver version upgrade to 8.5.0.0.50 Sumit Saxena
2023-11-25 1:55 ` [PATCH 0/5] mpi3mr: Add support for Broadcom SAS5116 IO/RAID controllers Martin K. Petersen
2023-12-06 3:16 ` Martin K. Petersen
-- strict thread matches above, loose matches on Subject: below --
2023-11-23 15:55 Sumit Saxena
2023-11-23 15:56 ` [PATCH 2/5] mpi3mr: Add PCI checks where SAS5116 diverges from SAS4116 Sumit Saxena
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