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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Manish Pandey <quic_mapa@quicinc.com>
Cc: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org,
	linux-kernel@vger.kernel.org, quic_nitirawa@quicinc.com,
	quic_cang@quicinc.com, quic_nguyenb@quicinc.com
Subject: Re: [PATCH V3 1/3] scsi: ufs-qcom: Add support for dumping HW and SW hibern8 count
Date: Tue, 18 Mar 2025 12:05:08 +0530	[thread overview]
Message-ID: <20250318063508.4iz4olthqq2rhjce@thinkpad> (raw)
In-Reply-To: <20250313051635.22073-2-quic_mapa@quicinc.com>

On Thu, Mar 13, 2025 at 10:46:33AM +0530, Manish Pandey wrote:
> This patch adds functionality to dump both hardware and software

No 'patch' in description. Once the patch is merged, it will become as 'commit'.

Also, please use imperative mood to describe the change. I don't know why this
is not followed since I believe, I've given this comment before also (if you
didn't read the process documentation).

> hibern8 enter counts. This enhancement will aid in monitoring and
> debugging hibern8 state transitions by providing detailed count
> information.
> 
> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
> ---
>  drivers/ufs/host/ufs-qcom.c | 9 +++++++++
>  drivers/ufs/host/ufs-qcom.h | 9 +++++++++
>  2 files changed, 18 insertions(+)
> 
> diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
> index 1b37449fbffc..f5181773c0e5 100644
> --- a/drivers/ufs/host/ufs-qcom.c
> +++ b/drivers/ufs/host/ufs-qcom.c
> @@ -1573,6 +1573,15 @@ static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba)
>  
>  	host = ufshcd_get_variant(hba);
>  
> +	dev_err(hba->dev, "HW_H8_ENTER_CNT=%d\n", ufshcd_readl(hba, REG_UFS_HW_H8_ENTER_CNT));
> +	dev_err(hba->dev, "HW_H8_EXIT_CNT=%d\n", ufshcd_readl(hba, REG_UFS_HW_H8_EXIT_CNT));
> +
> +	dev_err(hba->dev, "SW_H8_ENTER_CNT=%d\n", ufshcd_readl(hba, REG_UFS_SW_H8_ENTER_CNT));
> +	dev_err(hba->dev, "SW_H8_EXIT_CNT=%d\n", ufshcd_readl(hba, REG_UFS_SW_H8_EXIT_CNT));
> +
> +	dev_err(hba->dev, "SW_AFTER_HW_H8_ENTER_CNT=%d\n",
> +			ufshcd_readl(hba, REG_UFS_SW_AFTER_HW_H8_ENTER_CNT));
> +
>  	ufshcd_dump_regs(hba, REG_UFS_SYS1CLK_1US, 16 * 4,
>  			 "HCI Vendor Specific Registers ");
>  
> diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h
> index d0e6ec9128e7..a41db017009f 100644
> --- a/drivers/ufs/host/ufs-qcom.h
> +++ b/drivers/ufs/host/ufs-qcom.h
> @@ -75,6 +75,15 @@ enum {
>  	UFS_UFS_DBG_RD_EDTL_RAM			= 0x1900,
>  };
>  
> +/* Vendor-specific Hibern8 count registers for the QCOM UFS host controller. */

Get rid of 'for the QCOM UFS host controller'.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2025-03-18  6:35 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-13  5:16 [PATCH V3 0/3] scsi: ufs-qcom: Enable Dumping of Hibern8, MCQ, and Testbus Registers Manish Pandey
2025-03-13  5:16 ` [PATCH V3 1/3] scsi: ufs-qcom: Add support for dumping HW and SW hibern8 count Manish Pandey
2025-03-18  6:35   ` Manivannan Sadhasivam [this message]
2025-03-13  5:16 ` [PATCH V3 2/3] scsi: ufs-qcom: Add support for dumping MCQ registers Manish Pandey
2025-03-18  6:44   ` Manivannan Sadhasivam
2025-03-19  6:21     ` MANISH PANDEY
2025-03-24  7:39       ` Manivannan Sadhasivam
2025-03-25  9:02         ` MANISH PANDEY
2025-03-27 16:36           ` Manivannan Sadhasivam
2025-03-13  5:16 ` [PATCH V3 3/3] scsi: ufs-qcom: Add support for testbus registers Manish Pandey
2025-03-18  7:05   ` Manivannan Sadhasivam

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