Linux SCSI subsystem development
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From: Can Guo <can.guo@oss.qualcomm.com>
To: avri.altman@wdc.com, bvanassche@acm.org, beanhuo@micron.com,
	martin.petersen@oracle.com
Cc: linux-scsi@vger.kernel.org, Can Guo <can.guo@oss.qualcomm.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
	Peter Wang <peter.wang@mediatek.com>,
	"Bao D. Nguyen" <quic_nguyenb@quicinc.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH 06/11] scsi: ufs: core: Add support to retrain TX Equalization via debugfs
Date: Fri, 27 Feb 2026 08:08:03 -0800	[thread overview]
Message-ID: <20260227160809.2620598-7-can.guo@oss.qualcomm.com> (raw)
In-Reply-To: <20260227160809.2620598-1-can.guo@oss.qualcomm.com>

When environmental changes happen too much and too fast during runtime,
e.g., temperature, it might be required to retrain TX Equalization to find
the new optimal TX EQ settings to compensate. Add support to retrain TX
Equalization via debugfs, so that userspace can decide when to trigger it.

Signed-off-by: Can Guo <can.guo@oss.qualcomm.com>
---
 drivers/ufs/core/ufs-debugfs.c | 32 ++++++++++++
 drivers/ufs/core/ufs-txeq.c    | 89 +++++++++++++++++++++++++++++++++-
 drivers/ufs/core/ufshcd-priv.h |  6 ++-
 drivers/ufs/core/ufshcd.c      | 10 ++--
 4 files changed, 127 insertions(+), 10 deletions(-)

diff --git a/drivers/ufs/core/ufs-debugfs.c b/drivers/ufs/core/ufs-debugfs.c
index 53deb8b2d1ea..5a52c2ad44f5 100644
--- a/drivers/ufs/core/ufs-debugfs.c
+++ b/drivers/ufs/core/ufs-debugfs.c
@@ -230,6 +230,36 @@ static int tx_eq_gear_set(void *data, u64 val)
 
 DEFINE_DEBUGFS_ATTRIBUTE(tx_eq_gear_fops, tx_eq_gear_get, tx_eq_gear_set, "%#llx\n");
 
+static int retrain_tx_eq_set(void *data, u64 val)
+{
+	struct ufs_hba *hba = data;
+	struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
+	u32 gear = (u32)val;
+	int err;
+
+	if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL)
+		return -EBUSY;
+
+	if (!hba->ufs_device_wlun)
+		return -ENODEV;
+
+	if (gear < UFS_HS_G1 || gear >= UFS_HS_GEAR_MAX ||
+	    !hba->max_pwr_info.is_valid || gear > pwr_info->gear_tx)
+		return -EINVAL;
+
+	err = ufs_debugfs_get_user_access(hba);
+	if (err)
+		return err;
+	ufshcd_hold(hba);
+	err = ufshcd_retrain_tx_eq(hba, gear);
+	ufshcd_release(hba);
+	ufs_debugfs_put_user_access(hba);
+
+	return err;
+}
+
+DEFINE_DEBUGFS_ATTRIBUTE(retrain_tx_eq_fops, NULL, retrain_tx_eq_set, "%#llx\n");
+
 static int ufs_tx_eq_params_show(struct seq_file *s, void *data)
 {
 	struct ufs_debugfs_attr *attr = s->private;
@@ -433,6 +463,8 @@ void ufs_debugfs_hba_init(struct ufs_hba *hba)
 	hba->debugfs_tx_eq_gear = UFS_HS_GEAR_MAX - 1;
 	debugfs_create_file("tx_eq_gear_sel", 0600, hba->debugfs_root, hba,
 			    &tx_eq_gear_fops);
+	debugfs_create_file("retrain_tx_eq", 0200, hba->debugfs_root, hba,
+			    &retrain_tx_eq_fops);
 	for (attr = ufs_tx_eq_attrs; attr->name; attr++)
 		debugfs_create_file(attr->name, attr->mode, root, (void *)attr,
 				    attr->fops);
diff --git a/drivers/ufs/core/ufs-txeq.c b/drivers/ufs/core/ufs-txeq.c
index 1eaaca7c34a4..55d8d4f49146 100644
--- a/drivers/ufs/core/ufs-txeq.c
+++ b/drivers/ufs/core/ufs-txeq.c
@@ -1075,6 +1075,7 @@ static int ufshcd_tx_eqtr(struct ufs_hba *hba,
  * ufshcd_config_tx_eq_settings - Configure TX Equalization settings
  * @hba: per adapter instance
  * @pwr_mode: target power mode containing gear and rate information
+ * @force_tx_eqtr: do a TX EQTR regardless
  *
  * This function finds and sets the TX Equalization settings for the given
  * target power mode.
@@ -1082,7 +1083,8 @@ static int ufshcd_tx_eqtr(struct ufs_hba *hba,
  * Returns 0 on success, error code otherwise
  */
 int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
-				 struct ufs_pa_layer_attr *pwr_mode)
+				 struct ufs_pa_layer_attr *pwr_mode,
+				 bool force_tx_eqtr)
 {
 	struct ufshcd_tx_eq_params *params;
 	u32 gear, rate;
@@ -1118,7 +1120,7 @@ int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
 	if (gear < UFS_HS_G4)
 		goto apply_tx_eq_settings;
 
-	if (!params->is_valid) {
+	if (!params->is_valid || force_tx_eqtr) {
 		ret = ufshcd_tx_eqtr(hba, params, pwr_mode);
 		if (ret) {
 			dev_err(hba->dev, "Failed to train TX Equalization for HS-G%u, Rate-%s: %d\n",
@@ -1178,3 +1180,86 @@ void ufshcd_apply_valid_tx_eq_settings(struct ufs_hba *hba)
 		}
 	}
 }
+
+static int ufshcd_retrain_tx_eq_prepare(struct ufs_hba *hba)
+{
+	int ret = 0;
+
+	mutex_lock(&hba->host->scan_mutex);
+	blk_mq_quiesce_tagset(&hba->host->tag_set);
+	down_write(&hba->clk_scaling_lock);
+
+	if (ufshcd_wait_for_pending_cmds(hba, 1 * USEC_PER_SEC)) {
+		ret = -EBUSY;
+		up_write(&hba->clk_scaling_lock);
+		blk_mq_unquiesce_tagset(&hba->host->tag_set);
+		mutex_unlock(&hba->host->scan_mutex);
+		goto out;
+	}
+
+	ufshcd_hold(hba);
+
+out:
+	return ret;
+}
+
+static void ufshcd_retrain_tx_eq_unprepare(struct ufs_hba *hba)
+{
+	up_write(&hba->clk_scaling_lock);
+	blk_mq_unquiesce_tagset(&hba->host->tag_set);
+	mutex_unlock(&hba->host->scan_mutex);
+	ufshcd_release(hba);
+}
+
+int ufshcd_retrain_tx_eq(struct ufs_hba *hba, u32 gear)
+{
+	struct ufs_pa_layer_attr new_pwr_info, final_params = { 0 };
+	int ret;
+
+	if (!ufshcd_is_tx_eq_supported(hba) || !use_adaptive_txeq)
+		return -EOPNOTSUPP;
+
+	if (gear < adaptive_txeq_gear)
+		return -ETOOSMALL;
+
+	ret = ufshcd_retrain_tx_eq_prepare(hba);
+	if (ret)
+		return ret;
+
+	/* scale up clocks to max frequency before TX EQTR */
+	if (ufshcd_is_clkscaling_supported(hba))
+		ufshcd_scale_clks(hba, ULONG_MAX, true);
+
+	new_pwr_info = hba->pwr_info;
+	new_pwr_info.gear_tx = gear;
+	new_pwr_info.gear_rx = gear;
+
+	ret = ufshcd_vops_negotiate_pwr_mode(hba, &new_pwr_info, &final_params);
+	if (ret)
+		memcpy(&final_params, &new_pwr_info, sizeof(final_params));
+
+	if (final_params.gear_tx != gear) {
+		dev_err(hba->dev, "%s: Negotiated Gear (%u) does not match target Gear (%u)\n",
+			__func__, final_params.gear_tx, gear);
+		goto out;
+	}
+
+	ret = ufshcd_config_tx_eq_settings(hba, &final_params, true);
+	if (ret) {
+		dev_err(hba->dev, "%s: Failed to configure TX Equalization settings for HS-G%u, Rate-%s: %d\n",
+			__func__, final_params.gear_tx,
+			UFS_HS_RATE_STRING(final_params.hs_rate), ret);
+		goto out;
+	}
+
+	/* Change Power Mode to apply the new TX EQ settings */
+	ret = ufshcd_change_power_mode(hba, &final_params, /*force_pmc=*/true);
+	if (ret)
+		dev_err(hba->dev, "%s: Failed to change Power Mode to HS-G%u, Rate-%s: %d\n",
+			__func__, final_params.gear_tx,
+			UFS_HS_RATE_STRING(final_params.hs_rate), ret);
+
+out:
+	ufshcd_retrain_tx_eq_unprepare(hba);
+	return ret;
+}
diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 87777d3f4326..95503fb3235d 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -102,12 +102,16 @@ int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
 
 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
 int ufshcd_read_device_lvl_exception_id(struct ufs_hba *hba, u64 *exception_id);
+int ufshcd_wait_for_pending_cmds(struct ufs_hba *hba, u64 wait_timeout_us);
+int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq, bool scale_up);
 
 int ufshcd_trigger_tx_eqtr(struct ufs_hba *hba, int gear);
 void ufshcd_apply_valid_tx_eq_settings(struct ufs_hba *hba);
 int ufshcd_config_tx_eq_settings(struct ufs_hba *hba,
-				 struct ufs_pa_layer_attr *pwr_mode);
+				 struct ufs_pa_layer_attr *pwr_mode,
+				 bool force_tx_eqtr);
 void ufshcd_print_tx_eq_params(struct ufs_hba *hba);
+int ufshcd_retrain_tx_eq(struct ufs_hba *hba, u32 target_gear);
 
 /* Wrapper functions for safely calling variant operations */
 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index ed6793b1b7a1..0cdd61a980c3 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -332,8 +332,6 @@ static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
-static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq,
-			     bool scale_up);
 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
@@ -1208,8 +1206,7 @@ static int ufshcd_opp_set_rate(struct ufs_hba *hba, unsigned long freq)
  *
  * Return: 0 if successful; < 0 upon failure.
  */
-static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq,
-			     bool scale_up)
+int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq, bool scale_up)
 {
 	int ret = 0;
 	ktime_t start = ktime_get();
@@ -1308,8 +1305,7 @@ static u32 ufshcd_pending_cmds(struct ufs_hba *hba)
  *
  * Return: 0 upon success; -EBUSY upon timeout.
  */
-static int ufshcd_wait_for_pending_cmds(struct ufs_hba *hba,
-					u64 wait_timeout_us)
+int ufshcd_wait_for_pending_cmds(struct ufs_hba *hba, u64 wait_timeout_us)
 {
 	int ret = 0;
 	u32 tm_doorbell;
@@ -4812,7 +4808,7 @@ int ufshcd_config_pwr_mode(struct ufs_hba *hba,
 	if (ret)
 		memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
 
-	ret = ufshcd_config_tx_eq_settings(hba, &final_params);
+	ret = ufshcd_config_tx_eq_settings(hba, &final_params, false);
 	if (ret) {
 		dev_err(hba->dev, "Failed to configure TX Equalization settings for HS-G%u, Rate-%s: %d\n",
 			final_params.gear_tx,
-- 
2.34.1


  parent reply	other threads:[~2026-02-27 16:09 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-27 16:07 [PATCH 00/11] scsi: ufs: Add TX Equalization support for UFS 5.0 Can Guo
2026-02-27 16:07 ` [PATCH 01/11] scsi: ufs: core: Introduce a new ufshcd vops negotiate_pwr_mode() Can Guo
2026-02-27 19:31   ` Bart Van Assche
2026-03-01 14:26     ` Can Guo
2026-03-01 17:51       ` Bart Van Assche
2026-03-02  0:15         ` Can Guo
2026-02-27 16:07 ` [PATCH 02/11] scsi: ufs: core: Pass force_pmc to ufshcd_config_pwr_mode() as a parameter Can Guo
2026-02-27 20:46   ` Bart Van Assche
2026-03-02  0:52     ` Can Guo
2026-02-27 16:08 ` [PATCH 03/11] scsi: ufs: core: Add UFS_HS_G6 and UFS_HS_GEAR_MAX to enum ufs_hs_gear_tag Can Guo
2026-02-27 16:08 ` [PATCH 04/11] scsi: ufs: core: Add support for TX Equalization Can Guo
2026-02-27 21:39   ` Bart Van Assche
2026-03-02  3:46     ` Can Guo
2026-02-27 22:04   ` kernel test robot
2026-02-27 16:08 ` [PATCH 05/11] scsi: ufs: core: Add debugfs entries for TX Equalization params Can Guo
2026-02-27 21:49   ` Bart Van Assche
2026-03-02  5:46     ` Can Guo
2026-02-27 16:08 ` Can Guo [this message]
2026-02-27 21:55   ` [PATCH 06/11] scsi: ufs: core: Add support to retrain TX Equalization via debugfs Bart Van Assche
2026-02-27 16:08 ` [PATCH 07/11] scsi: ufs: ufs-qcom: Fixup PAM-4 TX L0_L1_L2_L3 adaptation pattern length Can Guo
2026-02-27 16:08 ` [PATCH 08/11] scsi: ufs: ufs-qcom: Implement vops tx_eqtr_notify() Can Guo
2026-02-27 16:08 ` [PATCH 09/11] scsi: ufs: ufs-qcom: Implement vops get_rx_fom() Can Guo
2026-02-27 16:08 ` [PATCH 10/11] scsi: ufs: ufs-qcom: Implement vops apply_tx_eqtr_settings() Can Guo
2026-02-27 16:08 ` [PATCH 11/11] scsi: ufs: ufs-qcom: Enable TX Equalization Can Guo

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