From: Bart Van Assche <bvanassche@acm.org>
To: "Martin K . Petersen" <martin.petersen@oracle.com>
Cc: linux-scsi@vger.kernel.org, Bart Van Assche <bvanassche@acm.org>,
"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
Peter Wang <peter.wang@mediatek.com>,
vamshi gajjela <vamshigajjela@google.com>,
Bean Huo <beanhuo@micron.com>, "ping.gao" <ping.gao@samsung.com>,
Alok Tiwari <alok.a.tiwari@oracle.com>,
Chenyuan Yang <chenyuan0y@gmail.com>
Subject: [PATCH 2/3] ufs: core: Introduce ufshcd_mcq_poll_cqe_lock_n()
Date: Mon, 30 Mar 2026 11:33:04 -0700 [thread overview]
Message-ID: <20260330183311.1941942-3-bvanassche@acm.org> (raw)
In-Reply-To: <20260330183311.1941942-1-bvanassche@acm.org>
Introduce a new function for processing completions and that accepts an
upper limit for the number of completions to poll. Tell
ufshcd_mcq_poll_cqe_lock() to poll at most hwq->max_entries. This is
sufficient to poll all pending completions since there are never more
than hwq->max_entries - 1 completions on a completion queue. This patch
prepares for reducing the interrupt latency.
Signed-off-by: Bart Van Assche <bvanassche@acm.org>
---
drivers/ufs/core/ufs-mcq.c | 14 +++++++++++---
include/ufs/ufshcd.h | 3 +++
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index 8ccde4571859..afff0784555f 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -322,15 +322,16 @@ static void ufshcd_mcq_process_cqe(struct ufs_hba *hba,
}
}
-unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
- struct ufs_hw_queue *hwq)
+unsigned long ufshcd_mcq_poll_cqe_lock_n(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq,
+ unsigned int max_compl)
{
unsigned long completed_reqs = 0;
unsigned long flags;
spin_lock_irqsave(&hwq->cq_lock, flags);
ufshcd_mcq_update_cq_tail_slot(hwq);
- while (!ufshcd_mcq_is_cq_empty(hwq)) {
+ while (!ufshcd_mcq_is_cq_empty(hwq) && completed_reqs < max_compl) {
ufshcd_mcq_process_cqe(hba, hwq);
ufshcd_mcq_inc_cq_head_slot(hwq);
completed_reqs++;
@@ -342,6 +343,13 @@ unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
return completed_reqs;
}
+EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_lock_n);
+
+unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq)
+{
+ return ufshcd_mcq_poll_cqe_lock_n(hba, hwq, hwq->max_entries);
+}
EXPORT_SYMBOL_GPL(ufshcd_mcq_poll_cqe_lock);
void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index cfbc75d8df83..5679d93353ac 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1475,6 +1475,9 @@ void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds);
unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba);
u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i);
void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
+unsigned long ufshcd_mcq_poll_cqe_lock_n(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq,
+ unsigned int max_compl);
unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
struct ufs_hw_queue *hwq);
void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba);
next prev parent reply other threads:[~2026-03-30 18:33 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 18:33 [PATCH 0/3] Reduce interrupt latency Bart Van Assche
2026-03-30 18:33 ` [PATCH 1/3] ufs: core: Fix ufshcd_mcq_force_compl_one() Bart Van Assche
2026-03-31 9:41 ` Peter Wang (王信友)
2026-03-31 19:29 ` Bart Van Assche
2026-04-01 13:10 ` Peter Wang (王信友)
2026-04-01 15:51 ` Bart Van Assche
2026-04-02 7:19 ` Peter Wang (王信友)
2026-03-30 18:33 ` Bart Van Assche [this message]
2026-03-31 9:43 ` [PATCH 2/3] ufs: core: Introduce ufshcd_mcq_poll_cqe_lock_n() Peter Wang (王信友)
2026-03-31 19:31 ` Bart Van Assche
2026-04-01 13:11 ` Peter Wang (王信友)
2026-04-01 15:51 ` Bart Van Assche
2026-04-02 7:20 ` Peter Wang (王信友)
2026-03-30 18:33 ` [PATCH 3/3] ufs: qcom: Reduce interrupt latency Bart Van Assche
2026-03-31 7:09 ` Manivannan Sadhasivam
2026-03-31 19:44 ` Bart Van Assche
2026-04-04 3:11 ` Manivannan Sadhasivam
2026-04-06 16:02 ` Bart Van Assche
2026-03-30 18:36 ` [PATCH 0/3] " Bart Van Assche
2026-03-31 2:01 ` Can Guo
2026-04-07 8:20 ` Xiaosen
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