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Date: Sun, 13 Sep 2026 10:40:18 +0200
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Kartik Rajput <kkartik@nvidia.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>, 
	Avri Altman <avri.altman@sandisk.com>, Bart Van Assche <bvanassche@acm.org>, 
	Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, 
	Conor Dooley <conor+dt@kernel.org>, Thierry Reding <thierry.reding@kernel.org>, 
	Jonathan Hunter <jonathanh@nvidia.com>, "James E.J. Bottomley" <James.Bottomley@hansenpartnership.com>, 
	"Martin K. Petersen" <mkp@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, 
	Thierry Reding <treding@nvidia.com>, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: ufs: Add nvidia,tegra264-ufs
Message-ID: <20260913-vivid-accurate-bee-4ccc5a@quoll>
References: <20260909-tegra264-ufs-v1-0-e4a9831702a0@nvidia.com>
 <20260909-tegra264-ufs-v1-1-e4a9831702a0@nvidia.com>
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In-Reply-To: <20260909-tegra264-ufs-v1-1-e4a9831702a0@nvidia.com>

On Wed, Sep 09, 2026 at 04:11:19PM +0530, Kartik Rajput wrote:
> +  clocks:
> +    items:
> +      - description: UFS host controller functional clock
> +      - description: UFS host controller divider clock
> +      - description: UFS reference clock (PLLREFUFS output)
> +      - description: UFS device-side reference clock
> +      - description: M-PHY reference clock (UPHY0 PLL4 digital output)
> +
> +  clock-names:
> +    items:
> +      - const: ufs

core? Names equal to block name are not really useful

> +      - const: div
> +      - const: ref
> +      - const: ref-dev
> +      - const: phy

Shouldn't the phy take its reference clock?

> +
> +  resets:
> +    items:
> +      - description: UFS host controller reset
> +      - description: UFS host controller AXI-master reset
> +      - description: UFS host controller low-power sequencer reset
> +
> +  reset-names:
> +    items:
> +      - const: ufs
> +      - const: axi
> +      - const: lp
> +
> +  phys:
> +    items:
> +      - description: M-PHY lane 0 transmit
> +      - description: M-PHY lane 0 receive
> +      - description: M-PHY lane 1 transmit
> +      - description: M-PHY lane 1 receive
> +
> +  phy-names:
> +    items:
> +      - const: mphy-l0-tx
> +      - const: mphy-l0-rx
> +      - const: mphy-l1-tx
> +      - const: mphy-l1-rx
> +
> +  iommus:
> +    maxItems: 1
> +
> +  dma-coherent: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +  - phys
> +  - phy-names
> +  - iommus
> +  - dma-coherent
> +
> +allOf:
> +  - $ref: ufs-common.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/nvidia,tegra264.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/phy/nvidia,tegra264-mphy.h>

You need to decouple dependencies. Otherwise how is this supposed to be
checked with tools? If applied, you just broke maintainer's tree.


> +    #include <dt-bindings/reset/nvidia,tegra264.h>

Best regards,
Krzysztof