Linux SCSI subsystem development
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Louis-Alexis Eyraud" <louisalexis.eyraud@collabora.com>
Cc: vkoul@kernel.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, conor+dt@kernel.org,
	devicetree@vger.kernel.org, robh@kernel.org,
	neil.armstrong@linaro.org, linux-scsi@vger.kernel.org
Subject: Re: [PATCH v13 02/24] dt-bindings: ufs: mediatek,ufs: Complete the binding
Date: Thu, 01 Oct 2026 08:38:28 +0000	[thread overview]
Message-ID: <20261001083828.DCB461F008A4@smtp.kernel.org> (raw)
In-Reply-To: <20261001-mt8196-ufs-v13-2-60854adab6d9@collabora.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: ufs: mediatek: brittle schema constraint misrepresents hardware clocks
--

commit 52701a7e111f7103b8f873c8ff58dfce872a6586
Author: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

dt-bindings: ufs: mediatek,ufs: Complete the binding

This commit updates the Mediatek UFS binding to make it more complete,
removing deprecated properties and updating the clocks and resets lists.
It attempts to set clock constraints for different SoC generations such as
MT8183, MT8192, and MT8195.

> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> index 15c347f5e6604..945cb986b06b7 100644
> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml

[ ... ]

> @@ -54,29 +96,41 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            enum:
> -              - mediatek,mt8195-ufshci
> +            const: mediatek,mt8183-ufshci
>      then:
>        properties:
>          clocks:
> -          minItems: 8
> +          maxItems: 1

[Severity: Low]
Does this arbitrarily restrict MT8183 to a single clock, ignoring its UniPro
and AES clocks? Because the global items list enforces positional ordering,
if a device tree attempts to add the physically present UFS-related clocks
for this SoC, schema validation will reject the changes due to this maxItems
limit.

>          clock-names:
>            items:
> -            - const: ufs
> -            - const: ufs_aes
> -            - const: ufs_tick
> -            - const: unipro_sysclk
> -            - const: unipro_tick
> -            - const: unipro_mp_bclk
> -            - const: ufs_tx_symbol
> -            - const: ufs_mem_sub
> -    else:
> +            - const: main
> +        avdd12-ckbuf-supply: false
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: mediatek,mt8192-ufshci
> +    then:
>        properties:
>          clocks:
> -          maxItems: 1
> +          minItems: 3
> +          maxItems: 3

[Severity: Low]
Does this restrict MT8192 to 3 clocks, explicitly blocking proper hardware
representation? Since the newly introduced global items list strictly
enforces positional ordering, a device with maxItems: 3 is forced to provide
specifically "main", "aes", and "tick".

If MT8192 hardware actually implements UFS UniPro clocks, as evidenced by
this clock definition in drivers/clk/mediatek/clk-mt8192.c:

infra_clks:
    GATE_INFRA2(CLK_INFRA_UNIPRO_SYS, "infra_unipro_sys", "ufs_sel", 11),

wouldn't this rule prevent accurately describing these clocks in the device
tree?

>          clock-names:
> -          items:
> -            - const: ufs
> +          minItems: 3
> +          maxItems: 3

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261001-mt8196-ufs-v13-0-60854adab6d9@collabora.com?part=2

  reply	other threads:[~2026-10-01  8:38 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-01  8:21 [PATCH v13 00/24] MediaTek UFS Cleanup and MT8196 Enablement Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 01/24] dt-bindings: phy: Add mediatek,mt8196-ufsphy variant Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 02/24] dt-bindings: ufs: mediatek,ufs: Complete the binding Louis-Alexis Eyraud
2026-10-01  8:38   ` sashiko-bot [this message]
2026-10-01  8:21 ` [PATCH v13 03/24] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 04/24] scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 05/24] phy: mediatek: ufs: Add support for resets Louis-Alexis Eyraud
2026-10-01  8:38   ` sashiko-bot
2026-10-01  8:21 ` [PATCH v13 06/24] scsi: ufs: mediatek: Rework resets Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 07/24] scsi: ufs: mediatek: Rework 0.9V regulator Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 08/24] scsi: ufs: mediatek: Add dual 0.9V supply support Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 09/24] scsi: ufs: mediatek: Rework init function Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 10/24] scsi: ufs: mediatek: Rework the crypt-boost stuff Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 11/24] scsi: ufs: mediatek: Handle misc host voltage regulators Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 12/24] scsi: ufs: mediatek: Remove undocumented downstream reset cruft Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 13/24] scsi: ufs: mediatek: Remove vendor kernel quirks cruft Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 14/24] scsi: ufs: mediatek: Use the common PHY framework Louis-Alexis Eyraud
2026-10-01  8:33   ` sashiko-bot
2026-10-01  8:21 ` [PATCH v13 15/24] scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 16/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 17/24] scsi: ufs: mediatek: Clean up logging prints Louis-Alexis Eyraud
2026-10-01  8:32   ` sashiko-bot
2026-10-01  8:21 ` [PATCH v13 18/24] scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 19/24] scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice Louis-Alexis Eyraud
2026-10-01  8:30   ` sashiko-bot
2026-10-01  8:21 ` [PATCH v13 20/24] scsi: ufs: mediatek: Rework hardware version reading Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 21/24] scsi: ufs: mediatek: Back up idle timer in per-instance struct Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 22/24] scsi: ufs: mediatek: Remove ret local from link_startup_notify Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 23/24] scsi: ufs: mediatek: Remove undocumented "clk-scale-up-vcore-min" Louis-Alexis Eyraud
2026-10-01  8:21 ` [PATCH v13 24/24] scsi: ufs: mediatek: Add MT8196 compatible, update copyright Louis-Alexis Eyraud

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20261001083828.DCB461F008A4@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=linux-scsi@vger.kernel.org \
    --cc=louisalexis.eyraud@collabora.com \
    --cc=neil.armstrong@linaro.org \
    --cc=olteanv@gmail.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox