[PATCH v5 10/24] scsi: ufs: mediatek: Handle misc host voltage regulators

Nicolas Frattaroli
2026-01-08T10:51:28Z

MediaTek SoCs handled by this driver contain a per-SoC specific set of
miscellaneous supplies. These feed parts of the UFS controller silicon
inside the SoC, as opposed to the UFS card.

Add the necessary driver code to acquire these supplies using the
regulator bulk API. They should be kept on during suspend, so enable
them when acquiring.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 37 ++++++++++++++++++++++++++++++++++---
1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0d8f4e542d47..954d6768aa64 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -40,6 +40,8 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up);

struct ufs_mtk_soc_data {
bool has_avdd09;
+ u8 num_reg_names;
+ const char *const *reg_names;
};

static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
@@ -1188,8 +1190,21 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
{
struct device *dev = host->hba->dev;
const struct ufs_mtk_soc_data *data = of_device_get_match_data(dev);
+ int ret;
+
+ if (!data)
+ return 0;
+
+ if (data->num_reg_names) {
+ ret = devm_regulator_bulk_get_enable(dev, data->num_reg_names,
+ data->reg_names);
+ if (ret) {
+ dev_err(dev, "Failed to get misc regulators: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
+ }

- if (!data || !data->has_avdd09)
+ if (!data->has_avdd09)
return 0;

host->reg_avdd09 = devm_regulator_get_optional(dev, "avdd09");
@@ -2331,14 +2346,30 @@ static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
.config_scsi_dev = ufs_mtk_config_scsi_dev,
};

+static const char *const ufs_mtk_regs_avdd12_avdd18[] = {
+ "avdd12", "avdd18"
+};
+
+static const char *const ufs_mtk_regs_avdd12_ckbuf_avdd18[] = {
+ "avdd12", "avdd12-ckbuf", "avdd18"
+};
+
static const struct ufs_mtk_soc_data mt8183_data = {
.has_avdd09 = true,
+ .reg_names = ufs_mtk_regs_avdd12_avdd18,
+ .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_avdd18),
+};
+
+static const struct ufs_mtk_soc_data mt8192_8195_data = {
+ .has_avdd09 = false,
+ .reg_names = ufs_mtk_regs_avdd12_ckbuf_avdd18,
+ .num_reg_names = ARRAY_SIZE(ufs_mtk_regs_avdd12_ckbuf_avdd18),
};

static const struct of_device_id ufs_mtk_of_match[] = {
{ .compatible = "mediatek,mt8183-ufshci", .data = &mt8183_data },
- { .compatible = "mediatek,mt8192-ufshci" },
- { .compatible = "mediatek,mt8195-ufshci" },
+ { .compatible = "mediatek,mt8192-ufshci", .data = &mt8192_8195_data },
+ { .compatible = "mediatek,mt8195-ufshci", .data = &mt8192_8195_data },
{},
};
MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);

--
2.52.0