From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26948C54EE9 for ; Tue, 27 Sep 2022 19:32:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230202AbiI0Tb6 (ORCPT ); Tue, 27 Sep 2022 15:31:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229870AbiI0Tb5 (ORCPT ); Tue, 27 Sep 2022 15:31:57 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DAFB3057B; Tue, 27 Sep 2022 12:31:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664307115; x=1695843115; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=Uboi46HtitzGzAeJcxV+sy5FI8yISydqs8FYVzxay40=; b=KVmNnRVZPNIvZOIqrNK+ng1bKbEKTWBfE7H/G/pBmvwaNhfjCNWhgLEd PNzsJdKnEAw/sb8g03aw6Oyjv8rhvrYRBBCT36WH9uVorgA2GPWlQxyGn IkziCVcXFpUCNI5DY+8fCee9zzpwAmNVMCo8npn7L/JmAjI0XAMnt+1D3 ftJK/9YPpFb0YPiU2MKofewW9lMfSXNZMIGEf/HP7hNROPnNvrxf7C0jt XbSGGbCLaHbJzNBNqjRsp7wJYG2FjBxw2MlM/PVOHmHLSouiehl3QAp/m 7htmSxw0Tme0Wtekb89bK3mkUZm83STQPDh56dBQbBQj+ccsaN1kWVfVi Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="327773178" X-IronPort-AV: E=Sophos;i="5.93,350,1654585200"; d="scan'208";a="327773178" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 12:31:50 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="652399393" X-IronPort-AV: E=Sophos;i="5.93,350,1654585200"; d="scan'208";a="652399393" Received: from weimingg-mobl.amr.corp.intel.com (HELO [10.212.244.112]) ([10.212.244.112]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 12:31:49 -0700 Message-ID: <564e778a-4ed8-3907-1cb3-34af109d0ce0@linux.intel.com> Date: Tue, 27 Sep 2022 12:31:48 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Firefox/91.0 Thunderbird/91.11.0 Subject: Re: [PATCH v2 1/9] PCI/AER: Add pci_aer_clear_uncorrect_error_status() to PCI core Content-Language: en-US To: Zhuo Chen , bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com, fancer.lancer@gmail.com, jdmason@kudzu.us, dave.jiang@intel.com, allenbh@gmail.com, james.smart@broadcom.com, dick.kennedy@broadcom.com, jejb@linux.ibm.com, martin.petersen@oracle.com Cc: linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ntb@lists.linux.dev, linux-scsi@vger.kernel.org References: <20220927153524.49172-1-chenzhuo.1@bytedance.com> <20220927153524.49172-2-chenzhuo.1@bytedance.com> From: Sathyanarayanan Kuppuswamy In-Reply-To: <20220927153524.49172-2-chenzhuo.1@bytedance.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Hi, On 9/27/22 8:35 AM, Zhuo Chen wrote: > Sometimes we need to clear aer uncorrectable error status, so we add Adding n actual use case will help. > pci_aer_clear_uncorrect_error_status() to PCI core. If possible, try to avoid "we" usage in commit log. Just say "so add pci_aer_clear_uncorrect_error_status() function" > > Signed-off-by: Zhuo Chen > --- > drivers/pci/pcie/aer.c | 16 ++++++++++++++++ > include/linux/aer.h | 5 +++++ > 2 files changed, 21 insertions(+) > > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c > index e2d8a74f83c3..4e637121be23 100644 > --- a/drivers/pci/pcie/aer.c > +++ b/drivers/pci/pcie/aer.c > @@ -286,6 +286,22 @@ void pci_aer_clear_fatal_status(struct pci_dev *dev) > pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status); > } > > +int pci_aer_clear_uncorrect_error_status(struct pci_dev *dev) > +{ > + int aer = dev->aer_cap; > + u32 status; > + > + if (!pcie_aer_is_native(dev)) > + return -EIO; > + > + pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status); > + if (status) > + pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status); Why not just write all '1' and clear it? Why read and write? > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(pci_aer_clear_uncorrect_error_status); Add details about why you want to export in commit log. > + > /** > * pci_aer_raw_clear_status - Clear AER error registers. > * @dev: the PCI device > diff --git a/include/linux/aer.h b/include/linux/aer.h > index 97f64ba1b34a..154690c278cb 100644 > --- a/include/linux/aer.h > +++ b/include/linux/aer.h > @@ -45,6 +45,7 @@ struct aer_capability_regs { > int pci_enable_pcie_error_reporting(struct pci_dev *dev); > int pci_disable_pcie_error_reporting(struct pci_dev *dev); > int pci_aer_clear_nonfatal_status(struct pci_dev *dev); > +int pci_aer_clear_uncorrect_error_status(struct pci_dev *dev); > void pci_save_aer_state(struct pci_dev *dev); > void pci_restore_aer_state(struct pci_dev *dev); > #else > @@ -60,6 +61,10 @@ static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev) > { > return -EINVAL; > } > +static inline int pci_aer_clear_uncorrect_error_status(struct pci_dev *dev) > +{ > + return -EINVAL; > +} > static inline void pci_save_aer_state(struct pci_dev *dev) {} > static inline void pci_restore_aer_state(struct pci_dev *dev) {} > #endif -- Sathyanarayanan Kuppuswamy Linux Kernel Developer