From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
"James E.J. Bottomley" <jejb@linux.ibm.com>,
Dick Kennedy <dick.kennedy@broadcom.com>,
James Smart <james.smart@broadcom.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
linux-scsi@vger.kernel.org, Guenter Roeck <linux@roeck-us.net>,
linux-hwmon@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Steve Wahl <steve.wahl@hpe.com>,
Mike Travis <mike.travis@hpe.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Russ Anderson <russ.anderson@hpe.com>
Subject: [patch v2A 22/38] x86/cpu: Add legacy topology parser
Date: Fri, 28 Jul 2023 23:33:40 +0200 [thread overview]
Message-ID: <873517raa3.ffs@tglx> (raw)
In-Reply-To: <20230728120930.895466874@linutronix.de>
On Fri, Jul 28 2023 at 14:13, Thomas Gleixner wrote:
> The legacy topology detection via CPUID leaf 4, which provides the number
> of cores in the package and CPUID leaf 1 which provides the number of
> logical CPUs in case that FEATURE_HT is enabled and the CMP_LEGACY feature
> is not set, is shared for Intel, Centaur amd Zhaoxin CPUs.
>
> Lift the code from common.c without the early detection hack and provide it
> as common fallback mechanism.
Here I completely failed to get it right. Why?
My mind was so focussed on the leaf 0xb/0x1f representation that I
completely missed that the legacy parser does not fit into that picture
at all. I did some tests on 32bit in a VM as I really do not have
functional 32bit hardware anymore and they all worked. Not that I tried
hard.
Unfortunately Borislav decided to give it a ride on a real 32bit ATOM
system and unearthed my snafu.
Replacement patch below and also pushed out to the:
git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/topology
branch w/o a tag attached.
Thanks,
tglx
---
Subject: x86/cpu: Add legacy topology parser
From: Thomas Gleixner <tglx@linutronix.de>
Date: Sun, 02 Jul 2023 13:20:08 +0200
The legacy topology detection via CPUID leaf 4, which provides the number
of cores in the package and CPUID leaf 1 which provides the number of
logical CPUs in case that FEATURE_HT is enabled and the CMP_LEGACY feature
is not set, is shared for Intel, Centaur amd Zhaoxin CPUs.
Lift the code from common.c without the early detection hack and provide it
as common fallback mechanism.
Will be utilized in later changes.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2A: Fix the 32bit snafu.
---
arch/x86/kernel/cpu/common.c | 3 ++
arch/x86/kernel/cpu/topology.h | 2 +
arch/x86/kernel/cpu/topology_common.c | 44 ++++++++++++++++++++++++++++++++++
3 files changed, 49 insertions(+)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -883,6 +883,9 @@ void detect_ht(struct cpuinfo_x86 *c)
#ifdef CONFIG_SMP
int index_msb, core_bits;
+ if (topo_is_converted(c))
+ return;
+
if (detect_ht_early(c) < 0)
return;
--- a/arch/x86/kernel/cpu/topology.h
+++ b/arch/x86/kernel/cpu/topology.h
@@ -7,6 +7,8 @@ struct topo_scan {
unsigned int dom_shifts[TOPO_MAX_DOMAIN];
unsigned int dom_ncpus[TOPO_MAX_DOMAIN];
+ // Legacy CPUID[1]:EBX[23:16] number of logical processors
+ unsigned int ebx1_nproc_shift;
};
bool topo_is_converted(struct cpuinfo_x86 *c);
--- a/arch/x86/kernel/cpu/topology_common.c
+++ b/arch/x86/kernel/cpu/topology_common.c
@@ -24,6 +24,48 @@ void topology_set_dom(struct topo_scan *
}
}
+static unsigned int parse_num_cores(struct cpuinfo_x86 *c)
+{
+ struct {
+ u32 cache_type : 5,
+ unused : 21,
+ ncores : 6;
+ } eax;
+
+ if (c->cpuid_level < 4)
+ return 1;
+
+ cpuid_subleaf_reg(4, 0, CPUID_EAX, &eax);
+ if (!eax.cache_type)
+ return 1;
+
+ return eax.ncores + 1;
+}
+
+static void __maybe_unused parse_legacy(struct topo_scan *tscan)
+{
+ unsigned int cores, core_shift, smt_shift = 0;
+ struct cpuinfo_x86 *c = tscan->c;
+
+ cores = parse_num_cores(c);
+ core_shift = get_count_order(cores);
+
+ if (cpu_has(c, X86_FEATURE_HT)) {
+ if (!WARN_ON_ONCE(tscan->ebx1_nproc_shift < core_shift))
+ smt_shift = tscan->ebx1_nproc_shift - core_shift;
+ /*
+ * The parser expects leaf 0xb/0x1f format, which means
+ * the number of logical processors at core level is
+ * counting threads.
+ */
+ core_shift += smt_shift;
+ cores <<= smt_shift;
+ }
+
+ topology_set_dom(tscan, TOPO_SMT_DOMAIN, smt_shift, 1U << smt_shift);
+ topology_set_dom(tscan, TOPO_CORE_DOMAIN, core_shift, cores);
+}
+
bool topo_is_converted(struct cpuinfo_x86 *c)
{
/* Temporary until everything is converted over. */
@@ -88,6 +130,8 @@ static void parse_topology(struct topo_s
/* The above is sufficient for UP */
if (!IS_ENABLED(CONFIG_SMP))
return;
+
+ tscan->ebx1_nproc_shift = get_count_order(ebx.nproc);
}
static void topo_set_ids(struct topo_scan *tscan)
next prev parent reply other threads:[~2023-07-28 21:33 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-28 12:12 [patch v2 00/38] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-07-28 12:12 ` [patch v2 01/38] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-07-28 12:12 ` [patch v2 02/38] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-07-28 12:12 ` [patch v2 03/38] x86/cpu: Move cpu_die_id " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 04/38] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-07-28 12:12 ` [patch v2 05/38] hwmon: (fam15h_power) " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 06/38] x86/cpu: Move cpu_core_id into topology info Thomas Gleixner
2023-07-28 12:12 ` [patch v2 07/38] x86/cpu: Move cu_id " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 08/38] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-07-28 12:12 ` [patch v2 09/38] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-07-28 12:12 ` [patch v2 10/38] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-07-28 12:12 ` [patch v2 11/38] x86/apic: Use BAD_APICID consistently; Thomas Gleixner
2023-07-28 22:36 ` Sohil Mehta
2023-07-28 22:50 ` Thomas Gleixner
2023-07-28 12:12 ` [patch v2 12/38] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-07-28 12:12 ` [patch v2 13/38] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-07-28 12:13 ` [patch v2 14/38] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-07-28 12:13 ` [patch v2 15/38] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-08-08 20:14 ` Steve Wahl
2023-07-28 12:13 ` [patch v2 16/38] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-08-08 20:15 ` Steve Wahl
2023-07-28 12:13 ` [patch v2 17/38] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() Thomas Gleixner
2023-08-08 20:15 ` Steve Wahl
2023-07-28 12:13 ` [patch v2 18/38] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-07-28 12:13 ` [patch v2 19/38] x86/cpu: Provide debug interface Thomas Gleixner
2023-07-28 23:57 ` Sohil Mehta
2023-07-28 12:13 ` [patch v2 20/38] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-07-28 12:13 ` [patch v2 21/38] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-07-29 0:02 ` Sohil Mehta
2023-07-31 4:05 ` Michael Kelley (LINUX)
2023-07-31 12:34 ` Thomas Gleixner
2023-07-31 13:27 ` Peter Zijlstra
2023-07-31 15:38 ` Thomas Gleixner
2023-07-31 16:10 ` Michael Kelley (LINUX)
2023-07-31 20:48 ` Thomas Gleixner
2023-07-31 21:27 ` Michael Kelley (LINUX)
2023-07-31 22:12 ` Thomas Gleixner
2023-08-01 22:25 ` Thomas Gleixner
2023-08-01 22:35 ` Andrew Cooper
2023-08-02 14:43 ` Michael Kelley (LINUX)
2023-07-31 16:25 ` Michael Kelley (LINUX)
2023-07-31 20:41 ` Thomas Gleixner
2023-07-31 13:47 ` Arjan van de Ven
2023-07-31 14:08 ` Andrew Cooper
2023-08-01 7:05 ` Gautham R. Shenoy
2023-08-01 7:34 ` Thomas Gleixner
2023-07-28 12:13 ` [patch v2 22/38] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-07-28 21:33 ` Thomas Gleixner [this message]
2023-07-28 12:13 ` [patch v2 23/38] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-07-28 12:13 ` [patch v2 24/38] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-07-28 12:13 ` [patch v2 25/38] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-07-28 12:13 ` [patch v2 26/38] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-07-28 12:13 ` [patch v2 27/38] x86/cpu/amd: Provide a separate acessor for Node ID Thomas Gleixner
2023-07-29 0:07 ` Sohil Mehta
2023-07-28 12:13 ` [patch v2 28/38] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-07-29 0:05 ` Sohil Mehta
2023-07-30 5:20 ` Michael Kelley (LINUX)
2023-07-30 7:41 ` Thomas Gleixner
2023-07-28 12:13 ` [patch v2 29/38] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-07-28 12:13 ` [patch v2 30/38] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-07-28 12:13 ` [patch v2 31/38] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-07-28 12:13 ` [patch v2 32/38] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-07-28 12:13 ` [patch v2 33/38] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-07-28 12:13 ` [patch v2 34/38] x86/cpu: Remove topology.c Thomas Gleixner
2023-07-28 12:13 ` [patch v2 35/38] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-07-28 12:13 ` [patch v2 36/38] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-08 20:15 ` Steve Wahl
2023-07-28 12:13 ` [patch v2 37/38] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-07-28 12:13 ` [patch v2 38/38] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-08 20:16 ` Steve Wahl
2023-07-28 15:41 ` [patch v2 00/38] x86/cpu: Rework the topology evaluation Dimitri Sivanich
2023-07-28 19:01 ` Sohil Mehta
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