Linux SCSI subsystem development
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From: Damien Le Moal <damien.lemoal@opensource.wdc.com>
To: Ajish Koshy <Ajish.Koshy@microchip.com>, linux-scsi@vger.kernel.org
Cc: Vasanthalakshmi.Tharmarajan@microchip.com,
	Viswas.G@microchip.com, john.garry@huawei.com,
	Jinpu Wang <jinpu.wang@cloud.ionos.com>
Subject: Re: [PATCH 2/2] scsi: pm80xx: enable upper inbound, outbound queues
Date: Mon, 28 Mar 2022 18:23:05 +0900	[thread overview]
Message-ID: <99820f1c-10c8-72b3-c5b8-3d7209dc3fde@opensource.wdc.com> (raw)
In-Reply-To: <20220328084243.301493-3-Ajish.Koshy@microchip.com>

On 3/28/22 17:42, Ajish Koshy wrote:
> Executing driver on servers with more than 32 CPUs were faced with command
> timeouts. This is because we were not geting completions for commands
> submitted on IQ32 - IQ63.
> 
> Set E64Q bit to enable upper inbound and outbound queues 32 to 63 in the
> MPI main configuration table.
> 
> Added 500ms delay after successful MPI initialization as mentioned in
> controller datasheet.
> 
> Signed-off-by: Ajish Koshy <Ajish.Koshy@microchip.com>
> Signed-off-by: Viswas G <Viswas.G@microchip.com>
> ---
>  drivers/scsi/pm8001/pm80xx_hwi.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c b/drivers/scsi/pm8001/pm80xx_hwi.c
> index b92e82a576e3..f04c6c589615 100644
> --- a/drivers/scsi/pm8001/pm80xx_hwi.c
> +++ b/drivers/scsi/pm8001/pm80xx_hwi.c
> @@ -766,6 +766,10 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha)
>  	pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity	= 0x01;
>  	pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt		= 0x01;
>  
> +	/* Enable higher IQs and OQs, 32 to 63, bit 16*/
> +	if (pm8001_ha->max_q_num > 32)
> +		pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |=
> +							(1 << 16);

No need for the brackets.

>  	/* Disable end to end CRC checking */
>  	pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16);
>  
> @@ -1027,6 +1031,9 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha)
>  	if (0x0000 != gst_len_mpistate)
>  		return -EBUSY;
>  
> +	/* Wait for 500ms after successful MPI initialization*/

Is this comment really necessary ? Anybody sees that this will wait. It
may be better to explain *why* the wait is needed.

> +	msleep(500);
> +
>  	return 0;
>  }
>  


-- 
Damien Le Moal
Western Digital Research

  reply	other threads:[~2022-03-28  9:23 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-28  8:42 [PATCH 0/2] pm80xx updates Ajish Koshy
2022-03-28  8:42 ` [PATCH 1/2] scsi: pm80xx: mask and unmask upper interrupt vectors 32-63 Ajish Koshy
2022-03-28  9:20   ` Damien Le Moal
2022-03-28 10:12     ` Ajish.Koshy
2022-03-28  9:39   ` Jinpu Wang
2022-03-28 10:53     ` Ajish.Koshy
2022-03-28  8:42 ` [PATCH 2/2] scsi: pm80xx: enable upper inbound, outbound queues Ajish Koshy
2022-03-28  9:23   ` Damien Le Moal [this message]
2022-03-28 10:48     ` Ajish.Koshy
2022-03-28  9:37   ` Jinpu Wang
2022-03-28 10:51     ` Ajish.Koshy
2022-03-28 14:13   ` John Garry
2022-04-01  9:58     ` Ajish.Koshy

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