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Fri, 20 Feb 2026 03:15:43 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-824c6bb5acesm26585871b3a.63.2026.02.20.03.15.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 03:15:43 -0800 (PST) Date: Fri, 20 Feb 2026 16:45:36 +0530 From: Abhinaba Rakshit To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 2/4] soc: qcom: ice: Add OPP-based clock scaling support for ICE Message-ID: References: <20260211-enable-ufs-ice-clock-scaling-v5-0-221c520a1f2e@oss.qualcomm.com> <20260211-enable-ufs-ice-clock-scaling-v5-2-221c520a1f2e@oss.qualcomm.com> <3ecb8d08-64cb-4fe1-bebd-1532dc5a86af@oss.qualcomm.com> <6d2c99c4-3fe0-4e79-94e8-98b752158bd6@oss.qualcomm.com> <5bf31bf9-835b-4b87-a4d0-8452d516f13c@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5bf31bf9-835b-4b87-a4d0-8452d516f13c@oss.qualcomm.com> X-Proofpoint-GUID: -ruahHGWOKY0mSqXQVGHFGkk-CWU8z7F X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIwMDA5NyBTYWx0ZWRfX628PnIUPOIh3 HCmAzhdq/mDxtjy/bGm/53JabjEHlMR/RUl6mFNcu58GUu/Wsb27kDcOCUSfoFUHAhGl/1jkXj5 BqSYVOo42ZjKN51jh+6e3Df0+kOC6jXiQcS5e4trB0uA/KZOxbjbxap0CmZ6L6NvGadnttY00/M Ok8iFw/Vjb6F001fae10Net0pUPoSXuVHgNHt7/O8ar6BYNxxEO10mtdYFtENqiUS5OWxS1M5KW 6bOFPisf3kWfmzHNm2YWLuLwg0MAlqxFeOtlkstDQb0o7sgKWXnSJGJRp69386g1LffL9PNvSLq bgHIbNSmtIQ7Tk6OSrnp689Jl3wHK+483/F/Vc2RVkH8WQufqOjJJTSYA0xki2QDTGNbsg+HzO0 ULvg0HX9tjEdmmU+QXoZD1aUPk9bEMI02HH+wVLxYbLKkSLwUaBqaTFkseJ2h6V89K6n84E57ur jD7Oo46rAcD48M/bxZw== X-Authority-Analysis: v=2.4 cv=PcTyRyhd c=1 sm=1 tr=0 ts=69984261 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=kj9zAlcOel0A:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=-r4YXHmrKH74x9D_t9cA:9 a=CjuIK1q_8ugA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-ORIG-GUID: -ruahHGWOKY0mSqXQVGHFGkk-CWU8z7F X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-20_01,2026-02-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 clxscore=1015 phishscore=0 adultscore=0 suspectscore=0 spamscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602200097 On Fri, Feb 20, 2026 at 10:42:58AM +0100, Konrad Dybcio wrote: > On 2/20/26 8:33 AM, Abhinaba Rakshit wrote: > > On Thu, Feb 19, 2026 at 03:20:31PM +0100, Konrad Dybcio wrote: > >> On 2/18/26 8:02 PM, Abhinaba Rakshit wrote: > >>> On Mon, Feb 16, 2026 at 01:18:57PM +0100, Konrad Dybcio wrote: > >>>> On 2/13/26 8:02 AM, Abhinaba Rakshit wrote: > >>>>> On Thu, Feb 12, 2026 at 12:30:00PM +0100, Konrad Dybcio wrote: > >>>>>> On 2/11/26 10:47 AM, Abhinaba Rakshit wrote: > >>>>>>> Register optional operation-points-v2 table for ICE device > >>>>>>> and aquire its minimum and maximum frequency during ICE > >>>>>>> device probe. > >> > >> [...] > >> > >>>>> However, my main concern was for the corner cases, where: > >>>>> (target_freq > max && ROUND_CEIL) > >>>>> and > >>>>> (target_freq < min && ROUND_FLOOR) > >>>>> In both the cases, the OPP APIs will fail and the clock remains unchanged. > >>>> > >>>> I would argue that's expected behavior, if the requested rate can not > >>>> be achieved, the "set_rate"-like function should fail > >>>> > >>>>> Hence, I added the checks to make the API as generic/robust as possible. > >>>> > >>>> AFAICT we generally set storage_ctrl_rate == ice_clk_rate with some slight > >>>> play, but the latter never goes above the FMAX of the former > >>>> > >>>> For the second case, I'm not sure it's valid. For "find lowest rate" I would > >>>> expect find_freq_*ceil*(rate=0). For other cases of scale-down I would expect > >>>> that we want to keep the clock at >= (or ideally == )storage_ctrl_clk anyway > >>>> so I'm not sure _floor() is useful > >>> > >>> Clear, I guess, the idea is to ensure ice-clk <= storage-clk in case of scale_up > >>> and ice-clk >= storage-clk in case of scale_down. > >> > >> I don't quite understand the first case (ice <= storage for scale_up), could you > >> please elaborate? > > > > Here I basically mean to say is that, as you mentioned "we generally set > > storage_ctrl_rate == ice_clk_rate, but latter never goes above the FMAX of the former". > > I guess, the ideal way to handle this is to ensure using _floor when we want to scale_up. > > This ensures the ice_clk does not vote for more that what storage_ctrl is running on. > > Right, but what I was asking specifically is why we don't want that to happen I would argue saying that, having ice_clk higher than storage_ctrl_clk does not makes sense, as it will not improve the throughput since the controller clock rate will still be a bottle-neck and it will surely drain more power. > > Also, this avoids the corner case, where target_freq provided is higher that the supporter > > rates (descriped in ICE OPP-table) for ICE, using _ceil makes no sense. > > This is potentially a valid concern, do we have cases of storage_clk > ice_clk? As of now, on the UFS storages (targets KLMT) I dont see the storage_clk (FMAX) > ice_clk (FMAX). They are mostly equal. However, I am not sure, about all the other targets and cannot call the same will persist on the upcommings as well. Abhinaba Rakshit