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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acb6efa5c5asm784078066b.166.2025.04.23.04.09.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Apr 2025 04:09:27 -0700 (PDT) Message-ID: Date: Wed, 23 Apr 2025 13:09:25 +0200 Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 4/9] phy: qcom-qmp-ufs: Refactor UFS PHY reset To: Nitin Rawat , Dmitry Baryshkov Cc: vkoul@kernel.org, kishon@kernel.org, manivannan.sadhasivam@linaro.org, James.Bottomley@hansenpartnership.com, martin.petersen@oracle.com, bvanassche@acm.org, bjorande@quicinc.com, neil.armstrong@linaro.org, quic_rdwivedi@quicinc.com, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org References: <20250410090102.20781-1-quic_nitirawa@quicinc.com> <20250410090102.20781-5-quic_nitirawa@quicinc.com> <317faeaa-3130-4e28-8c5d-441a76aa79b4@quicinc.com> <2820908b-4548-4e0a-94b2-6065cb5ff1f3@quicinc.com> <1a623099-40bb-4884-8d93-132138a4150b@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <1a623099-40bb-4884-8d93-132138a4150b@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDIzMDA3NiBTYWx0ZWRfXyllNQK5D0SgJ uy+vBhNXMZkdmHD+9qUWocP1D4R2HAe7j+xn76uWfGcGhr0xWXZpsqm3XKaqG3L/wywkXnKm0c4 NRwYp9xTo8TAvgnqWTWV+zYVORzC8tXatk53X9g2KVZ36OYfnfEZDRMEnzzqmlN3+zTSKHki8kG T7Vbosb9pHV5qM6dzQnrpsRDAgMcTtWXrCEwOgVN5b2qZehl39U0D168BdDxGTEZoFFvSV/3UnJ 7LYxEO4efti2xaDlEY6/wB+T0mxPPujDGPWa1iI6fSBusoQ4MTOG8sqroWbxtFNqnsQu8BjkqnK /2d8f4oEJ791+Dd9fDZ8BmEwqKTu6Z+3x376FtHno06UaKkB0/empM6F8LVxsgI4ju27raK5EFx VM0qMZLKm4upSEY6IzX72BGwLr6FKmCVveYPtFBKHs2sLu6VKNCnOtNFpvXCjIkNf3wwqFlu X-Proofpoint-GUID: TVzSCPME9iqxyp_ZrqL-KQ1fTHq1eo7q X-Authority-Analysis: v=2.4 cv=B/S50PtM c=1 sm=1 tr=0 ts=6808ca69 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=iCsAco6G6QYzM88_SOEA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: TVzSCPME9iqxyp_ZrqL-KQ1fTHq1eo7q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.680,FMLib:17.12.80.40 definitions=2025-04-23_07,2025-04-22_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 impostorscore=0 suspectscore=0 mlxscore=0 priorityscore=1501 phishscore=0 malwarescore=0 spamscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504230076 On 4/16/25 2:26 PM, Nitin Rawat wrote: > > > On 4/16/2025 5:43 PM, Dmitry Baryshkov wrote: >> On Wed, 16 Apr 2025 at 12:08, Nitin Rawat wrote: >>> >>> >>> >>> On 4/15/2025 2:59 PM, Dmitry Baryshkov wrote: >>>> On 14/04/2025 23:34, Nitin Rawat wrote: >>>>> >>>>> >>>>> On 4/11/2025 4:38 PM, Dmitry Baryshkov wrote: >>>>>> On Fri, 11 Apr 2025 at 13:50, Nitin Rawat >>>>>> wrote: >>>>>>> >>>>>>> >>>>>>> >>>>>>> On 4/11/2025 1:38 AM, Dmitry Baryshkov wrote: >>>>>>>> On Thu, Apr 10, 2025 at 02:30:57PM +0530, Nitin Rawat wrote: >>>>>>>>> Refactor the UFS PHY reset handling to parse the reset logic only >>>>>>>>> once >>>>>>>>> during probe, instead of every resume. >>>>>>>>> >>>>>>>>> Move the UFS PHY reset parsing logic from qmp_phy_power_on to >>>>>>>>> qmp_ufs_probe to avoid unnecessary parsing during resume. >>>>>>>> >>>>>>>> How did you solve the circular dependency issue being noted below? >>>>>>> >>>>>>> Hi Dmitry, >>>>>>> As part of my patch, I moved the parsing logic from qmp_phy_power_on to >>>>>>> qmp_ufs_probe to avoid unnecessary parsing during resume. I'm uncertain >>>>>>> about the circular dependency issue and whether if it still exists. >>>>>> >>>>>> It surely does. The reset controller is registered in the beginning of >>>>>> ufs_qcom_init() and the PHY is acquired only a few lines below. It >>>>>> creates a very small window for PHY driver to probe. >>>>>> Which means, NAK, this patch doesn't look acceptable. >>>>> >>>>> Hi Dmitry, >>>>> >>>>> Thanks for pointing this out. I agree that it leaves very little time >>>>> for the PHY to probe, which may cause issues with targets where >>>>> no_pcs_sw_reset is set to true. >>>>> >>>>> As an experiment, I kept no_pcs_sw_reset set to true for the SM8750, >>>>> and it caused bootup probe issues in some of the iterations I ran. >>>>> >>>>> To address this, I propose updating the patch to move the >>>>> qmp_ufs_get_phy_reset call to phy_calibrate, just before the >>>>> reset_control_assert call. >>>> >>>> Will it cause an issue if we move it to phy_init() instead of >>>> phy_calibrate()? >>> >>> Hi Dmitry, >>> >>> Thanks for suggestion. >>> Phy_init is invoked before phy_set_mode_ext and ufs_qcom_phy_power_on, >>> whereas calibrate is called after ufs_qcom_phy_power_on. Keeping the UFS >>> PHY reset in phy_calibrate introduces relatively more delay, providing >>> more buffer time for the PHY driver probe, ensuring the UFS PHY reset is >>> handled correctly the first time. >> >> We are requesting the PHY anyway, so the PHY driver should have probed >> well before phy_init() call. I don't get this comment. >> >>> >>> Moving the calibration to phy_init shouldn't cause any issues. However, >>> since we currently don't have an initialization operations registered >>> for init, we would need to add a new PHY initialization ops if we decide >>> to move it to phy_init. >> >> Yes. I don't see it as a problem. Is there any kind of an issue there? > > No issues. In my next patchset, I would add a new init ops registered for qcom phy and move get ufs phy reset handler to it. I don't really like this circular dependency. So I took a peek at the docs and IIUC, they say that the reset coming from the UFS controller effectively does the same thing as QPHY_SW_RESET. Moreover, the docs mention the controller-side reset should not be used anymore (as of at least X1E & SM8550). Docs for MSM8996 (one of the oldest platforms that this driver supports) also don't really mention a hard dependency on it. So we can get rid of this mess entirely, without affecting backwards compatibility even, as this is all contained within the PHYs register space and driver. Konrad