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Bottomley" , open list Date: Wed, 22 Jan 2025 15:29:32 +0100 In-Reply-To: <20250122100214.489749-3-quic_ziqichen@quicinc.com> References: <20250122100214.489749-1-quic_ziqichen@quicinc.com> <20250122100214.489749-3-quic_ziqichen@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2025-01-22 at 18:02 +0800, Ziqi Chen wrote: > From: Can Guo >=20 > Instead of only two frequencies, If OPP V2 is used, the UFS devfreq > clock > scaling may scale the clock among multiple frequencies. In the case > of > scaling up, the devfreq may decide to scale the clock to an > intermidiate > freq base on load, but the clock scale up pre change operation uses > settings for the max clock freq unconditionally. Fix it by passing > the > target_freq to clock scale up pre change so that the correct settings > for > the target_freq can be used. >=20 > In the case of scaling down, the clock scale down post change > operation > is doing fine, because it reads the actual clock rate to tell freq, > but to > keep symmetry with clock scale up pre change operation, just use the > target_freq instead of reading clock rate. >=20 > Signed-off-by: Can Guo > Co-developed-by: Ziqi Chen > Signed-off-by: Ziqi Chen Reviewed-by: Bean Huo