Re: [PATCH v2 04/13] lpfc: Add push-to-adapter support to sli4

[James Smart <jsmart2021@gmail.com>]

On 2/7/2018 2:27 AM, Johannes Thumshirn wrote:
> On Wed, Feb 07, 2018 at 10:51:57AM +0100, Johannes Thumshirn wrote:
>>> +			/* Enable combined writes for DPP aperture */
>>> +			pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
>>> +#ifdef CONFIG_X86
>>> +			rc = set_memory_wc(pg_addr, 1);
>>> +			if (rc) {
>>> +				lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
>>> +						"3272 Cannot setup Combined "
>>> +						"Write on WQ[%d] - disable DPP\n",
>>> +						wq->queue_id);
>>> +				phba->cfg_enable_dpp = 0;
>>> +			}
>>> +#else
>>> +			phba->cfg_enable_dpp = 0;
>>> +#endif
>>> +		} else
>>> +			wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
>>
>> I don't really like the set_memory_wc() call here. Neither do I like the ifdef
>> CONFIG_X86 special casing.
>>
>> If you really need write combining, can't you at least use ioremap_wc()?
> 
> Coming back to this again (after talking to our ARM/POWER folks internally).
> Is this really x86 specific here? I know there are servers with other architectures
> using lpfcs out there.
> 
> I _think_ write combining should be possible on other architectures (that have
> PCIe and aren't dead) as well.
> 
> The ioremap_wc() I suggested is probably wrong.
> 
> So can you please revisit this? I CCed Mark and Michael, maybe they can help
> here.

yes - we really are looking for write combining. We were following the 
lead of a couple of other entities in the kernel and hadn't found the 
right combination for something other than X86. We figured we would come 
back and add the non-86 enablements later when we found the right options.

-- james