From: Bart Van Assche <bvanassche@acm.org>
To: Minwoo Im <minwoo.im@samsung.com>,
"James E . J . Bottomley" <James.Bottomley@HansenPartnership.com>,
"Martin K . Petersen" <martin.petersen@oracle.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
Avri Altman <avri.altman@wdc.com>,
gost.dev@samsung.com, linux-scsi@vger.kernel.org,
linux-kernel@vger.kernel.org, Jeuk Kim <jeuk20.kim@samsung.com>
Subject: Re: [PATCH 1/3] ufs: mcq: Add ufshcd_mcq_queue_cfg_addr helper
Date: Fri, 31 May 2024 13:15:11 -0700 [thread overview]
Message-ID: <d3d2d848-e70c-462b-bbb2-f5a2308646fd@acm.org> (raw)
In-Reply-To: <20240531103821.1583934-2-minwoo.im@samsung.com>
On 5/31/24 03:38, Minwoo Im wrote:
> This helper returns an offset address of MCQ queue configuration
> registers. This is a prep patch for the following patch.
>
> Signed-off-by: Minwoo Im <minwoo.im@samsung.com>
> ---
> drivers/ufs/core/ufs-mcq.c | 14 ++++++++++++++
> include/ufs/ufshcd.h | 1 +
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
> index 52210c4c20dc..46faa54aea94 100644
> --- a/drivers/ufs/core/ufs-mcq.c
> +++ b/drivers/ufs/core/ufs-mcq.c
> @@ -18,6 +18,7 @@
> #include <linux/iopoll.h>
>
> #define MAX_QUEUE_SUP GENMASK(7, 0)
> +#define QCFGPTR GENMASK(23, 16)
> #define UFS_MCQ_MIN_RW_QUEUES 2
> #define UFS_MCQ_MIN_READ_QUEUES 0
> #define UFS_MCQ_MIN_POLL_QUEUES 0
> @@ -116,6 +117,19 @@ struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba,
> return &hba->uhq[hwq];
> }
>
> +/**
> + * ufshcd_mcq_queue_cfg_addr - get an start address of the MCQ Queue Config
> + * Registers.
> + * @hba: per adapter instance
> + *
> + * Return: Start address of MCQ Queue Config Registers in HCI
> + */
> +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba)
> +{
> + return FIELD_GET(QCFGPTR, hba->mcq_capabilities) * 0x200;
> +}
> +EXPORT_SYMBOL_GPL(ufshcd_mcq_queue_cfg_addr);
> +
> /**
> * ufshcd_mcq_decide_queue_depth - decide the queue depth
> * @hba: per adapter instance
> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> index df68fb1d4f3f..9e0581115b34 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -1278,6 +1278,7 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
> void ufshcd_hba_stop(struct ufs_hba *hba);
> void ufshcd_schedule_eh_work(struct ufs_hba *hba);
> void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds);
> +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba);
> u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i);
> void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i);
> unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
New functions should not be introduced as a separate patch but instead should
be introduced in the first patch that adds a caller to the new function.
Thanks,
Bart.
next prev parent reply other threads:[~2024-05-31 20:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20240531104947epcas2p31961bda5ee0eb313c0d9a7d63d5461ba@epcas2p3.samsung.com>
2024-05-31 10:38 ` [PATCH 0/3] ufs: pci: Add support UFSHCI 4.0 MCQ Minwoo Im
2024-05-31 10:38 ` [PATCH 1/3] ufs: mcq: Add ufshcd_mcq_queue_cfg_addr helper Minwoo Im
2024-05-31 20:15 ` Bart Van Assche [this message]
2024-05-31 20:55 ` Minwoo Im
2024-05-31 10:38 ` [PATCH 2/3] ufs: pci: Add support MCQ for QEMU-based UFS Minwoo Im
2024-05-31 20:16 ` Bart Van Assche
2024-05-31 20:54 ` Minwoo Im
2024-05-31 10:38 ` [PATCH 3/3] ufs: mcq: Prevent no I/O queue case for MCQ Minwoo Im
2024-05-31 20:17 ` Bart Van Assche
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