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Bottomley" , "open list:ARM/QUALCOMM MAILING LIST" , open list References: <20250116091150.1167739-1-quic_ziqichen@quicinc.com> <20250116091150.1167739-5-quic_ziqichen@quicinc.com> <20250119073056.houuz5xjyeen7nw5@thinkpad> Content-Language: en-US From: Ziqi Chen In-Reply-To: <20250119073056.houuz5xjyeen7nw5@thinkpad> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kcxhcPaKg4JijBVaSKti3ctZf87qPZDZ X-Proofpoint-ORIG-GUID: kcxhcPaKg4JijBVaSKti3ctZf87qPZDZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-20_02,2025-01-20_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 adultscore=0 mlxlogscore=999 bulkscore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501200101 Hi Mani， Thanks for your comments~ On 1/19/2025 3:30 PM, Manivannan Sadhasivam wrote: > On Thu, Jan 16, 2025 at 05:11:45PM +0800, Ziqi Chen wrote: >> From: Can Guo >> >> Implement the freq_to_gear_speed() vops to map the unipro core clock >> frequency to the corresponding maximum supported gear speed. >> >> Co-developed-by: Ziqi Chen >> Signed-off-by: Ziqi Chen >> Signed-off-by: Can Guo >> --- >> drivers/ufs/host/ufs-qcom.c | 32 ++++++++++++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> >> diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c >> index 1e8a23eb8c13..64263fa884f5 100644 >> --- a/drivers/ufs/host/ufs-qcom.c >> +++ b/drivers/ufs/host/ufs-qcom.c >> @@ -1803,6 +1803,37 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba) >> return ret; >> } >> >> +static int ufs_qcom_freq_to_gear_speed(struct ufs_hba *hba, unsigned long freq, u32 *gear) >> +{ >> + int ret = 0 > > Please do not initialize ret with 0. Return the actual value directly. > If we don't initialize ret here, for the cases of freq matched in the table, it will return an unknown ret value. It is not make sense, right? Or you may want to say we don't need “ret” , just need to return gear value? But we need this "ret" to check whether the freq is invalid. >> + >> + switch (freq) { >> + case 403000000: >> + *gear = UFS_HS_G5; >> + break; >> + case 300000000: >> + *gear = UFS_HS_G4; >> + break; >> + case 201500000: >> + *gear = UFS_HS_G3; >> + break; >> + case 150000000: >> + case 100000000: >> + *gear = UFS_HS_G2; >> + break; >> + case 75000000: >> + case 37500000: >> + *gear = UFS_HS_G1; >> + break; >> + default: >> + ret = -EINVAL; >> + dev_err(hba->dev, "Unsupported clock freq\n"); > > Print the freq. Ok, thank for your suggestion, we can print freq with dev_dbg() in next version. > > - Mani > -Ziqi >> + break; >> + } >> + >> + return ret; >> +} >> + >> /* >> * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations >> * >> @@ -1833,6 +1864,7 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = { >> .op_runtime_config = ufs_qcom_op_runtime_config, >> .get_outstanding_cqs = ufs_qcom_get_outstanding_cqs, >> .config_esi = ufs_qcom_config_esi, >> + .freq_to_gear_speed = ufs_qcom_freq_to_gear_speed, >> }; >> >> /** >> -- >> 2.34.1 >> >