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Subject: Re: [PATCH v1 1/2] ufs: core: interduce a choice of wb toggle in
 clock scaling
To:     Bean Huo <huobean@gmail.com>, <stanley.chu@mediatek.com>,
        <linux-scsi@vger.kernel.org>, <martin.petersen@oracle.com>,
        <avri.altman@wdc.com>, <alim.akhtar@samsung.com>,
        <jejb@linux.ibm.com>
CC:     <wsd_upstream@mediatek.com>, <linux-mediatek@lists.infradead.org>,
        <chun-hung.wu@mediatek.com>, <alice.chao@mediatek.com>,
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References: <20220728071637.22364-1-peter.wang@mediatek.com>
 <20220728071637.22364-2-peter.wang@mediatek.com>
 <b9fab29cde42cb9573616092329089f45cd27af2.camel@gmail.com>
From:   Peter Wang <peter.wang@mediatek.com>
Message-ID: <e6034a5e-8bb4-564e-76bf-c822c7bb99af@mediatek.com>
Date:   Mon, 1 Aug 2022 22:31:13 +0800
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On 7/29/22 5:41 AM, Bean Huo wrote:
> On Thu, 2022-07-28 at 15:16 +0800, peter.wang@mediatek.com wrote:
>> From: Peter Wang <peter.wang@mediatek.com>
>>
>> Vendor may wan't disable/enable write booster while clock scaling.
>> Introduce a flag UFSHCD_CAP_WB_WITH_CLK_SCALING to decouple WB and
>> clock scaling.
>>
>> UFSHCD_CAP_WB_WITH_CLK_SCALING only valid when UFSHCD_CAP_CLK_SCALING
>> is set. Just like UFSHCD_CAP_HIBERN8_WITH_CLK_GATING is valid only
>> when
>> UFSHCD_CAP_CLK_GATING set.
>>
> Hi Peter,
>
> probably "interduce" is a typo in your subject?
>
> Kind regards,
> Bean


Hi Bean,

Yes, it typo.

Thanks.
Peter