Re: [PATCH v3 3/5] arm64: dts: qcom: glymur: Add UFS nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: missing required power-domains property in ufs_mem_phy
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commit cc6e215ec76c80b1408b03a4a6419de1ac3953d3
Author: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>

arm64: dts: qcom: glymur: Add UFS nodes

Add UFS PHY and UFS host controller nodes for Glymur SoC.

> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index 65a398c0a9920..49ef89b41aada 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
[ ... ]
> @@ -4102,6 +4102,125 @@ rng: rng@10c3000 {
>  			reg = <0x0 0x010c3000 0x0 0x1000>;
>  		};
>  
> +		ufs_mem_phy: phy@1d80000 {
> +			compatible = "qcom,glymur-qmp-ufs-phy";
> +			reg = <0x0 0x01d80000 0x0 0x2000>;
> +
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> +				 /* UFS and PCIE4 share the same clkref */
> +				 <&tcsr TCSR_PCIE_4_CLKREF_EN>;
> +
> +			clock-names = "ref",
> +				      "ref_aux",
> +				      "qref";
> +
> +			resets = <&ufs_mem_hc 0>;
> +			reset-names = "ufsphy";
> +
> +			#clock-cells = <1>;
> +			#phy-cells = <0>;
> +
> +			status = "disabled";
> +		};

[Severity: Medium]
Is the ufs_mem_phy node missing a power-domains property?

This node appears to violate the qcom,sc8280xp-qmp-ufs-phy.yaml DT schema by
omitting this required property.

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Sashiko AI review · https://sashiko.dev/#/patchset/20261007-glymur_ufs_qcb_enablement-v3-0-84cf4f861415@oss.qualcomm.com?part=3