From: sashiko-bot@kernel.org
To: "Louis-Alexis Eyraud" <louisalexis.eyraud@collabora.com>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-scsi@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org,
vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com
Subject: Re: [PATCH v14 02/23] dt-bindings: ufs: mediatek,ufs: Complete the binding
Date: Fri, 16 Oct 2026 12:46:38 +0000 [thread overview]
Message-ID: <sashiko-outbox-174333@kernel.org> (raw)
In-Reply-To: <20261016-mt8196-ufs-v14-2-e8d565e0cd45@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: ufs: mediatek: incompatible schema change breaks in-tree mt8195.dtsi
--
commit 2eee1dd0c91a095faf6d7717e0d6ad307cbf851d
Author: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
dt-bindings: ufs: mediatek,ufs: Complete the binding
This commit updates the mediatek,ufs.yaml binding by making freq-table-hz
disallowed, enforcing operating-points-v2, and renaming and expanding the
clock requirements for MT8195 and MT8192 platforms. It also documents various
power supply pins and adds a new example for MT8195.
> Disallow freq-table-hz and move to operating-points-v2. It's fine to
> break compatibility here, as the binding is currently unused and would
> be impossible to correctly use in its current state.
Is this description accurate regarding the binding being unused?
Looking at arch/arm64/boot/dts/mediatek/mt8195.dtsi, there is an active
mainline user of the mediatek,mt8195-ufshci compatible string:
arch/arm64/boot/dts/mediatek/mt8195.dtsi:ufshci() {
...
compatible = "mediatek,mt8195-ufshci";
...
clock-names = "ufs", "ufs_aes", "ufs_tick",
"unipro_sysclk", "unipro_tick",
"unipro_mp_bclk", "ufs_tx_symbol",
"ufs_mem_sub";
freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>;
...
}
Will this change cause dtbs_check validation to fail for the MT8195 platform
since it still relies on freq-table-hz and the old ufs-prefixed clock names?
> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> index 15c347f5e6604..945cb986b06b7 100644
> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
[ ... ]
> @@ -54,29 +96,41 @@ allOf:
> properties:
> compatible:
> contains:
> - enum:
> - - mediatek,mt8195-ufshci
[ ... ]
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8195-ufshci
> + then:
> + properties:
> + clocks:
> + minItems: 10
> + clock-names:
> + minItems: 10
[Severity: Medium]
Does enforcing a minimum of 10 clocks here break existing in-tree device
trees?
As shown above, the existing mt8195.dtsi specifies exactly 8 clocks. Because
this patch requires 10 clocks, explicitly requires the new names without the
ufs_ prefix, and forbids freq-table-hz, will it break backward compatibility
and leave the tree in a broken state for MT8195 users?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-mt8196-ufs-v14-0-e8d565e0cd45@collabora.com?part=2
next prev parent reply other threads:[~2026-10-16 12:46 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 12:32 [PATCH v14 00/23] MediaTek UFS Cleanup and MT8196 Enablement Louis-Alexis Eyraud
2026-10-16 12:32 ` [PATCH v14 01/23] dt-bindings: phy: Add mediatek,mt8196-ufsphy variant Louis-Alexis Eyraud
2026-10-16 12:32 ` [PATCH v14 02/23] dt-bindings: ufs: mediatek,ufs: Complete the binding Louis-Alexis Eyraud
2026-10-16 12:46 ` sashiko-bot [this message]
2026-10-16 12:32 ` [PATCH v14 03/23] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant Louis-Alexis Eyraud
2026-10-16 12:32 ` [PATCH v14 04/23] scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h Louis-Alexis Eyraud
2026-10-16 12:32 ` [PATCH v14 05/23] phy: mediatek: ufs: Add support for resets Louis-Alexis Eyraud
2026-10-16 12:46 ` sashiko-bot
2026-10-16 12:32 ` [PATCH v14 06/23] scsi: ufs: mediatek: Rework resets Louis-Alexis Eyraud
2026-10-16 12:32 ` [PATCH v14 07/23] scsi: ufs: mediatek: Rework 0.9V regulator Louis-Alexis Eyraud
2026-10-16 12:44 ` sashiko-bot
2026-10-16 12:33 ` [PATCH v14 08/23] scsi: ufs: mediatek: Add dual 0.9V supply support Louis-Alexis Eyraud
2026-10-16 12:43 ` sashiko-bot
2026-10-16 12:33 ` [PATCH v14 09/23] scsi: ufs: mediatek: Rework init function Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 10/23] scsi: ufs: mediatek: Rework the crypt-boost stuff Louis-Alexis Eyraud
2026-10-16 12:43 ` sashiko-bot
2026-10-16 12:33 ` [PATCH v14 11/23] scsi: ufs: mediatek: Handle misc host voltage regulators Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 12/23] scsi: ufs: mediatek: Remove undocumented downstream reset cruft Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 13/23] scsi: ufs: mediatek: Remove vendor kernel quirks cruft Louis-Alexis Eyraud
2026-10-16 12:43 ` sashiko-bot
2026-10-16 12:33 ` [PATCH v14 14/23] scsi: ufs: mediatek: Use the common PHY framework Louis-Alexis Eyraud
2026-10-16 12:50 ` sashiko-bot
2026-10-16 12:33 ` [PATCH v14 15/23] scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 16/23] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 17/23] scsi: ufs: mediatek: Clean up logging prints Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 18/23] scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 19/23] scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 20/23] scsi: ufs: mediatek: Rework hardware version reading Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 21/23] scsi: ufs: mediatek: Remove ret local from link_startup_notify Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 22/23] scsi: ufs: mediatek: Remove undocumented "clk-scale-up-vcore-min" Louis-Alexis Eyraud
2026-10-16 12:33 ` [PATCH v14 23/23] scsi: ufs: mediatek: Add MT8196 compatible, update copyright Louis-Alexis Eyraud
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=sashiko-outbox-174333@kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-scsi@vger.kernel.org \
--cc=louisalexis.eyraud@collabora.com \
--cc=neil.armstrong@linaro.org \
--cc=olteanv@gmail.com \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox