From: Jaewon Kim <jaewon02.kim@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Tomasz Figa <tomasz.figa@gmail.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Linus Walleij <linus.walleij@linaro.org>,
Thierry Reding <thierry.reding@gmail.com>,
Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v3 3/4] pinctrl: samsung: support ExynosAuto GPIO structure
Date: Mon, 11 Dec 2023 11:44:21 +0900 [thread overview]
Message-ID: <04a874f4-df4b-2a9d-ea02-bbb63095d199@samsung.com> (raw)
In-Reply-To: <9d496fb5-25b4-4f1a-9652-4c54cf2d59a1@linaro.org>
On 23. 12. 10. 22:23, Krzysztof Kozlowski wrote:
> On 08/12/2023 08:45, Jaewon Kim wrote:
>> New ExynosAuto series GPIO have a different register structure.
>> In the existing Exynos series, EINT control register enumerated after
> Missing verb... or enumerated is past tense? I just don't get entire
> sentence.
Sorry, I will add 'is' like below.
In the existing Exynos series, the EINT control register is enumerated
after a specific offset.
>
>> a specific offset (e.g EXYNOS_GPIO_ECON_OFFSET, EXYNOS_GPIO_EMASK_OFFSET).
>> However, from ExynosAutov920 SoC, the register that controls EINT belongs
>> to each GPIO bank, and each GPIO bank has 0x1000 align.
>>
>> This is a structure to protect the GPIO bank using S2MPU in VM environment,
>> and will only be applied in ExynosAuto series SoCs.
>>
>> -------------------------------------------------
>> | original | ExynosAutov920 |
>> |-----------------------------------------------|
>> | 0x0 GPIO_CON | 0x0 GPIO_CON |
>> | 0x4 GPIO_DAT | 0x4 GPIO_DAT |
>> | 0x8 GPIO_PUD | 0x8 GPIO_PUD |
>> | 0xc GPIO_DRV | 0xc GPIO_DRV |
>> | 0x10 GPIO_CONPDN | 0x10 GPIO_CONPDN |
>> | 0x14 GPIO_PUDPDN | 0x14 GPIO_PUDPDN |
>> | 0x700 EINT_CON | 0x18 EINT_CON |
> This suggests there is EINT_CON per bank in old and new register layout.
> I don't think it's true, so probably this could look like:
>
> | --- | 0x18 EINT_CON (per_bank) |
> | --- | 0x18 EINT_FLTCON0 (per_bank) |
> | --- | 0x18 EINT_FLTCON1 (per_bank) |
> | --- | 0x18 EINT_MASK (per_bank) |
> | 0x700 EINT_CON (global) | 0x18 EINT_CON |
>
> etc..
>
> Also, please use spaces for alignment in the table.
>
Thanks you for your review.
I will add (global), (per_bank) for clearer expression.
And, I will use space instead of tab in v4.
>
> Best regards,
> Krzysztof
>
>
next prev parent reply other threads:[~2023-12-11 2:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20231208075019epcas2p4cef1190e41adeaaf47b7763cc86c3d26@epcas2p4.samsung.com>
2023-12-08 7:45 ` [PATCH v3 0/4] Introduce ExynosAutov920 SoC and SADK board Jaewon Kim
2023-12-08 7:45 ` [PATCH v3 1/4] arm64: dts: exynos: add initial support for exynosautov920 SoC Jaewon Kim
2023-12-11 7:42 ` (subset) " Krzysztof Kozlowski
2023-12-11 7:43 ` Krzysztof Kozlowski
2023-12-08 7:45 ` [PATCH v3 2/4] arm64: dts: exynos: add minimal support for exynosautov920 sadk board Jaewon Kim
2023-12-11 7:42 ` (subset) " Krzysztof Kozlowski
2023-12-08 7:45 ` [PATCH v3 3/4] pinctrl: samsung: support ExynosAuto GPIO structure Jaewon Kim
2023-12-10 13:00 ` Krzysztof Kozlowski
2023-12-11 2:38 ` Jaewon Kim
2023-12-10 13:23 ` Krzysztof Kozlowski
2023-12-11 2:44 ` Jaewon Kim [this message]
2023-12-08 7:45 ` [PATCH v3 4/4] pinctrl: samsung: add exynosautov920 pinctrl Jaewon Kim
2023-12-10 13:23 ` Krzysztof Kozlowski
2023-12-11 2:45 ` Jaewon Kim
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