[PATCH v2][bfin-sport-uart] Walk around RX underflow hardware issue in 32-bit SPORT RX reading

[sonic zhang <sonic.adi@gmail.com>]

If another interrupt fires while doing a 32-bit read from RX FIFO,
a fake RX underflow error will be generated.  So disable interrupts
to prevent interruption while reading the FIFO.


Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
---
 drivers/serial/bfin_sport_uart.h |   16 +++++++++++++++-
 1 files changed, 15 insertions(+), 1 deletions(-)

diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/serial/bfin_sport_uart.h
index 671d41c..f4e5a83 100644
--- a/drivers/serial/bfin_sport_uart.h
+++ b/drivers/serial/bfin_sport_uart.h
@@ -43,7 +43,21 @@
 #define SPORT_GET_TFSDIV(sport)		bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))
 #define SPORT_GET_TX(sport)		bfin_read16(((sport)->port.membase + OFFSET_TX))
 #define SPORT_GET_RX(sport)		bfin_read16(((sport)->port.membase + OFFSET_RX))
-#define SPORT_GET_RX32(sport)		bfin_read32(((sport)->port.membase + OFFSET_RX))
+/*
+ * If another interrupt fires while doing a 32-bit read from RX FIFO,
+ * a fake RX underflow error will be generated.  So disable interrupts
+ * to prevent interruption while reading the FIFO.
+ * Once hardware design can root cause and officially log this, we can
+ * update the code to use a standard ANOMALY_XXX define.
+ */
+#define SPORT_GET_RX32(sport)  \
+({                             \
+	unsigned int __ret;             \
+	local_irq_disable();    \
+	__ret = bfin_read32(((sport)->port.membase + OFFSET_RX));       \
+	local_irq_enable();     \
+	__ret;                  \
+})
 #define SPORT_GET_RCR1(sport)		bfin_read16(((sport)->port.membase + OFFSET_RCR1))
 #define SPORT_GET_RCR2(sport)		bfin_read16(((sport)->port.membase + OFFSET_RCR2))
 #define SPORT_GET_RCLKDIV(sport)	bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))
-- 
1.6.0