From: Chander Kashyap <chander.kashyap@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org,
kgene.kim@samsung.com, t.figa@samsung.com,
s.nawrocki@samsung.com, thomas.ab@samsung.com,
Chander Kashyap <chander.kashyap@linaro.org>
Subject: [PATCH 02/13] ARM: Exynos: fix secondary cpu power control register address calculation
Date: Thu, 6 Jun 2013 16:31:16 +0530 [thread overview]
Message-ID: <1370516488-25860-2-git-send-email-chander.kashyap@linaro.org> (raw)
In-Reply-To: <1370516488-25860-1-git-send-email-chander.kashyap@linaro.org>
The CPU power control register address calculation for secondary CPUs is
generalized by calculating the register address using secondary cpu
logical number.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
---
arch/arm/mach-exynos/include/mach/regs-pmu.h | 6 ++++++
arch/arm/mach-exynos/platsmp.c | 10 +++++-----
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 3f30aa1..b77f72c 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -125,11 +125,17 @@
#define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0)
#define S5P_ARM_CORE0_CONFIGURATION S5P_PMUREG(0x2000)
+#define S5P_ARM_CORE0_STATUS S5P_PMUREG(0x2004)
#define S5P_ARM_CORE0_OPTION S5P_PMUREG(0x2008)
#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
#define S5P_ARM_CORE1_OPTION S5P_PMUREG(0x2088)
+#define S5P_ARM_CORE_CONFIGURATION(_nr) \
+ (S5P_ARM_CORE0_CONFIGURATION + (_nr) * 0x80)
+#define S5P_ARM_CORE_STATUS(_nr) \
+ (S5P_ARM_CORE0_STATUS + (_nr) * 0x80)
+
#define S5P_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
#define S5P_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
#define S5P_CAM_OPTION S5P_PMUREG(0x3C08)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index d9c6d0a..1a4e4e5 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -109,14 +109,14 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
*/
write_pen_release(phys_cpu);
- if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) {
+ if (!(__raw_readl(S5P_ARM_CORE_STATUS(cpu)) & S5P_CORE_LOCAL_PWR_EN)) {
__raw_writel(S5P_CORE_LOCAL_PWR_EN,
- S5P_ARM_CORE1_CONFIGURATION);
+ S5P_ARM_CORE_CONFIGURATION(cpu));
timeout = 10;
- /* wait max 10 ms until cpu1 is on */
- while ((__raw_readl(S5P_ARM_CORE1_STATUS)
+ /* wait max 10 ms until secondary cpu is on */
+ while ((__raw_readl(S5P_ARM_CORE_STATUS(cpu))
& S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
@@ -125,7 +125,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
}
if (timeout == 0) {
- printk(KERN_ERR "cpu1 power enable failed");
+ pr_err("secondary cpu power enable failed\n");
spin_unlock(&boot_lock);
return -ETIMEDOUT;
}
--
1.7.9.5
next prev parent reply other threads:[~2013-06-06 11:01 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-06 11:01 [PATCH 01/13] ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based SoCs Chander Kashyap
2013-06-06 11:01 ` Chander Kashyap [this message]
2013-06-08 11:05 ` [PATCH 02/13] ARM: Exynos: fix secondary cpu power control register address calculation Tomasz Figa
2013-06-11 13:46 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 03/13] ARM: dts: fork out common Exynos5 nodes Chander Kashyap
2013-06-06 11:14 ` Sachin Kamat
2013-06-08 11:12 ` Tomasz Figa
2013-06-11 13:49 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 04/13] ARM: dts: list the CPU nodes for Exynos5250 Chander Kashyap
2013-06-06 16:54 ` Mark Rutland
2013-06-10 9:18 ` Chander Kashyap
2013-06-08 11:16 ` Tomasz Figa
2013-06-10 9:18 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 05/13] ARM: Exynos: Add support for Exynos5420 SoC Chander Kashyap
2013-06-06 11:01 ` [PATCH 06/13] serial: samsung: add support for Exynos5420 Chander Kashyap
2013-06-06 11:35 ` Girish KS
2013-06-10 9:05 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 07/13] ARM: Exynos: use four additional chipid bits to identify Exynos family Chander Kashyap
2013-06-06 11:01 ` [PATCH 08/13] irqchip: exynos-combiner: set irq base as 256 for Exynos5420 Chander Kashyap
2013-06-08 11:24 ` Tomasz Figa
2013-06-06 11:01 ` [PATCH 09/13] clk: exynos5420: register clocks using common clock framework Chander Kashyap
2013-06-08 11:25 ` Tomasz Figa
2013-06-11 13:22 ` Chander Kashyap
2013-06-10 11:12 ` sunil joshi
2013-06-11 13:23 ` Chander Kashyap
2013-06-12 21:17 ` Tomasz Figa
2013-06-12 21:32 ` Andrew Bresticker
2013-06-13 5:18 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 10/13] ARM: dts: Add initial device tree support for Exynos5420 Chander Kashyap
2013-06-06 16:34 ` Mark Rutland
2013-06-11 13:35 ` Chander Kashyap
2013-06-11 14:11 ` Mark Rutland
2013-06-12 5:35 ` Subash Patel
2013-06-08 11:38 ` Tomasz Figa
2013-06-14 13:54 ` Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 00/10] ARM: Exynos: Add Exynos5420 SoC support Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 01/10] ARM: dts: fork out common Exynos5 nodes Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 02/10] ARM: dts: list the CPU nodes for Exynos5250 Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 03/10] ARM: Exynos: Add support for Exynos5420 SoC Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 04/10] serial: samsung: select Exynos specific driver data if ARCH_EXYNOS is defined Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 05/10] ARM: Exynos: use four additional chipid bits to identify Exynos family Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 06/10] clk: exynos5420: register clocks using common clock framework Chander Kashyap
2013-06-14 17:26 ` Andrew Bresticker
2013-06-17 8:46 ` Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 07/10] ARM: dts: Add initial device tree support for Exynos5420 Chander Kashyap
2013-06-17 8:46 ` Mark Rutland
[not found] ` <CAGOxZ51H_dtZN3Nx-=qU+gjHAEwgPA--SZrdiu-sBCANhdKtAw@mail.gmail.com>
2013-06-17 11:08 ` Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 08/10] clocksource: exynos_mct: use (request/free)_irq calls for local timer registration Chander Kashyap
2013-06-17 10:01 ` Mark Rutland
2013-06-17 10:29 ` Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 09/10] ARM: Exynos: add secondary CPU boot base location for Exynos5420 Chander Kashyap
2013-06-14 14:02 ` [PATCH v2 10/10] ARM: Exynos: extend soft-reset support " Chander Kashyap
2013-06-06 11:01 ` [PATCH 11/13] clocksource: exynos_mct: extend local timer support for four cores Chander Kashyap
2013-06-06 16:50 ` Mark Rutland
2013-06-08 11:39 ` Tomasz Figa
2013-06-11 13:26 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 12/13] ARM: Exynos: add secondary CPU boot base location for Exynos5420 Chander Kashyap
2013-06-06 11:01 ` [PATCH 13/13] ARM: Exynos: extend soft-reset support " Chander Kashyap
2013-06-06 11:44 ` Tushar Behera
2013-06-10 8:54 ` Kukjin Kim
2013-06-11 13:24 ` Chander Kashyap
2013-06-06 11:01 ` [PATCH 00/13] add exynos5420 support Chander Kashyap
2013-06-08 10:57 ` [PATCH 01/13] ARM: Exynos: initialize l2x0 cache controller only for cortex-a9 based SoCs Tomasz Figa
2013-06-11 23:58 ` Olof Johansson
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