From: Bryan O'Donoghue <pure.logic@nexus-software.ie>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Vinod Koul <vinod.koul@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
dmaengine <dmaengine@vger.kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Puustinen, Ismo" <ismo.puustinen@intel.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>
Subject: Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART
Date: Wed, 13 Apr 2016 16:24:49 +0100 [thread overview]
Message-ID: <1460561089.19152.165.camel@nexus-software.ie> (raw)
In-Reply-To: <1460558891.6620.147.camel@linux.intel.com>
On Wed, 2016-04-13 at 17:48 +0300, Andy Shevchenko wrote:
> Wait, you mean flow control between DMA controller and UART FIFO, or
> I
> misread you?
Yup.
It's a while since I read the spec and talked to the relevant people
but... I have this memory that the FIFO fill signal and DMA block were
'wired up' @ the AHB level. That would be how the UART and DMA block
would flow-control each other for descriptor chaining at any rate and
so one assumes that its active at the block-to-fifo layer.
Meh I don't have the UART EAS anymore to comment in detail..
I think the right thing to do is to be safe (so I'll ACK your series)
and then run an experiment to push the burst size upwards. If you have
the EAS handy though it might be worthwhile working out when the DMA
block will flow-control w/r to the FIFO fill level - I *think* (but
can't prove since I don't have the EAS anymore) that it's safe to push
that value higher.
---
bod
next prev parent reply other threads:[~2016-04-13 15:24 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-07 20:37 [PATCH v1 00/12] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 01/12] dmaengine: dw: keep copy of custom slave config in dwc Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 02/12] dmaengine: dw: provide probe(), remove() stubs for users Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 03/12] dmaengine: dw: set polarity of handshake interface Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 04/12] dmaengine: dw: override LLP support if asked in platform data Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 05/12] serial: 8250_dma: switch to new dmaengine_terminate_* API Andy Shevchenko
2016-04-07 23:55 ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 06/12] serial: 8250_dma: stop ongoing RX DMA on exception Andy Shevchenko
2016-04-07 23:54 ` Peter Hurley
2016-04-08 8:07 ` Andy Shevchenko
2016-04-08 23:20 ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 07/12] serial: 8250_dma: adjust DMA address of the UART Andy Shevchenko
2016-04-08 0:24 ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 08/12] serial: 8250: enable AFE on ports where FIFO is 16 bytes Andy Shevchenko
2016-04-07 23:43 ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 09/12] serial: 8250_lpss: split LPSS driver to separate module Andy Shevchenko
2016-04-08 1:42 ` Peter Hurley
2016-04-08 8:17 ` Andy Shevchenko
2016-04-08 22:44 ` Peter Hurley
2016-04-11 13:09 ` Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 10/12] serial: 8250_lpss: move Quark code from PCI driver Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 11/12] serial: 8250_lpss: enable MSI for Intel Quark Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko
2016-04-11 15:33 ` Bryan O'Donoghue
2016-04-11 15:51 ` Andy Shevchenko
2016-04-11 16:05 ` Andy Shevchenko
2016-04-12 16:25 ` Bryan O'Donoghue
2016-04-12 16:50 ` Andy Shevchenko
2016-04-13 11:22 ` Bryan O'Donoghue
2016-04-13 12:03 ` Andy Shevchenko
2016-04-13 14:34 ` Bryan O'Donoghue
2016-04-13 14:48 ` Andy Shevchenko
2016-04-13 15:24 ` Bryan O'Donoghue [this message]
2016-04-09 16:53 ` [PATCH v1 00/12] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Bryan O'Donoghue
2016-04-09 17:48 ` Andy Shevchenko
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